JP5877246B2 - 異なった少数キャリア寿命を有するチャネル領域を含む装置および方法 - Google Patents

異なった少数キャリア寿命を有するチャネル領域を含む装置および方法 Download PDF

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JP5877246B2
JP5877246B2 JP2014526134A JP2014526134A JP5877246B2 JP 5877246 B2 JP5877246 B2 JP 5877246B2 JP 2014526134 A JP2014526134 A JP 2014526134A JP 2014526134 A JP2014526134 A JP 2014526134A JP 5877246 B2 JP5877246 B2 JP 5877246B2
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region
recombination
forming
recombination region
elongated channel
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JP2014522131A (ja
JP2014522131A5 (enExample
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テッサリオル，パオロ
マウリ，アウレリオ，ジャンカルロ
合田　晃
晃 合田
チャオ，イージェ
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マイクロン テクノロジー， インク．
マイクロン テクノロジー， インク．
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    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B41/00—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates
    • H10B41/10—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates characterised by the top-view layout
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B41/00—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B41/00—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates
    • H10B41/20—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates characterised by three-dimensional arrangements, e.g. with cells on different height levels
    • H10B41/23—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates characterised by three-dimensional arrangements, e.g. with cells on different height levels with source and drain on different levels, e.g. with sloping channels
    • H10B41/27—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates characterised by three-dimensional arrangements, e.g. with cells on different height levels with source and drain on different levels, e.g. with sloping channels the channels comprising vertical portions, e.g. U-shaped channels
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B41/00—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates
    • H10B41/30—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates characterised by the memory core region
    • H10B41/35—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates characterised by the memory core region with a cell select transistor, e.g. NAND
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B43/00—EEPROM devices comprising charge-trapping gate insulators
    • H10B43/10—EEPROM devices comprising charge-trapping gate insulators characterised by the top-view layout
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B43/00—EEPROM devices comprising charge-trapping gate insulators
    • H10B43/20—EEPROM devices comprising charge-trapping gate insulators characterised by three-dimensional arrangements, e.g. with cells on different height levels
    • H10B43/23—EEPROM devices comprising charge-trapping gate insulators characterised by three-dimensional arrangements, e.g. with cells on different height levels with source and drain on different levels, e.g. with sloping channels
    • H10B43/27—EEPROM devices comprising charge-trapping gate insulators characterised by three-dimensional arrangements, e.g. with cells on different height levels with source and drain on different levels, e.g. with sloping channels the channels comprising vertical portions, e.g. U-shaped channels
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B43/00—EEPROM devices comprising charge-trapping gate insulators
    • H10B43/30—EEPROM devices comprising charge-trapping gate insulators characterised by the memory core region
    • H10B43/35—EEPROM devices comprising charge-trapping gate insulators characterised by the memory core region with cell select transistors, e.g. NAND
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/60—Insulated-gate field-effect transistors [IGFET]
    • H10D30/751—Insulated-gate field-effect transistors [IGFET] having composition variations in the channel regions

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  • Non-Volatile Memory (AREA)
  • Semiconductor Memories (AREA)
JP2014526134A 2011-08-16 2012-08-14 異なった少数キャリア寿命を有するチャネル領域を含む装置および方法 Active JP5877246B2 (ja)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US13/211,033 2011-08-16
US13/211,033 US8742481B2 (en) 2011-08-16 2011-08-16 Apparatuses and methods comprising a channel region having different minority carrier lifetimes
PCT/US2012/050796 WO2013025719A2 (en) 2011-08-16 2012-08-14 Apparatuses and methods comprising a channel region having different minority carrier lifetimes

Publications (3)

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JP2014522131A JP2014522131A (ja) 2014-08-28
JP2014522131A5 JP2014522131A5 (enExample) 2015-09-24
JP5877246B2 true JP5877246B2 (ja) 2016-03-02

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Country Link
US (2) US8742481B2 (enExample)
EP (1) EP2745321A4 (enExample)
JP (1) JP5877246B2 (enExample)
KR (1) KR102044045B1 (enExample)
CN (1) CN103828049A (enExample)
TW (1) TWI538165B (enExample)
WO (1) WO2013025719A2 (enExample)

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US10727244B2 (en) 2017-06-12 2020-07-28 Samsung Electronics Co., Ltd. Semiconductor memory devices and methods of fabricating the same
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US10923493B2 (en) 2018-09-06 2021-02-16 Micron Technology, Inc. Microelectronic devices, electronic systems, and related methods
CN112956030A (zh) 2018-10-09 2021-06-11 美光科技公司 包含具有增加阈值电压的晶体管的半导体装置及其相关方法与系统

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Also Published As

Publication number Publication date
WO2013025719A2 (en) 2013-02-21
JP2014522131A (ja) 2014-08-28
US8742481B2 (en) 2014-06-03
CN103828049A (zh) 2014-05-28
KR102044045B1 (ko) 2019-12-02
US9190472B2 (en) 2015-11-17
US20140264447A1 (en) 2014-09-18
KR20140068061A (ko) 2014-06-05
WO2013025719A3 (en) 2013-05-02
US20130043505A1 (en) 2013-02-21
TW201316489A (zh) 2013-04-16
TWI538165B (zh) 2016-06-11
EP2745321A4 (en) 2015-04-01
EP2745321A2 (en) 2014-06-25

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