JP5866086B2 - 半導体装置の作製方法 - Google Patents
半導体装置の作製方法 Download PDFInfo
- Publication number
- JP5866086B2 JP5866086B2 JP2010225297A JP2010225297A JP5866086B2 JP 5866086 B2 JP5866086 B2 JP 5866086B2 JP 2010225297 A JP2010225297 A JP 2010225297A JP 2010225297 A JP2010225297 A JP 2010225297A JP 5866086 B2 JP5866086 B2 JP 5866086B2
- Authority
- JP
- Japan
- Prior art keywords
- film
- silicon oxide
- region
- silicon
- substrate
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
Images
Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D86/00—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
- H10D86/01—Manufacture or treatment
- H10D86/021—Manufacture or treatment of multiple TFTs
- H10D86/0214—Manufacture or treatment of multiple TFTs using temporary substrates
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D86/00—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
- H10D86/40—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D86/00—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
- H10D86/40—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs
- H10D86/471—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs having different architectures, e.g. having both top-gate and bottom-gate TFTs
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D86/00—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
- H10D86/40—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs
- H10D86/60—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs wherein the TFTs are in active matrices
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D30/00—Field-effect transistors [FET]
- H10D30/01—Manufacture or treatment
- H10D30/021—Manufacture or treatment of FETs having insulated gates [IGFET]
- H10D30/031—Manufacture or treatment of FETs having insulated gates [IGFET] of thin-film transistors [TFT]
- H10D30/0321—Manufacture or treatment of FETs having insulated gates [IGFET] of thin-film transistors [TFT] comprising silicon, e.g. amorphous silicon or polysilicon
- H10D30/0323—Manufacture or treatment of FETs having insulated gates [IGFET] of thin-film transistors [TFT] comprising silicon, e.g. amorphous silicon or polysilicon comprising monocrystalline silicon
Landscapes
- Thin Film Transistor (AREA)
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2010225297A JP5866086B2 (ja) | 2009-10-06 | 2010-10-05 | 半導体装置の作製方法 |
Applications Claiming Priority (3)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2009232236 | 2009-10-06 | ||
| JP2009232236 | 2009-10-06 | ||
| JP2010225297A JP5866086B2 (ja) | 2009-10-06 | 2010-10-05 | 半導体装置の作製方法 |
Publications (3)
| Publication Number | Publication Date |
|---|---|
| JP2011100985A JP2011100985A (ja) | 2011-05-19 |
| JP2011100985A5 JP2011100985A5 (enExample) | 2013-10-31 |
| JP5866086B2 true JP5866086B2 (ja) | 2016-02-17 |
Family
ID=43823494
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2010225297A Expired - Fee Related JP5866086B2 (ja) | 2009-10-06 | 2010-10-05 | 半導体装置の作製方法 |
Country Status (2)
| Country | Link |
|---|---|
| US (1) | US8021960B2 (enExample) |
| JP (1) | JP5866086B2 (enExample) |
Families Citing this family (10)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2014020906A1 (ja) * | 2012-07-30 | 2014-02-06 | 住友化学株式会社 | 複合基板の製造方法および半導体結晶層形成基板の製造方法 |
| ITTO20120976A1 (it) * | 2012-11-09 | 2014-05-10 | St Microelectronics Srl | Procedimento per la fabbricazione di un cappuccio per una struttura di incapsulamento di dispositivi elettronici e cappuccio per una struttura di incapsulamento di dispositivi elettronici |
| WO2014119178A1 (ja) * | 2013-01-30 | 2014-08-07 | 京セラ株式会社 | 実装構造体の製造方法 |
| US9012912B2 (en) | 2013-03-13 | 2015-04-21 | Taiwan Semiconductor Manufacturing Company, Ltd. | Wafers, panels, semiconductor devices, and glass treatment methods |
| US9698176B1 (en) * | 2013-11-05 | 2017-07-04 | Ananda H. Kumar | Silicon-based backplane structures and methods for display applications |
| CN204270266U (zh) * | 2014-02-28 | 2015-04-15 | 宸鸿科技(厦门)有限公司 | 一种复合基板结构及具有复合基板结构的触控面板 |
| CN104658891B (zh) * | 2015-03-03 | 2019-03-15 | 京东方科技集团股份有限公司 | 低温多晶硅薄膜的制备方法、薄膜晶体管及显示装置 |
| US9841833B2 (en) * | 2015-06-30 | 2017-12-12 | Lg Display Co., Ltd. | Touch sensor integrated display device |
| WO2020194737A1 (ja) * | 2019-03-28 | 2020-10-01 | シャープ株式会社 | 電子デバイスの製造方法および電子デバイス |
| KR20220075031A (ko) * | 2020-11-26 | 2022-06-07 | 삼성디스플레이 주식회사 | 발광 소자의 제조 방법 및 표시 장치의 제조 방법 |
Family Cites Families (11)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| FR2681472B1 (fr) | 1991-09-18 | 1993-10-29 | Commissariat Energie Atomique | Procede de fabrication de films minces de materiau semiconducteur. |
| US5757456A (en) | 1995-03-10 | 1998-05-26 | Semiconductor Energy Laboratory Co., Ltd. | Display device and method of fabricating involving peeling circuits from one substrate and mounting on other |
| US8415208B2 (en) | 2001-07-16 | 2013-04-09 | Semiconductor Energy Laboratory Co., Ltd. | Semiconductor device and peeling off method and method of manufacturing semiconductor device |
| JP2003282885A (ja) * | 2002-03-26 | 2003-10-03 | Sharp Corp | 半導体装置およびその製造方法 |
| US7119365B2 (en) | 2002-03-26 | 2006-10-10 | Sharp Kabushiki Kaisha | Semiconductor device and manufacturing method thereof, SOI substrate and display device using the same, and manufacturing method of the SOI substrate |
| KR101033797B1 (ko) * | 2003-01-15 | 2011-05-13 | 가부시키가이샤 한도오따이 에네루기 켄큐쇼 | 박리 방법 및 그 박리 방법을 사용한 표시 장치의 제작 방법 |
| JP4794810B2 (ja) * | 2003-03-20 | 2011-10-19 | シャープ株式会社 | 半導体装置の製造方法 |
| TWI395253B (zh) | 2004-12-28 | 2013-05-01 | 小柳光正 | 使用自我組織化功能之積體電路裝置的製造方法及製造裝置 |
| JP5057700B2 (ja) * | 2005-05-31 | 2012-10-24 | 株式会社半導体エネルギー研究所 | 半導体装置の作製方法 |
| WO2007105405A1 (ja) * | 2006-03-10 | 2007-09-20 | Matsushita Electric Industrial Co., Ltd. | 異方性形状部材のマウント方法およびマウント装置と、電子デバイスの製造方法と、電子デバイスと、表示装置 |
| JP5548356B2 (ja) * | 2007-11-05 | 2014-07-16 | 株式会社半導体エネルギー研究所 | 半導体装置の作製方法 |
-
2010
- 2010-10-04 US US12/897,045 patent/US8021960B2/en not_active Expired - Fee Related
- 2010-10-05 JP JP2010225297A patent/JP5866086B2/ja not_active Expired - Fee Related
Also Published As
| Publication number | Publication date |
|---|---|
| JP2011100985A (ja) | 2011-05-19 |
| US20110081769A1 (en) | 2011-04-07 |
| US8021960B2 (en) | 2011-09-20 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| JP5866086B2 (ja) | 半導体装置の作製方法 | |
| US7919392B2 (en) | Semiconductor device and method of manufacturing the same | |
| KR100532557B1 (ko) | 반도체 장치 및 그의 제조 방법, soi기판 및 그것을사용하는 표시 장치 및 soi기판의 제조 방법 | |
| JP6549272B2 (ja) | 半導体装置の作製方法 | |
| CN100573824C (zh) | 单晶硅及soi基板、半导体装置及其制造方法、显示装置 | |
| CN100454521C (zh) | 半导体器件及其制法 | |
| TWI470682B (zh) | 設置有半導體膜的基底及其製造方法 | |
| KR101434934B1 (ko) | Soi 기판의 제작 방법, 및 반도체 장치의 제작 방법 | |
| US20010012677A1 (en) | Semiconductor element forming process having a step of separating film structure from substrate | |
| KR100879039B1 (ko) | 박막 트랜지스터 장치 및 그 제조방법 | |
| JP5941285B2 (ja) | Soi基板の作製方法 | |
| JP2004087606A (ja) | Soi基板およびそれを用いる表示装置ならびにsoi基板の製造方法 | |
| JP2004134675A (ja) | Soi基板、表示装置およびsoi基板の製造方法 | |
| JP2005228762A (ja) | 半導体装置およびその製造方法 | |
| US8946820B2 (en) | Method for manufacturing semiconductor substrate, substrate for forming semiconductor substrate, stacked substrate, semiconductor substrate, and electronic device | |
| CN101855704B (zh) | 半导体装置、带有单晶半导体薄膜的基板和它们的制造方法 | |
| JP4082459B2 (ja) | 表示装置の製造方法 | |
| WO2010109712A1 (ja) | 半導体装置用の絶縁基板、及び、半導体装置 | |
| JP5977947B2 (ja) | Soi基板の作製方法 | |
| US7781775B2 (en) | Production method of semiconductor device and semiconductor device | |
| JP2005026472A (ja) | 半導体装置の製造方法 | |
| WO2009084284A1 (ja) | 半導体装置用の絶縁基板、半導体装置、及び、半導体装置の製造方法 | |
| US20100270658A1 (en) | Semiconductor device and method for producing same | |
| KR20090096353A (ko) | 복합 기판의 제조 장치 및 상기 복합 기판의 제조 장치를 사용한 복합 기판의 제조 방법 | |
| JP2008205104A (ja) | 半導体装置の製造方法 |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| A521 | Request for written amendment filed |
Free format text: JAPANESE INTERMEDIATE CODE: A523 Effective date: 20130916 |
|
| A621 | Written request for application examination |
Free format text: JAPANESE INTERMEDIATE CODE: A621 Effective date: 20130916 |
|
| A977 | Report on retrieval |
Free format text: JAPANESE INTERMEDIATE CODE: A971007 Effective date: 20140407 |
|
| A131 | Notification of reasons for refusal |
Free format text: JAPANESE INTERMEDIATE CODE: A131 Effective date: 20140610 |
|
| A521 | Request for written amendment filed |
Free format text: JAPANESE INTERMEDIATE CODE: A523 Effective date: 20140715 |
|
| A131 | Notification of reasons for refusal |
Free format text: JAPANESE INTERMEDIATE CODE: A131 Effective date: 20150303 |
|
| A521 | Request for written amendment filed |
Free format text: JAPANESE INTERMEDIATE CODE: A523 Effective date: 20150414 |
|
| TRDD | Decision of grant or rejection written | ||
| A01 | Written decision to grant a patent or to grant a registration (utility model) |
Free format text: JAPANESE INTERMEDIATE CODE: A01 Effective date: 20151222 |
|
| A61 | First payment of annual fees (during grant procedure) |
Free format text: JAPANESE INTERMEDIATE CODE: A61 Effective date: 20151229 |
|
| R150 | Certificate of patent or registration of utility model |
Ref document number: 5866086 Country of ref document: JP Free format text: JAPANESE INTERMEDIATE CODE: R150 |
|
| R250 | Receipt of annual fees |
Free format text: JAPANESE INTERMEDIATE CODE: R250 |
|
| R250 | Receipt of annual fees |
Free format text: JAPANESE INTERMEDIATE CODE: R250 |
|
| R250 | Receipt of annual fees |
Free format text: JAPANESE INTERMEDIATE CODE: R250 |
|
| LAPS | Cancellation because of no payment of annual fees |