JP5865751B2 - 半導体装置及びその製造方法 - Google Patents

半導体装置及びその製造方法 Download PDF

Info

Publication number
JP5865751B2
JP5865751B2 JP2012071409A JP2012071409A JP5865751B2 JP 5865751 B2 JP5865751 B2 JP 5865751B2 JP 2012071409 A JP2012071409 A JP 2012071409A JP 2012071409 A JP2012071409 A JP 2012071409A JP 5865751 B2 JP5865751 B2 JP 5865751B2
Authority
JP
Japan
Prior art keywords
layer
insulating film
impurity
substrate
gate insulating
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
JP2012071409A
Other languages
English (en)
Japanese (ja)
Other versions
JP2013206940A (ja
JP2013206940A5 (https=
Inventor
小池　正浩
正浩 小池
雄一 上牟田
雄一 上牟田
手塚　勉
勉 手塚
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp filed Critical Toshiba Corp
Priority to JP2012071409A priority Critical patent/JP5865751B2/ja
Priority to PCT/JP2012/078882 priority patent/WO2013145412A1/ja
Priority to TW101143244A priority patent/TWI529938B/zh
Publication of JP2013206940A publication Critical patent/JP2013206940A/ja
Priority to US14/497,928 priority patent/US20150008492A1/en
Publication of JP2013206940A5 publication Critical patent/JP2013206940A5/ja
Application granted granted Critical
Publication of JP5865751B2 publication Critical patent/JP5865751B2/ja
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Images

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
    • H10D62/80—Semiconductor bodies, or regions thereof, of devices having potential barriers characterised by the materials
    • H10D62/83—Semiconductor bodies, or regions thereof, of devices having potential barriers characterised by the materials being Group IV materials, e.g. B-doped Si or undoped Ge
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B41/00—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates
    • H10B41/30—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates characterised by the memory core region
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/01—Manufacture or treatment
    • H10D30/021—Manufacture or treatment of FETs having insulated gates [IGFET]
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/60—Insulated-gate field-effect transistors [IGFET]
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/60—Insulated-gate field-effect transistors [IGFET]
    • H10D30/67—Thin-film transistors [TFT]
    • H10D30/674—Thin-film transistors [TFT] characterised by the active materials
    • H10D30/6741—Group IV materials, e.g. germanium or silicon carbide
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/60—Insulated-gate field-effect transistors [IGFET]
    • H10D30/68—Floating-gate IGFETs
    • H10D30/681—Floating-gate IGFETs having only two programming levels
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
    • H10D62/80—Semiconductor bodies, or regions thereof, of devices having potential barriers characterised by the materials
    • H10D62/83—Semiconductor bodies, or regions thereof, of devices having potential barriers characterised by the materials being Group IV materials, e.g. B-doped Si or undoped Ge
    • H10D62/834—Semiconductor bodies, or regions thereof, of devices having potential barriers characterised by the materials being Group IV materials, e.g. B-doped Si or undoped Ge further characterised by the dopants
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/20—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials
    • H10P14/34—Deposited materials, e.g. layers
    • H10P14/3402—Deposited materials, e.g. layers characterised by the chemical composition
    • H10P14/3404—Deposited materials, e.g. layers characterised by the chemical composition being Group IVA materials
    • H10P14/3411—Silicon, silicon germanium or germanium
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P30/00—Ion implantation into wafers, substrates or parts of devices
    • H10P30/20—Ion implantation into wafers, substrates or parts of devices into semiconductor materials, e.g. for doping
    • H10P30/202—Ion implantation into wafers, substrates or parts of devices into semiconductor materials, e.g. for doping characterised by the semiconductor materials
    • H10P30/204—Ion implantation into wafers, substrates or parts of devices into semiconductor materials, e.g. for doping characterised by the semiconductor materials into Group IV semiconductors
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P30/00—Ion implantation into wafers, substrates or parts of devices
    • H10P30/20—Ion implantation into wafers, substrates or parts of devices into semiconductor materials, e.g. for doping
    • H10P30/208—Ion implantation into wafers, substrates or parts of devices into semiconductor materials, e.g. for doping of electrically inactive species
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P30/00—Ion implantation into wafers, substrates or parts of devices
    • H10P30/20—Ion implantation into wafers, substrates or parts of devices into semiconductor materials, e.g. for doping
    • H10P30/21—Ion implantation into wafers, substrates or parts of devices into semiconductor materials, e.g. for doping of electrically active species
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P30/00—Ion implantation into wafers, substrates or parts of devices
    • H10P30/20—Ion implantation into wafers, substrates or parts of devices into semiconductor materials, e.g. for doping
    • H10P30/28—Ion implantation into wafers, substrates or parts of devices into semiconductor materials, e.g. for doping characterised by an annealing step, e.g. for activation of dopants
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P95/00—Generic processes or apparatus for manufacture or treatments not covered by the other groups of this subclass
    • H10P95/90—Thermal treatments, e.g. annealing or sintering
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D64/00—Electrodes of devices having potential barriers
    • H10D64/01—Manufacture or treatment
    • H10D64/013—Manufacture or treatment of electrodes having a conductor capacitively coupled to a semiconductor by an insulator
    • H10D64/01356—Manufacture or treatment of electrodes having a conductor capacitively coupled to a semiconductor by an insulator the insulator being formed after the semiconductor body, the semiconductor being a Group IV material and not being silicon, e.g. Ge, SiGe or SiGeC

Landscapes

  • Insulated Gate Type Field-Effect Transistor (AREA)
  • Semiconductor Memories (AREA)
  • Non-Volatile Memory (AREA)
JP2012071409A 2012-03-27 2012-03-27 半導体装置及びその製造方法 Active JP5865751B2 (ja)

Priority Applications (4)

Application Number Priority Date Filing Date Title
JP2012071409A JP5865751B2 (ja) 2012-03-27 2012-03-27 半導体装置及びその製造方法
PCT/JP2012/078882 WO2013145412A1 (ja) 2012-03-27 2012-11-07 半導体装置及びその製造方法
TW101143244A TWI529938B (zh) 2012-03-27 2012-11-20 半導體裝置及其製造方法
US14/497,928 US20150008492A1 (en) 2012-03-27 2014-09-26 Semiconductor device and method of manufacturing same

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2012071409A JP5865751B2 (ja) 2012-03-27 2012-03-27 半導体装置及びその製造方法

Publications (3)

Publication Number Publication Date
JP2013206940A JP2013206940A (ja) 2013-10-07
JP2013206940A5 JP2013206940A5 (https=) 2015-03-19
JP5865751B2 true JP5865751B2 (ja) 2016-02-17

Family

ID=49258750

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2012071409A Active JP5865751B2 (ja) 2012-03-27 2012-03-27 半導体装置及びその製造方法

Country Status (4)

Country Link
US (1) US20150008492A1 (https=)
JP (1) JP5865751B2 (https=)
TW (1) TWI529938B (https=)
WO (1) WO2013145412A1 (https=)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP7672901B2 (ja) 2021-07-06 2025-05-08 キヤノン株式会社 電子写真用ベルト及びそれを用いた電子写真画像形成装置

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2015046511A (ja) * 2013-08-28 2015-03-12 株式会社東芝 半導体装置及びその製造方法
US10224402B2 (en) * 2014-11-13 2019-03-05 Texas Instruments Incorporated Method of improving lateral BJT characteristics in BCD technology
DE102014119088A1 (de) * 2014-12-18 2016-06-23 Infineon Technologies Ag Ein Verfahren zum Bilden eines Halbleiterbauelements und eines Halbleitersubstrats

Family Cites Families (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS63211666A (ja) * 1987-02-26 1988-09-02 Fuji Electric Co Ltd ポリシリコン抵抗素子
JPH10223901A (ja) * 1996-12-04 1998-08-21 Sony Corp 電界効果型トランジスタおよびその製造方法
US6905920B2 (en) * 2000-09-04 2005-06-14 Seiko Epson Corporation Method for fabrication of field-effect transistor to reduce defects at MOS interfaces formed at low temperature
JP4940682B2 (ja) * 2005-09-09 2012-05-30 富士通セミコンダクター株式会社 電界効果トランジスタおよびその製造方法
JP2009054951A (ja) * 2007-08-29 2009-03-12 Toshiba Corp 不揮発性半導体記憶素子及びその製造方法
EP2161755A1 (en) * 2008-09-05 2010-03-10 University College Cork-National University of Ireland, Cork Junctionless Metal-Oxide-Semiconductor Transistor
JP5367340B2 (ja) * 2008-10-30 2013-12-11 株式会社東芝 半導体装置および半導体装置の製造方法

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP7672901B2 (ja) 2021-07-06 2025-05-08 キヤノン株式会社 電子写真用ベルト及びそれを用いた電子写真画像形成装置

Also Published As

Publication number Publication date
TWI529938B (zh) 2016-04-11
WO2013145412A1 (ja) 2013-10-03
JP2013206940A (ja) 2013-10-07
TW201340320A (zh) 2013-10-01
US20150008492A1 (en) 2015-01-08

Similar Documents

Publication Publication Date Title
US10276568B2 (en) Semiconductor device and manufacturing method thereof
CN110034067B (zh) 半导体器件及其形成方法
US20170077223A1 (en) Semiconductor devices
JP6043193B2 (ja) トンネルトランジスタ
JP6175411B2 (ja) 半導体装置
US20170352595A1 (en) Method for reducing n-type finfet source and drain resistance
JP5910965B2 (ja) トンネル電界効果トランジスタの製造方法及びトンネル電界効果トランジスタ
JP5865751B2 (ja) 半導体装置及びその製造方法
JP2015159180A (ja) 半導体装置
US8728894B2 (en) Method for fabricating an NMOS transistor
US9831242B2 (en) Semiconductor device and manufacturing method thereof
US20130026569A1 (en) Methods and apparatus related to hot carrier injection reliability improvement
JP2009182109A (ja) 半導体装置
US20160372595A1 (en) Semiconductor substrate and fabrication method thereof, and semiconductor apparatus using the same and fabrication method thereof
CN104465377B (zh) Pmos晶体管及其形成方法
US10361193B2 (en) Integrated circuit composed of tunnel field-effect transistors and method for manufacturing same
CN111952188A (zh) 具有隔离层的场效应晶体管及其制备方法
CN106856171A (zh) 鳍式场效应晶体管的形成方法
CN106558498A (zh) 半导体结构及其形成方法
WO2015029270A1 (ja) 半導体装置及びその製造方法
CN105826188A (zh) N型鳍式场效应晶体管及其形成方法
CN119153337B (zh) 一种半导体器件及其制造方法、电子装置
US20110212591A1 (en) Method for fabricating transistor of semiconductor device
WO2013105331A1 (ja) 半導体装置及びその製造方法
JP2009021463A (ja) 半導体装置およびその製造方法

Legal Events

Date Code Title Description
A711 Notification of change in applicant

Free format text: JAPANESE INTERMEDIATE CODE: A711

Effective date: 20140521

A521 Request for written amendment filed

Free format text: JAPANESE INTERMEDIATE CODE: A523

Effective date: 20150130

A621 Written request for application examination

Free format text: JAPANESE INTERMEDIATE CODE: A621

Effective date: 20150130

A131 Notification of reasons for refusal

Free format text: JAPANESE INTERMEDIATE CODE: A131

Effective date: 20150818

A521 Request for written amendment filed

Free format text: JAPANESE INTERMEDIATE CODE: A523

Effective date: 20151016

TRDD Decision of grant or rejection written
A01 Written decision to grant a patent or to grant a registration (utility model)

Free format text: JAPANESE INTERMEDIATE CODE: A01

Effective date: 20151201

A61 First payment of annual fees (during grant procedure)

Free format text: JAPANESE INTERMEDIATE CODE: A61

Effective date: 20151228

R151 Written notification of patent or utility model registration

Ref document number: 5865751

Country of ref document: JP

Free format text: JAPANESE INTERMEDIATE CODE: R151