JP5781944B2 - スレッショルド調節半導体合金を堆積させるのに先立ちパターニング不均一性を低減することによる前記半導体合金の厚みばらつきの低減 - Google Patents

スレッショルド調節半導体合金を堆積させるのに先立ちパターニング不均一性を低減することによる前記半導体合金の厚みばらつきの低減 Download PDF

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JP5781944B2
JP5781944B2 JP2011546705A JP2011546705A JP5781944B2 JP 5781944 B2 JP5781944 B2 JP 5781944B2 JP 2011546705 A JP2011546705 A JP 2011546705A JP 2011546705 A JP2011546705 A JP 2011546705A JP 5781944 B2 JP5781944 B2 JP 5781944B2
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silicon
semiconductor region
mask layer
region
containing crystalline
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JP2012516555A (ja
JP2012516555A5 (enExample
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クロンホルツ ステファン
クロンホルツ ステファン
ナウマン アンドレア
ナウマン アンドレア
ビアニンク ガンダ
ビアニンク ガンダ
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Advanced Micro Devices Inc
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Advanced Micro Devices Inc
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    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/01—Manufacture or treatment
    • H10D30/021—Manufacture or treatment of FETs having insulated gates [IGFET]
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01—Manufacture or treatment
    • H10D84/0123—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs
    • H10D84/0126—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01—Manufacture or treatment
    • H10D84/0123—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs
    • H10D84/0126—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs
    • H10D84/0144—Manufacturing their gate insulating layers
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01—Manufacture or treatment
    • H10D84/0123—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs
    • H10D84/0126—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs
    • H10D84/0151—Manufacturing their isolation regions
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01—Manufacture or treatment
    • H10D84/0123—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs
    • H10D84/0126—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs
    • H10D84/0165—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs the components including complementary IGFETs, e.g. CMOS devices
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01—Manufacture or treatment
    • H10D84/02—Manufacture or treatment characterised by using material-based technologies
    • H10D84/03—Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology
    • H10D84/038—Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology using silicon technology, e.g. SiGe
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D86/00—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
    • H10D86/01—Manufacture or treatment
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D86/00—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
    • H10D86/201—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates the substrates comprising an insulating layer on a semiconductor body, e.g. SOI
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01—Manufacture or treatment
    • H10D84/0123—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs
    • H10D84/0126—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs
    • H10D84/013—Manufacturing their source or drain regions, e.g. silicided source or drain regions
    • H10D84/0133—Manufacturing common source or drain regions between multiple IGFETs

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  • Insulated Gate Type Field-Effect Transistor (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
  • Thin Film Transistor (AREA)
  • Recrystallisation Techniques (AREA)
JP2011546705A 2009-01-30 2010-01-27 スレッショルド調節半導体合金を堆積させるのに先立ちパターニング不均一性を低減することによる前記半導体合金の厚みばらつきの低減 Active JP5781944B2 (ja)

Applications Claiming Priority (5)

Application Number Priority Date Filing Date Title
DE102009006886.4 2009-01-30
DE102009006886A DE102009006886B4 (de) 2009-01-30 2009-01-30 Verringerung von Dickenschwankungen einer schwellwerteinstellenden Halbleiterlegierung durch Verringern der Strukturierungsungleichmäßigkeiten vor dem Abscheiden der Halbleiterlegierung
US12/693,227 US8361858B2 (en) 2009-01-30 2010-01-25 Reduction of thickness variations of a threshold semiconductor alloy by reducing patterning non-uniformities prior to depositing the semiconductor alloy
US12/693,227 2010-01-25
PCT/EP2010/000490 WO2010086152A1 (en) 2009-01-30 2010-01-27 Reduction of thickness variations of a threshold adjusting semiconductor alloy by reducing patterning non-uniformities prior to depositing the semiconductor alloy

Publications (3)

Publication Number Publication Date
JP2012516555A JP2012516555A (ja) 2012-07-19
JP2012516555A5 JP2012516555A5 (enExample) 2013-03-07
JP5781944B2 true JP5781944B2 (ja) 2015-09-24

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JP2011546705A Active JP5781944B2 (ja) 2009-01-30 2010-01-27 スレッショルド調節半導体合金を堆積させるのに先立ちパターニング不均一性を低減することによる前記半導体合金の厚みばらつきの低減

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US (2) US8361858B2 (enExample)
JP (1) JP5781944B2 (enExample)
KR (1) KR101587200B1 (enExample)
CN (1) CN102388451B (enExample)
DE (1) DE102009006886B4 (enExample)

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DE102009021484B4 (de) * 2009-05-15 2014-01-30 Globalfoundries Dresden Module One Llc & Co. Kg Höhere Gleichmäßigkeit einer Kanalhalbleiterlegierung durch Herstellen von STI-Strukturen nach dem Aufwachsprozess
DE102009046877B4 (de) 2009-06-30 2012-06-21 Globalfoundries Dresden Module One Limited Liability Company & Co. Kg Erhöhung der Selektivität während der Herstellung einer Kanalhalbleiterlegierung durch einen nassen Oxidationsprozess
DE102009055394B4 (de) * 2009-12-30 2012-06-14 Globalfoundries Dresden Module One Limited Liability Company & Co. Kg Verfahren und Halbleiterbauelement mit Erhöhung der Abscheidegleichmäßigkeit für eine Kanalhalbleiterlegierung durch Bilden einer Vertiefung vor der Wannenimplantation
DE102010028459B4 (de) * 2010-04-30 2018-01-11 Globalfoundries Dresden Module One Limited Liability Company & Co. Kg Reduzierte STI-Topographie in Metallgatetransistoren mit großem ε durch Verwendung einer Maske nach Abscheidung einer Kanalhalbleiterlegierung
DE102010040064B4 (de) * 2010-08-31 2012-04-05 Globalfoundries Inc. Verringerte Schwellwertspannungs-Breitenabhängigkeit in Transistoren, die Metallgateelektrodenstrukturen mit großem ε aufweisen
DE102010063296B4 (de) * 2010-12-16 2012-08-16 Globalfoundries Dresden Module One Limited Liability Company & Co. Kg Herstellungsverfahren mit reduzierter STI-Topograpie für Halbleiterbauelemente mit einer Kanalhalbleiterlegierung
DE102011005639B4 (de) 2011-03-16 2016-05-25 GLOBALFOUNDRIES Dresden Module One Ltd. Liability Company & Co. KG Reduzieren der Defektrate während des Abscheidens einer Kanalhalbleiterlegierung in ein in-situ-abgesenktes aktives Gebiet
DE102011076695B4 (de) * 2011-05-30 2013-05-08 Globalfoundries Inc. Transistoren mit eingebettetem verformungsinduzierenden Material, das in durch einen Oxidationsätzprozess erzeugten Aussparungen ausgebildet ist
US8508001B2 (en) 2011-08-25 2013-08-13 Globalfoundries Inc. Semiconductor device with work function adjusting layer having varied thickness in a gate width direction and methods of making same
US8377773B1 (en) 2011-10-31 2013-02-19 Globalfoundries Inc. Transistors having a channel semiconductor alloy formed in an early process stage based on a hard mask
KR102277398B1 (ko) * 2014-09-17 2021-07-16 삼성전자주식회사 반도체 소자 및 이의 제조 방법
KR102707542B1 (ko) * 2016-12-02 2024-09-20 삼성전자주식회사 반도체 메모리 소자 및 그 제조 방법
US10141430B1 (en) * 2017-07-27 2018-11-27 Taiwan Semiconductor Manufacturing Co., Ltd. Fin structures with uniform threshold voltage distribution and method of making the same

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Also Published As

Publication number Publication date
CN102388451A (zh) 2012-03-21
DE102009006886A1 (de) 2010-08-19
CN102388451B (zh) 2015-07-15
JP2012516555A (ja) 2012-07-19
DE102009006886B4 (de) 2012-12-06
KR101587200B1 (ko) 2016-02-02
US8361858B2 (en) 2013-01-29
KR20110113647A (ko) 2011-10-17
US20100193881A1 (en) 2010-08-05
US20130161695A1 (en) 2013-06-27

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