JP5759581B2 - サンプリング回路のタイミング不整合を減少させるための装置および方法 - Google Patents

サンプリング回路のタイミング不整合を減少させるための装置および方法 Download PDF

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JP5759581B2
JP5759581B2 JP2014045581A JP2014045581A JP5759581B2 JP 5759581 B2 JP5759581 B2 JP 5759581B2 JP 2014045581 A JP2014045581 A JP 2014045581A JP 2014045581 A JP2014045581 A JP 2014045581A JP 5759581 B2 JP5759581 B2 JP 5759581B2
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sampling
clock
circuit
state
input
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JP2014176096A (ja
JP2014176096A5 (enExample
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エー． シンガー，ローレンス
エー． シンガー，ローレンス
デヴァラジャン，シッダース
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アナログ・デバイシズ・インコーポレーテッド
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    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M1/00—Analogue/digital conversion; Digital/analogue conversion
    • H03M1/12—Analogue/digital converters
    • H03M1/124—Sampling or signal conditioning arrangements specially adapted for A/D converters
    • H03M1/1245—Details of sampling arrangements or methods
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C27/00—Electric analogue stores, e.g. for storing instantaneous values
    • G11C27/02—Sample-and-hold arrangements
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M1/00—Analogue/digital conversion; Digital/analogue conversion
    • H03M1/06—Continuously compensating for, or preventing, undesired influence of physical parameters
    • H03M1/08—Continuously compensating for, or preventing, undesired influence of physical parameters of noise
    • H03M1/0836—Continuously compensating for, or preventing, undesired influence of physical parameters of noise of phase error, e.g. jitter
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C27/00—Electric analogue stores, e.g. for storing instantaneous values
    • G11C27/02—Sample-and-hold arrangements
    • G11C27/024—Sample-and-hold arrangements using a capacitive memory element
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K17/00—Electronic switching or gating, i.e. not by contact-making and –breaking
    • H03K17/04—Modifications for accelerating switching
    • H03K17/041—Modifications for accelerating switching without feedback from the output circuit to the control circuit
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M1/00—Analogue/digital conversion; Digital/analogue conversion
    • H03M1/12—Analogue/digital converters
    • H03M1/1205—Multiplexed conversion systems
    • H03M1/121—Interleaved, i.e. using multiple converters or converter parts for one channel
    • H03M1/1215—Interleaved, i.e. using multiple converters or converter parts for one channel using time-division multiplexing

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Analogue/Digital Conversion (AREA)
  • Electronic Switches (AREA)
  • Amplifiers (AREA)
JP2014045581A 2013-03-07 2014-03-07 サンプリング回路のタイミング不整合を減少させるための装置および方法 Active JP5759581B2 (ja)

Applications Claiming Priority (4)

Application Number Priority Date Filing Date Title
US201361774432P 2013-03-07 2013-03-07
US61/774,432 2013-03-07
US13/975,291 US8866652B2 (en) 2013-03-07 2013-08-24 Apparatus and method for reducing sampling circuit timing mismatch
US13/975,291 2013-08-24

Publications (3)

Publication Number Publication Date
JP2014176096A JP2014176096A (ja) 2014-09-22
JP2014176096A5 JP2014176096A5 (enExample) 2014-12-11
JP5759581B2 true JP5759581B2 (ja) 2015-08-05

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JP2014045581A Active JP5759581B2 (ja) 2013-03-07 2014-03-07 サンプリング回路のタイミング不整合を減少させるための装置および方法

Country Status (4)

Country Link
US (1) US8866652B2 (enExample)
EP (1) EP2775481B1 (enExample)
JP (1) JP5759581B2 (enExample)
CN (1) CN104038219B (enExample)

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Also Published As

Publication number Publication date
CN104038219A (zh) 2014-09-10
EP2775481B1 (en) 2016-05-04
US8866652B2 (en) 2014-10-21
EP2775481A3 (en) 2015-03-18
EP2775481A2 (en) 2014-09-10
CN104038219B (zh) 2017-10-27
JP2014176096A (ja) 2014-09-22
US20140253353A1 (en) 2014-09-11

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