JP5677115B2 - 半導体装置 - Google Patents
半導体装置 Download PDFInfo
- Publication number
- JP5677115B2 JP5677115B2 JP2011024241A JP2011024241A JP5677115B2 JP 5677115 B2 JP5677115 B2 JP 5677115B2 JP 2011024241 A JP2011024241 A JP 2011024241A JP 2011024241 A JP2011024241 A JP 2011024241A JP 5677115 B2 JP5677115 B2 JP 5677115B2
- Authority
- JP
- Japan
- Prior art keywords
- metal film
- film
- semiconductor device
- modulus
- young
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/02—Bonding areas ; Manufacturing methods related thereto
- H01L24/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L24/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/0212—Auxiliary members for bonding areas, e.g. spacers
- H01L2224/02122—Auxiliary members for bonding areas, e.g. spacers being formed on the semiconductor or solid-state body
- H01L2224/02163—Auxiliary members for bonding areas, e.g. spacers being formed on the semiconductor or solid-state body on the bonding area
- H01L2224/02165—Reinforcing structures
- H01L2224/02166—Collar structures
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/04042—Bonding areas specifically adapted for wire connectors, e.g. wirebond pads
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
- H01L2224/05001—Internal layers
- H01L2224/05075—Plural internal layers
- H01L2224/0508—Plural internal layers being stacked
- H01L2224/05082—Two-layer arrangements
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- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
- H01L2224/05001—Internal layers
- H01L2224/05099—Material
- H01L2224/051—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
- H01L2224/05117—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 400°C and less than 950°C
- H01L2224/05124—Aluminium [Al] as principal constituent
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
- H01L2224/05001—Internal layers
- H01L2224/05099—Material
- H01L2224/051—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
- H01L2224/05138—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
- H01L2224/05147—Copper [Cu] as principal constituent
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
- H01L2224/05001—Internal layers
- H01L2224/05099—Material
- H01L2224/051—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
- H01L2224/05163—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than 1550°C
- H01L2224/05184—Tungsten [W] as principal constituent
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
- H01L2224/0554—External layer
- H01L2224/05599—Material
- H01L2224/056—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
- H01L2224/05617—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 400°C and less than 950°C
- H01L2224/05624—Aluminium [Al] as principal constituent
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01013—Aluminum [Al]
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01029—Copper [Cu]
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01033—Arsenic [As]
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01074—Tungsten [W]
Landscapes
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
- Wire Bonding (AREA)
Priority Applications (5)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2011024241A JP5677115B2 (ja) | 2011-02-07 | 2011-02-07 | 半導体装置 |
| US13/362,678 US20120199977A1 (en) | 2011-02-07 | 2012-01-31 | Semiconductor device |
| KR1020120011285A KR101903188B1 (ko) | 2011-02-07 | 2012-02-03 | 반도체 장치 |
| TW101103779A TW201304011A (zh) | 2011-02-07 | 2012-02-06 | 半導體裝置 |
| CN201210026493.7A CN102629568B (zh) | 2011-02-07 | 2012-02-07 | 半导体装置 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2011024241A JP5677115B2 (ja) | 2011-02-07 | 2011-02-07 | 半導体装置 |
Publications (3)
| Publication Number | Publication Date |
|---|---|
| JP2012164825A JP2012164825A (ja) | 2012-08-30 |
| JP2012164825A5 JP2012164825A5 (enExample) | 2014-01-30 |
| JP5677115B2 true JP5677115B2 (ja) | 2015-02-25 |
Family
ID=46587796
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2011024241A Expired - Fee Related JP5677115B2 (ja) | 2011-02-07 | 2011-02-07 | 半導体装置 |
Country Status (5)
| Country | Link |
|---|---|
| US (1) | US20120199977A1 (enExample) |
| JP (1) | JP5677115B2 (enExample) |
| KR (1) | KR101903188B1 (enExample) |
| CN (1) | CN102629568B (enExample) |
| TW (1) | TW201304011A (enExample) |
Families Citing this family (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP5772926B2 (ja) * | 2013-01-07 | 2015-09-02 | 株式会社デンソー | 半導体装置 |
| JP2016143804A (ja) * | 2015-02-03 | 2016-08-08 | トヨタ自動車株式会社 | 半導体装置 |
| JP2017224753A (ja) * | 2016-06-16 | 2017-12-21 | セイコーエプソン株式会社 | 半導体装置及びその製造方法 |
| JP6897141B2 (ja) | 2017-02-15 | 2021-06-30 | 株式会社デンソー | 半導体装置とその製造方法 |
| JP2018186144A (ja) | 2017-04-25 | 2018-11-22 | 株式会社村田製作所 | 半導体装置及びパワーアンプモジュール |
Family Cites Families (11)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH09330928A (ja) * | 1996-06-13 | 1997-12-22 | Toshiba Corp | 配線層の形成方法 |
| JP2005019493A (ja) * | 2003-06-24 | 2005-01-20 | Renesas Technology Corp | 半導体装置 |
| US6960836B2 (en) * | 2003-09-30 | 2005-11-01 | Agere Systems, Inc. | Reinforced bond pad |
| US20050215048A1 (en) * | 2004-03-23 | 2005-09-29 | Lei Li | Structure and method for contact pads having an overcoat-protected bondable metal plug over copper-metallized integrated circuits |
| US7741714B2 (en) * | 2004-11-02 | 2010-06-22 | Taiwan Semiconductor Manufacturing Co., Ltd. | Bond pad structure with stress-buffering layer capping interconnection metal layer |
| US7656045B2 (en) * | 2006-02-23 | 2010-02-02 | Freescale Semiconductor, Inc. | Cap layer for an aluminum copper bond pad |
| TWI316295B (en) * | 2006-05-17 | 2009-10-21 | Au Optronics Corp | Thin film transistor |
| JP2009016619A (ja) * | 2007-07-05 | 2009-01-22 | Denso Corp | 半導体装置及びその製造方法 |
| US8178980B2 (en) * | 2008-02-05 | 2012-05-15 | Taiwan Semiconductor Manufacturing Company, Ltd. | Bond pad structure |
| US8030780B2 (en) * | 2008-10-16 | 2011-10-04 | Micron Technology, Inc. | Semiconductor substrates with unitary vias and via terminals, and associated systems and methods |
| US8202741B2 (en) * | 2009-03-04 | 2012-06-19 | Koninklijke Philips Electronics N.V. | Method of bonding a semiconductor device using a compliant bonding structure |
-
2011
- 2011-02-07 JP JP2011024241A patent/JP5677115B2/ja not_active Expired - Fee Related
-
2012
- 2012-01-31 US US13/362,678 patent/US20120199977A1/en not_active Abandoned
- 2012-02-03 KR KR1020120011285A patent/KR101903188B1/ko not_active Expired - Fee Related
- 2012-02-06 TW TW101103779A patent/TW201304011A/zh unknown
- 2012-02-07 CN CN201210026493.7A patent/CN102629568B/zh not_active Expired - Fee Related
Also Published As
| Publication number | Publication date |
|---|---|
| US20120199977A1 (en) | 2012-08-09 |
| TW201304011A (zh) | 2013-01-16 |
| KR20120090827A (ko) | 2012-08-17 |
| JP2012164825A (ja) | 2012-08-30 |
| CN102629568B (zh) | 2016-05-04 |
| KR101903188B1 (ko) | 2018-10-01 |
| CN102629568A (zh) | 2012-08-08 |
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