JP5662108B2 - 半導体装置 - Google Patents
半導体装置 Download PDFInfo
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- JP5662108B2 JP5662108B2 JP2010248113A JP2010248113A JP5662108B2 JP 5662108 B2 JP5662108 B2 JP 5662108B2 JP 2010248113 A JP2010248113 A JP 2010248113A JP 2010248113 A JP2010248113 A JP 2010248113A JP 5662108 B2 JP5662108 B2 JP 5662108B2
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- 239000004065 semiconductor Substances 0.000 title claims description 62
- 238000002955 isolation Methods 0.000 claims description 113
- 239000000758 substrate Substances 0.000 claims description 51
- 239000010410 layer Substances 0.000 description 379
- 230000003071 parasitic effect Effects 0.000 description 41
- 238000000034 method Methods 0.000 description 14
- 238000000926 separation method Methods 0.000 description 10
- 230000015556 catabolic process Effects 0.000 description 8
- 238000004519 manufacturing process Methods 0.000 description 8
- ZOXJGFHDIHLPTG-UHFFFAOYSA-N Boron Chemical compound [B] ZOXJGFHDIHLPTG-UHFFFAOYSA-N 0.000 description 6
- 229910052796 boron Inorganic materials 0.000 description 6
- 238000000151 deposition Methods 0.000 description 6
- 230000008021 deposition Effects 0.000 description 6
- 230000001172 regenerating effect Effects 0.000 description 6
- 239000012535 impurity Substances 0.000 description 5
- 238000005468 ion implantation Methods 0.000 description 5
- 229910052785 arsenic Inorganic materials 0.000 description 4
- RQNWIZPPADIBDY-UHFFFAOYSA-N arsenic atom Chemical compound [As] RQNWIZPPADIBDY-UHFFFAOYSA-N 0.000 description 4
- 238000009792 diffusion process Methods 0.000 description 4
- 239000011229 interlayer Substances 0.000 description 4
- OAICVXFJPJFONN-UHFFFAOYSA-N Phosphorus Chemical compound [P] OAICVXFJPJFONN-UHFFFAOYSA-N 0.000 description 3
- 230000003321 amplification Effects 0.000 description 3
- 230000000694 effects Effects 0.000 description 3
- 230000007257 malfunction Effects 0.000 description 3
- 238000003199 nucleic acid amplification method Methods 0.000 description 3
- 229910052698 phosphorus Inorganic materials 0.000 description 3
- 239000011574 phosphorus Substances 0.000 description 3
- 238000001259 photo etching Methods 0.000 description 3
- 230000002411 adverse Effects 0.000 description 2
- 229910052782 aluminium Inorganic materials 0.000 description 2
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 2
- 229910052787 antimony Inorganic materials 0.000 description 2
- WATWJIUSRGPENY-UHFFFAOYSA-N antimony atom Chemical compound [Sb] WATWJIUSRGPENY-UHFFFAOYSA-N 0.000 description 2
- 230000008878 coupling Effects 0.000 description 2
- 238000010168 coupling process Methods 0.000 description 2
- 238000005859 coupling reaction Methods 0.000 description 2
- 230000005684 electric field Effects 0.000 description 2
- 230000005611 electricity Effects 0.000 description 2
- 239000002784 hot electron Substances 0.000 description 2
- 238000004544 sputter deposition Methods 0.000 description 2
- 230000003068 static effect Effects 0.000 description 2
- 229910052581 Si3N4 Inorganic materials 0.000 description 1
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 1
- 239000008186 active pharmaceutical agent Substances 0.000 description 1
- 230000015572 biosynthetic process Effects 0.000 description 1
- 238000005229 chemical vapour deposition Methods 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- 238000009826 distribution Methods 0.000 description 1
- 229910052751 metal Inorganic materials 0.000 description 1
- 239000002184 metal Substances 0.000 description 1
- 229910044991 metal oxide Inorganic materials 0.000 description 1
- 150000004706 metal oxides Chemical class 0.000 description 1
- 238000002161 passivation Methods 0.000 description 1
- 230000000630 rising effect Effects 0.000 description 1
- 229910021332 silicide Inorganic materials 0.000 description 1
- FVBUAEGBCNSCDD-UHFFFAOYSA-N silicide(4-) Chemical compound [Si-4] FVBUAEGBCNSCDD-UHFFFAOYSA-N 0.000 description 1
- 229910052710 silicon Inorganic materials 0.000 description 1
- 239000010703 silicon Substances 0.000 description 1
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 description 1
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- H01L29/1079—Substrate region of field-effect devices of field-effect transistors with insulated gate
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- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
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- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/7801—DMOS transistors, i.e. MISFETs with a channel accommodating body or base region adjoining a drain drift region
- H01L29/7816—Lateral DMOS transistors, i.e. LDMOS transistors
- H01L29/7823—Lateral DMOS transistors, i.e. LDMOS transistors with an edge termination structure
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- H01L29/7833—Field effect transistors with field effect produced by an insulated gate with lightly doped drain or source extension, e.g. LDD MOSFET's; DDD MOSFET's
- H01L29/7835—Field effect transistors with field effect produced by an insulated gate with lightly doped drain or source extension, e.g. LDD MOSFET's; DDD MOSFET's with asymmetrical source and drain regions, e.g. lateral high-voltage MISFETs with drain offset region, extended drain MISFETs
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- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
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- H01L29/0843—Source or drain regions of field-effect devices
- H01L29/0847—Source or drain regions of field-effect devices of field-effect transistors with insulated gate
- H01L29/0852—Source or drain regions of field-effect devices of field-effect transistors with insulated gate of DMOS transistors
- H01L29/0873—Drain regions
- H01L29/0878—Impurity concentration or distribution
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- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
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- H01L29/1095—Body region, i.e. base region, of DMOS transistors or IGBTs
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- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Insulated Gate Type Field-Effect Transistor (AREA)
- Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
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Description
本実施形態に係るドレイン分離型LDMOSトランジスタについて、従来構成のドレイン分離型LDMOSトランジスタと比較しつつ、図1から図5に基づいて以下に説明する。
なお、本実施形態に係るドレイン分離型LDMOSトランジスタは、図1等に示すように、N+型ドレイン13等からなるドレイン領域を中心に、左右対称にN+型ソース層12等からなるソース領域等が構成されている。
〔第2の実施形態〕
本実施形態について図9に基づいて以下に説明する。本実施形態は、通常型LDMOSトランジスタの回生電流等の減少を図るもので、同図はその断面構造を示すものである。図1に示すドレイン分離型LDMOSトランジスタの断面構造からP型ドレイン分離層6、P+型ドレイン分離コンタクト層14dを削除したもので、図1と同様の部分は同一記号、数字で表示している。
第1の実施形態と同様である。
〔第3の実施形態〕
本実施形態について図10に基づいて以下に説明する。本実施形態も第2の実施形態の場合と同様、通常型LDMOSトランジスタに掛かるものである。同図はその断面構造を示すものである。第2の実施形態との違いは、第2の実施形態がNチャネル型の通常型LDMOSトランジスタであるのに対して本実施形態はPチャネル型の通常型LDMOSトランジスタに適用していることである。
3a P+型素子分離デポ層 4 P+型埋め込み層 5 N型エピタキシャル層
5a N型層 5b N型層 6 P型ドレイン分離層 7 P型コレクタ層 8 N型ドリフト層 9 P型ボディ層 10 ゲート絶縁膜
11 ゲート電極 12 N+型ソース層 13 N+型ドレイン層
14a P+型コンタクト層 14b P+型コレクタ層 14c P+型分離層 14d P+型ドレイン分離層 15 N+型ガードリング層 16 層間絶縁膜 17 ドレイン電極 18 ソース電極 19 コレクタ電極 20 分離電極 A1、A2 電流計 IG 電流源 VDD、DD 電源ライン
8a P型ドリフト層 9a N型ボディ層 12a P+型ソース層
13a P+型ドレイン層 14e N+型コンタクト層 17a ソース電極 18a ドレイン電極 19a コレクタ電極
Claims (7)
- 第1導電型の半導体基板と、
前記半導体基板上に形成された第2導電型のエピタキシャル層と、
前記半導体基板と前記エピタキシャル層の境界領域に形成された第2導電型の埋め込み層と、
前記エピタキシャル層の中に形成された第1導電型の素子分離層と、
前記素子分離層で囲まれた前記エピタキシャル層の表面に形成された第2導電型のドリフト層と、
前記ドリフト層の表面に形成された第2導電型のドレイン層と、
前記エピタキシャル層の中に、前記ドリフト層及び前記ドレイン層を囲んで形成された第1導電型のドレイン分離層と、
前記ドレイン分離層と前記素子分離層の間の前記エピタキシャル層の中に形成された第1導電型のコレクタ層と、
前記エピタキシャル層の表面に前記コレクタ層を取り囲んで形成された第2導電型のガードリング層と、
前記エピタキシャル層の表面に形成された第1導電型のボディ層と、
前記ボディ層の表面に形成された第2導電型のソース層と、
前記エピタキシャル層の表面に形成されたゲート絶縁膜と、
前記ゲート絶縁膜上に形成されたゲート電極と、を具備することを特徴とする半導体装置。 - 第1導電型の半導体基板と、
前記半導体基板上に形成された第2導電型のエピタキシャル層と、
前記半導体基板と前記エピタキシャル層の境界領域に形成された第2導電型の埋め込み層と、
前記エピタキシャル層の中に形成された第1導電型の素子分離層と、
前記素子分離層で囲まれた前記エピタキシャル層の表面に形成された第2導電型のドリフト層と、
前記ドリフト層の表面に形成された第2導電型のドレイン層と、
前記ドリフト層と前記素子分離層の間の前記エピタキシャル層の中に形成された第1導電型のコレクタ層と、
前記エピタキシャル層の表面に前記コレクタ層を取り囲んで形成された第2導電型のガードリング層と、
前記エピタキシャル層の表面に形成された第1導電型のボディ層と、
前記ボディ層の表面に形成された第2導電型のソース層と、
前記エピタキシャル層の表面に形成されたゲート絶縁膜と、
前記ゲート絶縁膜上に形成されたゲート電極と、を具備することを特徴とする半導体装置。 - 第1導電型の半導体基板と、
前記半導体基板上に形成された第2導電型のエピタキシャル層と、
前記半導体基板と前記エピタキシャル層の境界領域に形成された第2導電型の埋め込み層と、
前記エピタキシャル層の中に形成された第1導電型の素子分離層と、
前記素子分離層で囲まれた前記エピタキシャル層の表面に形成された第1導電型のドリフト層と、
前記ドリフト層の表面に形成された第1導電型のドレイン層と、
前記ドリフト層と前記素子分離層の間の前記エピタキシャル層の中に形成された第1導電型のコレクタ層と、
前記エピタキシャル層の表面に前記コレクタ層を取り囲んで形成された第2導電型のガードリング層と、
前記エピタキシャル層の表面に形成された第2導電型のボディ層と、
前記ボディ層の表面に形成された第1導電型のソース層と、
前記エピタキシャル層の表面に形成されたゲート絶縁膜と、
前記ゲート絶縁膜上に形成されたゲート電極と、を具備することを特徴とする半導体装置。 - 前記コレクタ層は、前記エピタキシャル層の表面から前記エピタキシャル層の厚さより浅く形成されていることを特徴とする請求項1乃至3のいずれかに記載の半導体装置。
- 前記ソース層、前記コレクタ層、前記素子分離層及び前記半導体基板は接地電位に固定されることを特徴とする請求項1、4のいずれかに記載の半導体装置。
- 前記ドレイン層、前記コレクタ層は電源電位に、及び前記半導体基板は接地電位に固定されることを特徴とする請求項2、4のいずれかに記載の半導体装置。
- 前記ソース層、前記コレクタ層は電源電位に、及び前記半導体基板は接地電位に固定されることを特徴とする請求項3、4のいずれかに記載の半導体装置。
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JP2010248113A JP5662108B2 (ja) | 2010-11-05 | 2010-11-05 | 半導体装置 |
US13/286,832 US8916931B2 (en) | 2010-11-05 | 2011-11-01 | LDMOS semiconductor device with parasitic bipolar transistor for reduced surge current |
TW100140078A TW201232708A (en) | 2010-11-05 | 2011-11-03 | Semiconductor device |
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JP2010248113A JP5662108B2 (ja) | 2010-11-05 | 2010-11-05 | 半導体装置 |
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JP5662108B2 true JP5662108B2 (ja) | 2015-01-28 |
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Families Citing this family (13)
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US9455338B1 (en) * | 2012-12-14 | 2016-09-27 | Altera Corporation | Methods for fabricating PNP bipolar junction transistors |
JP2014170831A (ja) * | 2013-03-04 | 2014-09-18 | Seiko Epson Corp | 回路装置及び電子機器 |
JP6123516B2 (ja) * | 2013-06-28 | 2017-05-10 | 株式会社ソシオネクスト | 半導体装置 |
JP6281897B2 (ja) * | 2013-10-30 | 2018-02-21 | ルネサスエレクトロニクス株式会社 | 半導体装置 |
JP6296535B2 (ja) * | 2013-12-09 | 2018-03-20 | ローム株式会社 | ダイオードおよびそれを含む信号出力回路 |
CN105206683B (zh) * | 2015-10-15 | 2018-07-10 | 苏州汉克山姆照明科技有限公司 | 一种恒流二极管结构 |
KR102495452B1 (ko) | 2016-06-29 | 2023-02-02 | 삼성전자주식회사 | 반도체 장치 |
CN106169506B (zh) * | 2016-08-01 | 2019-04-09 | 上海华虹宏力半导体制造有限公司 | Ddd mos器件结构及其制造方法 |
US9991379B1 (en) * | 2016-11-17 | 2018-06-05 | Sanken Electric Co., Ltd. | Semiconductor device with a gate insulating film formed on an inner wall of a trench, and method of manufacturing the same |
JP2017139503A (ja) * | 2017-05-18 | 2017-08-10 | セイコーエプソン株式会社 | 回路装置及び電子機器 |
KR102227666B1 (ko) * | 2017-05-31 | 2021-03-12 | 주식회사 키 파운드리 | 고전압 반도체 소자 |
US10164091B1 (en) * | 2017-08-02 | 2018-12-25 | Semiconductor Components Industries, Llc | Electronic device including a ring suppression structure |
JP7227117B2 (ja) * | 2019-11-08 | 2023-02-21 | 株式会社東芝 | 半導体装置 |
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US6765247B2 (en) | 2001-10-12 | 2004-07-20 | Intersil Americas, Inc. | Integrated circuit with a MOS structure having reduced parasitic bipolar transistor action |
JP4267231B2 (ja) * | 2001-12-27 | 2009-05-27 | 株式会社ルネサステクノロジ | 半導体装置及びその製造方法 |
JP4228586B2 (ja) * | 2002-05-21 | 2009-02-25 | 富士電機デバイステクノロジー株式会社 | 半導体装置 |
US6747294B1 (en) * | 2002-09-25 | 2004-06-08 | Polarfab Llc | Guard ring structure for reducing crosstalk and latch-up in integrated circuits |
JP2004247400A (ja) * | 2003-02-12 | 2004-09-02 | Renesas Technology Corp | 半導体装置 |
JP2006237224A (ja) * | 2005-02-24 | 2006-09-07 | Sanyo Electric Co Ltd | 半導体装置 |
JP4845410B2 (ja) * | 2005-03-31 | 2011-12-28 | 株式会社リコー | 半導体装置 |
JP5108250B2 (ja) * | 2006-04-24 | 2012-12-26 | オンセミコンダクター・トレーディング・リミテッド | 半導体装置及びその製造方法 |
KR101530582B1 (ko) * | 2008-12-04 | 2015-06-26 | 주식회사 동부하이텍 | 반도체 소자 및 이의 제조 방법 |
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JP2012099749A (ja) | 2012-05-24 |
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