JP5578466B2 - 銅配線、銅配線の形成方法および半導体装置 - Google Patents
銅配線、銅配線の形成方法および半導体装置 Download PDFInfo
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- H01L21/76829—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing characterised by the formation of thin functional dielectric layers, e.g. dielectric etch-stop, barrier, capping or liner layers
- H01L21/76831—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing characterised by the formation of thin functional dielectric layers, e.g. dielectric etch-stop, barrier, capping or liner layers in via holes or trenches, e.g. non-conductive sidewall liners
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- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
- H01L21/76841—Barrier, adhesion or liner layers
- H01L21/76843—Barrier, adhesion or liner layers formed in openings in a dielectric
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- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
- H01L21/76841—Barrier, adhesion or liner layers
- H01L21/76843—Barrier, adhesion or liner layers formed in openings in a dielectric
- H01L21/76849—Barrier, adhesion or liner layers formed in openings in a dielectric the layer being positioned on top of the main fill metal
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- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
- H01L21/76841—Barrier, adhesion or liner layers
- H01L21/76867—Barrier, adhesion or liner layers characterized by methods of formation other than PVD, CVD or deposition from a liquids
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- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
- H01L21/76841—Barrier, adhesion or liner layers
- H01L21/76871—Layers specifically deposited to enhance or enable the nucleation of further layers, i.e. seed layers
- H01L21/76873—Layers specifically deposited to enhance or enable the nucleation of further layers, i.e. seed layers for electroplating
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- H01L23/522—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
- H01L23/532—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body characterised by the materials
- H01L23/53204—Conductive materials
- H01L23/53209—Conductive materials based on metals, e.g. alloys, metal silicides
- H01L23/53228—Conductive materials based on metals, e.g. alloys, metal silicides the principal metal being copper
- H01L23/53238—Additional layers associated with copper layers, e.g. adhesion, barrier, cladding layers
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- H01L2221/1068—Formation and after-treatment of conductors
- H01L2221/1073—Barrier, adhesion or liner layers
- H01L2221/1084—Layers specifically deposited to enhance or enable the nucleation of further layers, i.e. seed layers
- H01L2221/1089—Stacks of seed layers
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- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/11—Device type
- H01L2924/12—Passive devices, e.g. 2 terminal devices
- H01L2924/1204—Optical Diode
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- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
Description
DMn=1.02exp(−200000/RT) ・・・(式1)
で与えられる。
D0 =1.20×10-2exp(−67000/RT)・・・(式2)
で与えられる。
Nsol.=26(PO2)1/2exp(−126000/RT)・・・(式3)
この第1の実施形態の実施例を、マンガンを含む銅合金被膜を素材として形成したバリア層を備えたダマシン構造型の銅配線を例にして、図4および図5を用いて詳細に説明する。
3 電気絶縁層
4 開口部
5 銅合金被膜
6 銅埋め込み層
6s 銅埋め込み層の開放表面
7,70 バリア層
7a,70a 第1バリア層
7b,70b 第2バリア層
7s,70s 第2バリア層の表面
8 配線本体
81 配線本体の外周
8a 第1外周
8b 第2外周
11 銅配線
13 電気絶縁層
15 銅合金被膜
15s 銅合金被膜の側面の開放表面
17 バリア層
17a 第1バリア層
17b 第2バリア層
17s 第2バリア層の表面
18 配線本体
18a 第1外周
18b 第2外周
181 配線本体の外周
19 基体
30 層間絶縁層
40 配線溝(開口部)
50 Cu・Mn合金膜(銅合金被膜)
50a Cu・Mn合金膜と層間絶縁層との界面
60 Cu埋め込み層
60s Cu埋め込み層の開放表面
70 バリア層
70a 第1バリア層
70b 第2バリア層
70s 第2バリア層の表面
80 配線本体
100 銅配線
Claims (8)
- 電気絶縁層に銅からなる配線本体を備えてなる銅配線において、
上記配線本体の外周のうち電気絶縁層に対向している第1の外周と、当該電気絶縁層との間に形成された第1のバリア層と、
上記配線本体の外周のうち電気絶縁層に対向していない第2の外周に接して形成された第2のバリア層と、を備え、
上記第1および第2のバリア層はそれぞれ、マンガンを含む酸化物層からなるとともに、各バリア層内の厚さ方向でマンガンの原子濃度が極大となる位置を有し、
上記第2バリア層の厚みが上記第1バリア層の厚みより厚い、
ことを特徴とする銅配線。 - 上記電気絶縁層は、炭化酸化珪素、窒化酸化珪素、弗化酸化珪素のいずれかの硅素酸化物、又は、酸化タンタル、酸化チタン、酸化ハフニウム、酸化ジルコニウムのいずれかの金属酸化物からなる、請求項1に記載の銅配線。
- 上記第2のバリア層は、マンガンの原子濃度が極大となる位置近傍で酸素の原子濃度も極大となる、請求項1または2に記載の銅配線。
- 上記第2のバリア層内のマンガンの極大の原子濃度は、第1のバリア層内に存在するマンガンの原子濃度より大である、請求項1乃至3の何れか1項に記載の銅配線。
- 上記第2のバリア層の酸素は、当該第2のバリア層内の厚さ方向で、酸素の原子濃度が極大となる位置を中心にして対称的に分布し、
上記第2のバリア層内のマンガンは、当該第2のバリア層内の厚さ方向で、マンガンの原子濃度が極大となる位置を中心にして対称的に分布している、請求項3または4に記載の銅配線。 - 電気絶縁層に銅配線を回路配線として備えた半導体装置において、
上記銅配線が請求項1乃至5の何れか1項に記載の銅配線である、
ことを特徴とする半導体装置。 - 電気絶縁層に銅からなる配線本体を備えてなる銅配線を形成する銅配線の形成方法において、
上記電気絶縁層に溝状の開口部を設ける工程と、
上記開口部の内周面に、原子濃度が1.0原子%以上で25原子%以下のマンガンを含む銅合金被膜を形成する工程と、
上記銅合金被膜が形成された開口部に銅を埋め込み銅埋め込み層を形成する工程と、
所定条件下での熱処理により、銅合金被膜中のマンガンを電気絶縁層側および銅埋め込み層の外周のうち電気絶縁層が対向していない開放表面側に拡散させ、電気絶縁層側および銅埋め込み層の開放表面側にそれぞれマンガンを含む酸化物からなるバリア層を、電気絶縁層側のバリア層よりも銅埋め込み層の開放表面側のバリア層の厚みを厚くして形成するとともに、これらのバリア層で囲まれた内方を銅からなる配線本体として銅配線を形成する工程と、を有する、
ことを特徴とする銅配線の形成方法。 - 電気絶縁層に銅からなる配線本体を備えてなる銅配線を形成する銅配線の形成方法において、
電気絶縁層上に、原子濃度が1.0原子%以上で25原子%以下のマンガンを含む銅合金被膜を形成する工程と、
上記銅合金被膜の所定条件下での熱処理により、銅合金被膜中のマンガンを電気絶縁層側および当該銅合金被膜の電気絶縁層に接していない開放表面側に拡散させ、電気絶縁層側および電気絶縁層に接していない開放表面側にそれぞれマンガンを含む酸化物からなるバリア層を、電気絶縁層側のバリア層よりも銅埋め込み層の開放表面側のバリア層の厚みを厚くして形成するとともに、これらのバリア層で囲まれた内方を銅からなる配線本体として銅配線を形成する工程と、を有する、
ことを特徴とする銅配線の形成方法。
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JP5010265B2 (ja) | 2006-12-18 | 2012-08-29 | 株式会社東芝 | 半導体装置の製造方法 |
JP2008170744A (ja) | 2007-01-12 | 2008-07-24 | Tohoku Univ | 液晶表示装置及びその製造方法 |
JP4423379B2 (ja) * | 2008-03-25 | 2010-03-03 | 合同会社先端配線材料研究所 | 銅配線、半導体装置および銅配線の形成方法 |
JP4441658B1 (ja) * | 2008-12-19 | 2010-03-31 | 国立大学法人東北大学 | 銅配線形成方法、銅配線および半導体装置 |
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