JP5548356B2 - 半導体装置の作製方法 - Google Patents

半導体装置の作製方法 Download PDF

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Publication number
JP5548356B2
JP5548356B2 JP2008280708A JP2008280708A JP5548356B2 JP 5548356 B2 JP5548356 B2 JP 5548356B2 JP 2008280708 A JP2008280708 A JP 2008280708A JP 2008280708 A JP2008280708 A JP 2008280708A JP 5548356 B2 JP5548356 B2 JP 5548356B2
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layer
semiconductor
substrate
region
single crystal
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JP2008280708A
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Japanese (ja)
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JP2009135472A (ja
JP2009135472A5 (enExample
Inventor
舜平 山崎
康行 荒井
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Semiconductor Energy Laboratory Co Ltd
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Semiconductor Energy Laboratory Co Ltd
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Priority to JP2008280708A priority Critical patent/JP5548356B2/ja
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76—Making of isolation regions between components
    • H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
    • H01L21/7624—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology
    • H01L21/76251—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology using bonding techniques
    • H01L21/76254—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology using bonding techniques with separation/delamination along an ion implanted layer, e.g. Smart-cut, Unibond
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D86/00—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
    • H10D86/01—Manufacture or treatment
    • H10D86/021—Manufacture or treatment of multiple TFTs
    • H10D86/0214—Manufacture or treatment of multiple TFTs using temporary substrates

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Thin Film Transistor (AREA)
  • Liquid Crystal (AREA)
  • Recrystallisation Techniques (AREA)
  • Electroluminescent Light Sources (AREA)
JP2008280708A 2007-11-05 2008-10-31 半導体装置の作製方法 Expired - Fee Related JP5548356B2 (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2008280708A JP5548356B2 (ja) 2007-11-05 2008-10-31 半導体装置の作製方法

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
JP2007286977 2007-11-05
JP2007286977 2007-11-05
JP2008280708A JP5548356B2 (ja) 2007-11-05 2008-10-31 半導体装置の作製方法

Publications (3)

Publication Number Publication Date
JP2009135472A JP2009135472A (ja) 2009-06-18
JP2009135472A5 JP2009135472A5 (enExample) 2011-10-06
JP5548356B2 true JP5548356B2 (ja) 2014-07-16

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Family Applications (1)

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JP2008280708A Expired - Fee Related JP5548356B2 (ja) 2007-11-05 2008-10-31 半導体装置の作製方法

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US (1) US7816234B2 (enExample)
JP (1) JP5548356B2 (enExample)
KR (1) KR101523569B1 (enExample)

Families Citing this family (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP5548356B2 (ja) * 2007-11-05 2014-07-16 株式会社半導体エネルギー研究所 半導体装置の作製方法
US20100081251A1 (en) * 2008-09-29 2010-04-01 Semiconductor Energy Laboratory Co., Ltd. Method for manufacturing soi substrate
US8021960B2 (en) * 2009-10-06 2011-09-20 Semiconductor Energy Laboratory Co., Ltd. Method for manufacturing semiconductor device
US20120021588A1 (en) * 2010-07-23 2012-01-26 Semiconductor Energy Laboratory Co., Ltd. Method for manufacturing soi substrate and semiconductor device
US8440544B2 (en) 2010-10-06 2013-05-14 International Business Machines Corporation CMOS structure and method of manufacture
US20130280859A1 (en) * 2010-12-30 2013-10-24 Jae-ho Kim Thin-film transistor and method for manufacturing same
KR20130116099A (ko) * 2012-04-13 2013-10-23 삼성전자주식회사 반도체 장치 및 그 제조 방법
US20200352028A1 (en) * 2017-04-13 2020-11-05 Nitride Solutions Inc. Device for thermal conduction and electrical isolation
JP6597922B1 (ja) * 2018-03-08 2019-10-30 Ｔｏｔｏ株式会社 複合構造物および複合構造物を備えた半導体製造装置並びにディスプレイ製造装置
CN109989111A (zh) * 2019-03-13 2019-07-09 电子科技大学 拼接式小尺寸单晶薄膜的制备方法、单晶薄膜及谐振器
KR102769138B1 (ko) * 2020-06-01 2025-02-19 삼성디스플레이 주식회사 표시 장치 및 전자 기기

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* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS60117613A (ja) * 1983-11-30 1985-06-25 Fujitsu Ltd 半導体装置の製造方法
JPS6461943A (en) * 1987-09-02 1989-03-08 Seiko Epson Corp Semiconductor device and manufacture thereof
FR2681472B1 (fr) 1991-09-18 1993-10-29 Commissariat Energie Atomique Procede de fabrication de films minces de materiau semiconducteur.
US5395481A (en) * 1993-10-18 1995-03-07 Regents Of The University Of California Method for forming silicon on a glass substrate
JP4103968B2 (ja) 1996-09-18 2008-06-18 株式会社半導体エネルギー研究所 絶縁ゲイト型半導体装置
JPH1197379A (ja) 1997-07-25 1999-04-09 Denso Corp 半導体基板及び半導体基板の製造方法
US6534380B1 (en) 1997-07-18 2003-03-18 Denso Corporation Semiconductor substrate and method of manufacturing the same
US6388652B1 (en) 1997-08-20 2002-05-14 Semiconductor Energy Laboratory Co., Ltd. Electrooptical device
US6686623B2 (en) 1997-11-18 2004-02-03 Semiconductor Energy Laboratory Co., Ltd. Nonvolatile memory and electronic apparatus
JPH11163363A (ja) 1997-11-22 1999-06-18 Semiconductor Energy Lab Co Ltd 半導体装置およびその作製方法
JP2000012864A (ja) * 1998-06-22 2000-01-14 Semiconductor Energy Lab Co Ltd 半導体装置の作製方法
US6271101B1 (en) 1998-07-29 2001-08-07 Semiconductor Energy Laboratory Co., Ltd. Process for production of SOI substrate and process for production of semiconductor device
JP4476390B2 (ja) 1998-09-04 2010-06-09 株式会社半導体エネルギー研究所 半導体装置の作製方法
JP2000124092A (ja) 1998-10-16 2000-04-28 Shin Etsu Handotai Co Ltd 水素イオン注入剥離法によってｓｏｉウエーハを製造する方法およびこの方法で製造されたｓｏｉウエーハ
JP4450126B2 (ja) * 2000-01-21 2010-04-14 日新電機株式会社 シリコン系結晶薄膜の形成方法
JP4507395B2 (ja) * 2000-11-30 2010-07-21 セイコーエプソン株式会社 電気光学装置用素子基板の製造方法
JP4653374B2 (ja) * 2001-08-23 2011-03-16 セイコーエプソン株式会社 電気光学装置の製造方法
US6764917B1 (en) * 2001-12-20 2004-07-20 Advanced Micro Devices, Inc. SOI device with different silicon thicknesses
JP4772258B2 (ja) 2002-08-23 2011-09-14 シャープ株式会社 Ｓｏｉ基板の製造方法
US7119365B2 (en) 2002-03-26 2006-10-10 Sharp Kabushiki Kaisha Semiconductor device and manufacturing method thereof, SOI substrate and display device using the same, and manufacturing method of the SOI substrate
US6818529B2 (en) 2002-09-12 2004-11-16 Applied Materials, Inc. Apparatus and method for forming a silicon film across the surface of a glass substrate
JP2004134675A (ja) * 2002-10-11 2004-04-30 Sharp Corp Ｓｏｉ基板、表示装置およびｓｏｉ基板の製造方法
JP5110772B2 (ja) 2004-02-03 2012-12-26 株式会社半導体エネルギー研究所 半導体薄膜層を有する基板の製造方法
EP1993127B1 (en) 2007-05-18 2013-04-24 Semiconductor Energy Laboratory Co., Ltd. Manufacturing method of SOI substrate
JP2009135430A (ja) 2007-10-10 2009-06-18 Semiconductor Energy Lab Co Ltd 半導体装置の作製方法
US7799658B2 (en) 2007-10-10 2010-09-21 Semiconductor Energy Laboratory Co., Ltd. Method for manufacturing semiconductor substrate and method for manufacturing semiconductor device
JP5548351B2 (ja) * 2007-11-01 2014-07-16 株式会社半導体エネルギー研究所 半導体装置の作製方法
JP5688203B2 (ja) * 2007-11-01 2015-03-25 株式会社半導体エネルギー研究所 半導体基板の作製方法
JP5548356B2 (ja) * 2007-11-05 2014-07-16 株式会社半導体エネルギー研究所 半導体装置の作製方法

Also Published As

Publication number Publication date
US7816234B2 (en) 2010-10-19
JP2009135472A (ja) 2009-06-18
US20090117704A1 (en) 2009-05-07
KR101523569B1 (ko) 2015-05-28
KR20090046734A (ko) 2009-05-11

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