JP5531099B2 - 不揮発性メモリセルの階層的クロスポイントアレイ - Google Patents

不揮発性メモリセルの階層的クロスポイントアレイ Download PDF

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Publication number
JP5531099B2
JP5531099B2 JP2012520685A JP2012520685A JP5531099B2 JP 5531099 B2 JP5531099 B2 JP 5531099B2 JP 2012520685 A JP2012520685 A JP 2012520685A JP 2012520685 A JP2012520685 A JP 2012520685A JP 5531099 B2 JP5531099 B2 JP 5531099B2
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block
memory cell
selection
global
control line
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Japanese (ja)
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JP2012533143A (ja
JP2012533143A5 (enExample
Inventor
ジュン，チュルミン
ルー，ヨン
ジン，インシク
キム，ヨンピル
リュウ，ハリー・ホンギュ
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Seagate Technology LLC
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Seagate Technology LLC
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    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B63/00—Resistance change memory devices, e.g. resistive RAM [ReRAM] devices
    • H10B63/80—Arrangements comprising multiple bistable or multi-stable switching components of the same type on a plane parallel to the substrate, e.g. cross-point arrays
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C13/00—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00
    • G11C13/0002—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00 using resistive RAM [RRAM] elements
    • G11C13/0021—Auxiliary circuits
    • G11C13/003—Cell access
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C13/00—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00
    • G11C13/0002—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00 using resistive RAM [RRAM] elements
    • G11C13/0021—Auxiliary circuits
    • G11C13/004—Reading or sensing circuits or methods
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/06—Auxiliary circuits, e.g. for writing into memory
    • G11C16/10—Programming or data input circuits
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B63/00—Resistance change memory devices, e.g. resistive RAM [ReRAM] devices
    • H10B63/20—Resistance change memory devices, e.g. resistive RAM [ReRAM] devices comprising selection components having two electrodes, e.g. diodes
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N70/00—Solid-state devices having no potential barriers, and specially adapted for rectifying, amplifying, oscillating or switching
    • H10N70/20—Multistable switching devices, e.g. memristors
    • H10N70/24—Multistable switching devices, e.g. memristors based on migration or redistribution of ionic species, e.g. anions, vacancies
    • H10N70/245—Multistable switching devices, e.g. memristors based on migration or redistribution of ionic species, e.g. anions, vacancies the species being metal cations, e.g. programmable metallization cells
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N70/00—Solid-state devices having no potential barriers, and specially adapted for rectifying, amplifying, oscillating or switching
    • H10N70/801—Constructional details of multistable switching devices
    • H10N70/821—Device geometry
    • H10N70/826—Device geometry adapted for essentially vertical current flow, e.g. sandwich or pillar type devices
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N70/00—Solid-state devices having no potential barriers, and specially adapted for rectifying, amplifying, oscillating or switching
    • H10N70/801—Constructional details of multistable switching devices
    • H10N70/821—Device geometry
    • H10N70/828—Current flow limiting means within the switching material region, e.g. constrictions
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N70/00—Solid-state devices having no potential barriers, and specially adapted for rectifying, amplifying, oscillating or switching
    • H10N70/801—Constructional details of multistable switching devices
    • H10N70/841—Electrodes
    • H10N70/8416—Electrodes adapted for supplying ionic species
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N70/00—Solid-state devices having no potential barriers, and specially adapted for rectifying, amplifying, oscillating or switching
    • H10N70/801—Constructional details of multistable switching devices
    • H10N70/881—Switching materials
    • H10N70/883—Oxides or nitrides
    • H10N70/8833—Binary metal oxides, e.g. TaOx
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N70/00—Solid-state devices having no potential barriers, and specially adapted for rectifying, amplifying, oscillating or switching
    • H10N70/801—Constructional details of multistable switching devices
    • H10N70/881—Switching materials
    • H10N70/883—Oxides or nitrides
    • H10N70/8836—Complex metal oxides, e.g. perovskites, spinels
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C13/00—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00
    • G11C13/0002—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00 using resistive RAM [RRAM] elements
    • G11C13/0021—Auxiliary circuits
    • G11C13/0069—Writing or programming circuits or methods
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C2213/00—Indexing scheme relating to G11C13/00 for features not covered by this group
    • G11C2213/70—Resistive array aspects
    • G11C2213/76—Array using an access device for each cell which being not a transistor and not a diode
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C2213/00—Indexing scheme relating to G11C13/00 for features not covered by this group
    • G11C2213/70—Resistive array aspects
    • G11C2213/77—Array wherein the memory element being directly connected to the bit lines and word lines without any access device being used
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C2213/00—Indexing scheme relating to G11C13/00 for features not covered by this group
    • G11C2213/70—Resistive array aspects
    • G11C2213/78—Array wherein the memory cells of a group share an access device, all the memory cells of the group having a common electrode and the access device being not part of a word line or a bit line driver
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B63/00—Resistance change memory devices, e.g. resistive RAM [ReRAM] devices
    • H10B63/30—Resistance change memory devices, e.g. resistive RAM [ReRAM] devices comprising selection components having three or more electrodes, e.g. transistors

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  • Chemical & Material Sciences (AREA)
  • Engineering & Computer Science (AREA)
  • Materials Engineering (AREA)
  • Semiconductor Memories (AREA)
  • Mram Or Spin Memory Techniques (AREA)
JP2012520685A 2009-07-13 2010-07-09 不揮発性メモリセルの階層的クロスポイントアレイ Expired - Fee Related JP5531099B2 (ja)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US12/502,199 2009-07-13
US12/502,199 US8098507B2 (en) 2009-07-13 2009-07-13 Hierarchical cross-point array of non-volatile memory
PCT/US2010/041552 WO2011008652A1 (en) 2009-07-13 2010-07-09 Hierarchical cross-point array of non-volatile memory

Publications (3)

Publication Number Publication Date
JP2012533143A JP2012533143A (ja) 2012-12-20
JP2012533143A5 JP2012533143A5 (enExample) 2013-04-11
JP5531099B2 true JP5531099B2 (ja) 2014-06-25

Family

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JP2012520685A Expired - Fee Related JP5531099B2 (ja) 2009-07-13 2010-07-09 不揮発性メモリセルの階層的クロスポイントアレイ

Country Status (5)

Country Link
US (1) US8098507B2 (enExample)
JP (1) JP5531099B2 (enExample)
KR (1) KR101402205B1 (enExample)
CN (1) CN102473456B (enExample)
WO (1) WO2011008652A1 (enExample)

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US8169811B2 (en) * 2010-07-13 2012-05-01 Nxp B.V. Non-volatile re-programmable memory device
JP5802625B2 (ja) * 2012-08-24 2015-10-28 株式会社東芝 不揮発性半導体記憶装置
KR101998673B1 (ko) 2012-10-12 2019-07-11 삼성전자주식회사 저항성 메모리 장치 및 그것의 구동방법
US8982647B2 (en) * 2012-11-14 2015-03-17 Crossbar, Inc. Resistive random access memory equalization and sensing
US10157669B2 (en) * 2013-04-02 2018-12-18 Micron Technology, Inc. Method of storing and retrieving information for a resistive random access memory (RRAM) with multi-memory cells per bit
US10049730B2 (en) 2014-07-31 2018-08-14 Hewlett Packard Enterprise Development Lp Crossbar arrays with shared drivers
US10134470B2 (en) 2015-11-04 2018-11-20 Micron Technology, Inc. Apparatuses and methods including memory and operation of same
CN107086202A (zh) * 2016-02-14 2017-08-22 复旦大学 一种可抑制三维水平交叉点式电阻转换存储器漏电流的集成结构
US10446226B2 (en) * 2016-08-08 2019-10-15 Micron Technology, Inc. Apparatuses including multi-level memory cells and methods of operation of same
US11221974B2 (en) * 2020-02-12 2022-01-11 Alibaba Group Holding Limited Device and method for low latency memory access
CN111724847A (zh) * 2020-06-03 2020-09-29 厦门半导体工业技术研发有限公司 一种半导体集成电路器件及其使用方法

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US5625780A (en) * 1991-10-30 1997-04-29 I-Cube, Inc. Programmable backplane for buffering and routing bi-directional signals between terminals of printed circuit boards
DE19813504A1 (de) * 1998-03-26 1999-09-30 Siemens Ag Schaltungsanordnung und Verfahren zur automatischen Erkennung und Beseitigung von Wortleitungs-Bitleitungs-Kurzschlüssen
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KR100451096B1 (ko) * 2000-09-19 2004-10-02 엔이씨 일렉트로닉스 가부시키가이샤 자기메모리셀어레이를 갖는 비휘발성 반도체메모리장치
JP3737403B2 (ja) * 2000-09-19 2006-01-18 Ｎｅｃエレクトロニクス株式会社 メモリセルアレイ、不揮発性記憶ユニットおよび不揮発性半導体記憶装置
KR20030060327A (ko) * 2002-01-08 2003-07-16 삼성전자주식회사 고집적 자성체 메모리 소자 및 그 구동 방법
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JP4355136B2 (ja) 2002-12-05 2009-10-28 シャープ株式会社 不揮発性半導体記憶装置及びその読み出し方法
JP4331966B2 (ja) * 2003-04-14 2009-09-16 株式会社ルネサステクノロジ 半導体集積回路
EP1526548A1 (en) 2003-10-22 2005-04-27 STMicroelectronics S.r.l. Improved bit line discharge method and circuit for a semiconductor memory
JP4177818B2 (ja) * 2004-01-29 2008-11-05 シャープ株式会社 半導体記憶装置
JP3890341B2 (ja) * 2004-09-03 2007-03-07 茂夫 酒井 スリングにおけるアイスプライス端部の処理構造
JP4490323B2 (ja) 2005-04-20 2010-06-23 日本電信電話株式会社 メモリ装置
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Also Published As

Publication number Publication date
WO2011008652A1 (en) 2011-01-20
US20110007548A1 (en) 2011-01-13
JP2012533143A (ja) 2012-12-20
CN102473456A (zh) 2012-05-23
CN102473456B (zh) 2014-12-17
KR101402205B1 (ko) 2014-05-30
KR20120026635A (ko) 2012-03-19
US8098507B2 (en) 2012-01-17

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