JP5489724B2 - エッチング中のラインエンドショートニングの低減 - Google Patents
エッチング中のラインエンドショートニングの低減 Download PDFInfo
- Publication number
- JP5489724B2 JP5489724B2 JP2009545644A JP2009545644A JP5489724B2 JP 5489724 B2 JP5489724 B2 JP 5489724B2 JP 2009545644 A JP2009545644 A JP 2009545644A JP 2009545644 A JP2009545644 A JP 2009545644A JP 5489724 B2 JP5489724 B2 JP 5489724B2
- Authority
- JP
- Japan
- Prior art keywords
- gas
- photoresist
- line
- trimming
- layer
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
Images
Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10P50/00—Etching of wafers, substrates or parts of devices
- H10P50/73—Etching of wafers, substrates or parts of devices using masks for insulating materials
-
- G—PHYSICS
- G03—PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
- G03F—PHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
- G03F7/00—Photomechanical, e.g. photolithographic, production of textured or patterned surfaces, e.g. printing surfaces; Materials therefor, e.g. comprising photoresists; Apparatus specially adapted therefor
- G03F7/70—Microphotolithographic exposure; Apparatus therefor
- G03F7/70483—Information management; Active and passive control; Testing; Wafer monitoring, e.g. pattern monitoring
- G03F7/70491—Information management, e.g. software; Active and passive control, e.g. details of controlling exposure processes or exposure tool monitoring processes
- G03F7/705—Modelling or simulating from physical phenomena up to complete wafer processes or whole workflow in wafer productions
-
- G—PHYSICS
- G03—PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
- G03F—PHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
- G03F7/00—Photomechanical, e.g. photolithographic, production of textured or patterned surfaces, e.g. printing surfaces; Materials therefor, e.g. comprising photoresists; Apparatus specially adapted therefor
- G03F7/70—Microphotolithographic exposure; Apparatus therefor
- G03F7/70691—Handling of masks or workpieces
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
- H10P14/60—Formation of materials, e.g. in the shape of layers or pillars of insulating materials
- H10P14/63—Formation of materials, e.g. in the shape of layers or pillars of insulating materials characterised by the formation processes
- H10P14/6326—Deposition processes
- H10P14/6328—Deposition from the gas or vapour phase
- H10P14/6334—Deposition from the gas or vapour phase using decomposition or reaction of gaseous or vapour phase compounds, i.e. chemical vapour deposition
- H10P14/6336—Deposition from the gas or vapour phase using decomposition or reaction of gaseous or vapour phase compounds, i.e. chemical vapour deposition in the presence of a plasma [PECVD]
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
- H10P14/60—Formation of materials, e.g. in the shape of layers or pillars of insulating materials
- H10P14/63—Formation of materials, e.g. in the shape of layers or pillars of insulating materials characterised by the formation processes
- H10P14/6326—Deposition processes
- H10P14/6328—Deposition from the gas or vapour phase
- H10P14/6334—Deposition from the gas or vapour phase using decomposition or reaction of gaseous or vapour phase compounds, i.e. chemical vapour deposition
- H10P14/6339—Deposition from the gas or vapour phase using decomposition or reaction of gaseous or vapour phase compounds, i.e. chemical vapour deposition deposition by cyclic CVD, e.g. ALD, ALE or pulsed CVD
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
- H10P14/60—Formation of materials, e.g. in the shape of layers or pillars of insulating materials
- H10P14/65—Formation of materials, e.g. in the shape of layers or pillars of insulating materials characterised by treatments performed before or after the formation of the materials
- H10P14/6516—Formation of materials, e.g. in the shape of layers or pillars of insulating materials characterised by treatments performed before or after the formation of the materials of treatments performed after formation of the materials
- H10P14/6529—Formation of materials, e.g. in the shape of layers or pillars of insulating materials characterised by treatments performed before or after the formation of the materials of treatments performed after formation of the materials by exposure to a gas or vapour
- H10P14/6532—Formation of materials, e.g. in the shape of layers or pillars of insulating materials characterised by treatments performed before or after the formation of the materials of treatments performed after formation of the materials by exposure to a gas or vapour by exposure to a plasma
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
- H10P14/60—Formation of materials, e.g. in the shape of layers or pillars of insulating materials
- H10P14/68—Organic materials, e.g. photoresists
- H10P14/683—Organic materials, e.g. photoresists carbon-based polymeric organic materials, e.g. polyimides, poly cyclobutene or PVC
- H10P14/687—Organic materials, e.g. photoresists carbon-based polymeric organic materials, e.g. polyimides, poly cyclobutene or PVC the materials being fluorocarbon compounds, e.g. (CHxFy) n or polytetrafluoroethylene
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10P50/00—Etching of wafers, substrates or parts of devices
- H10P50/71—Etching of wafers, substrates or parts of devices using masks for conductive or resistive materials
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10P76/00—Manufacture or treatment of masks on semiconductor bodies, e.g. by lithography or photolithography
- H10P76/20—Manufacture or treatment of masks on semiconductor bodies, e.g. by lithography or photolithography of masks comprising organic materials
- H10P76/204—Manufacture or treatment of masks on semiconductor bodies, e.g. by lithography or photolithography of masks comprising organic materials of organic photoresist masks
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10P95/00—Generic processes or apparatus for manufacture or treatments not covered by the other groups of this subclass
- H10P95/08—Planarisation of organic insulating materials
Landscapes
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Drying Of Semiconductors (AREA)
- Exposure Of Semiconductors, Excluding Electron Or Ion Beam Exposure (AREA)
Applications Claiming Priority (3)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US11/621,902 US7491343B2 (en) | 2006-09-14 | 2007-01-10 | Line end shortening reduction during etch |
| US11/621,902 | 2007-01-10 | ||
| PCT/US2008/050524 WO2008086361A1 (en) | 2007-01-10 | 2008-01-08 | Line end shortening reduction during etch |
Related Child Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2013086806A Division JP2013191854A (ja) | 2007-01-10 | 2013-04-17 | エッチング中のラインエンドショートニングの低減 |
Publications (3)
| Publication Number | Publication Date |
|---|---|
| JP2010516059A JP2010516059A (ja) | 2010-05-13 |
| JP2010516059A5 JP2010516059A5 (https=) | 2011-02-10 |
| JP5489724B2 true JP5489724B2 (ja) | 2014-05-14 |
Family
ID=39615674
Family Applications (2)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2009545644A Expired - Fee Related JP5489724B2 (ja) | 2007-01-10 | 2008-01-08 | エッチング中のラインエンドショートニングの低減 |
| JP2013086806A Pending JP2013191854A (ja) | 2007-01-10 | 2013-04-17 | エッチング中のラインエンドショートニングの低減 |
Family Applications After (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2013086806A Pending JP2013191854A (ja) | 2007-01-10 | 2013-04-17 | エッチング中のラインエンドショートニングの低減 |
Country Status (6)
| Country | Link |
|---|---|
| US (1) | US7491343B2 (https=) |
| JP (2) | JP5489724B2 (https=) |
| KR (1) | KR101433987B1 (https=) |
| CN (1) | CN101584027B (https=) |
| TW (1) | TWI409875B (https=) |
| WO (1) | WO2008086361A1 (https=) |
Families Citing this family (15)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR100840652B1 (ko) * | 2006-12-29 | 2008-06-24 | 동부일렉트로닉스 주식회사 | 씨모스 이미지 센서의 제조방법 |
| JP2010161162A (ja) | 2009-01-07 | 2010-07-22 | Tokyo Electron Ltd | 微細パターンの形成方法 |
| WO2010141257A2 (en) * | 2009-06-03 | 2010-12-09 | Applied Materials, Inc. | Method and apparatus for etching |
| US8394723B2 (en) * | 2010-01-07 | 2013-03-12 | Lam Research Corporation | Aspect ratio adjustment of mask pattern using trimming to alter geometry of photoresist features |
| US8815747B2 (en) * | 2010-06-03 | 2014-08-26 | Micron Technology, Inc. | Methods of forming patterns on substrates |
| CN102468168B (zh) * | 2010-11-01 | 2014-06-04 | 中芯国际集成电路制造(上海)有限公司 | Mos晶体管的形成方法 |
| US8304262B2 (en) * | 2011-02-17 | 2012-11-06 | Lam Research Corporation | Wiggling control for pseudo-hardmask |
| JP6151215B2 (ja) * | 2014-05-15 | 2017-06-21 | 東京エレクトロン株式会社 | プラズマエッチング方法 |
| US10049892B2 (en) * | 2015-05-07 | 2018-08-14 | Tokyo Electron Limited | Method for processing photoresist materials and structures |
| KR20180113585A (ko) * | 2016-03-04 | 2018-10-16 | 도쿄엘렉트론가부시키가이샤 | 통합 계획의 다양한 스테이지 동안의 패터닝을 위한 트림 방법 |
| JP6458156B2 (ja) * | 2016-03-28 | 2019-01-23 | 株式会社日立ハイテクノロジーズ | プラズマ処理方法 |
| US10727045B2 (en) * | 2017-09-29 | 2020-07-28 | Taiwan Semiconductor Manufacturing Company, Ltd. | Method for manufacturing a semiconductor device |
| JP2019121750A (ja) * | 2018-01-11 | 2019-07-22 | 東京エレクトロン株式会社 | エッチング方法およびエッチング装置 |
| JP7195113B2 (ja) | 2018-11-07 | 2022-12-23 | 東京エレクトロン株式会社 | 処理方法及び基板処理装置 |
| JP7588518B2 (ja) | 2021-02-01 | 2024-11-22 | 東京エレクトロン株式会社 | 温度制御方法及び基板処理装置 |
Family Cites Families (25)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5959325A (en) | 1997-08-21 | 1999-09-28 | International Business Machines Corporation | Method for forming cornered images on a substrate and photomask formed thereby |
| JP4153606B2 (ja) | 1998-10-22 | 2008-09-24 | 東京エレクトロン株式会社 | プラズマエッチング方法およびプラズマエッチング装置 |
| KR100447263B1 (ko) * | 1999-12-30 | 2004-09-07 | 주식회사 하이닉스반도체 | 식각 폴리머를 이용한 반도체 소자의 제조방법 |
| JP2001308076A (ja) | 2000-04-27 | 2001-11-02 | Nec Corp | 半導体装置の製造方法 |
| US6451705B1 (en) | 2000-08-31 | 2002-09-17 | Micron Technology, Inc. | Self-aligned PECVD etch mask |
| US6653231B2 (en) | 2001-03-28 | 2003-11-25 | Advanced Micro Devices, Inc. | Process for reducing the critical dimensions of integrated circuit device features |
| US6553560B2 (en) | 2001-04-03 | 2003-04-22 | Numerical Technologies, Inc. | Alleviating line end shortening in transistor endcaps by extending phase shifters |
| US7125496B2 (en) | 2001-06-28 | 2006-10-24 | Hynix Semiconductor Inc. | Etching method using photoresist etch barrier |
| CN1316564C (zh) * | 2002-04-11 | 2007-05-16 | 联华电子股份有限公司 | 复合光致抗蚀剂层结构 |
| JP3866155B2 (ja) * | 2002-05-17 | 2007-01-10 | 株式会社ルネサステクノロジ | 半導体装置およびその製造方法 |
| KR100475080B1 (ko) | 2002-07-09 | 2005-03-10 | 삼성전자주식회사 | Si-콘테이닝 수용성 폴리머를 이용한 레지스트 패턴형성방법 및 반도체 소자의 제조방법 |
| US6794230B2 (en) | 2002-10-31 | 2004-09-21 | Taiwan Semiconductor Manufacturing Company, Ltd. | Approach to improve line end shortening |
| TW575907B (en) | 2002-12-24 | 2004-02-11 | Macronix Int Co Ltd | Patterning method for fabricating integrated circuit |
| US6916594B2 (en) | 2002-12-30 | 2005-07-12 | Hynix Semiconductor Inc. | Overcoating composition for photoresist and method for forming photoresist pattern using the same |
| CN100423192C (zh) * | 2003-03-31 | 2008-10-01 | 东京毅力科创株式会社 | 用于多层光致抗蚀剂干式显影的方法和装置 |
| JP4455936B2 (ja) * | 2003-07-09 | 2010-04-21 | 富士通マイクロエレクトロニクス株式会社 | 半導体装置の製造方法とエッチングシステム |
| JP4727171B2 (ja) * | 2003-09-29 | 2011-07-20 | 東京エレクトロン株式会社 | エッチング方法 |
| CN100395874C (zh) * | 2004-07-14 | 2008-06-18 | 中芯国际集成电路制造(上海)有限公司 | 改善蚀刻后光刻胶残余的半导体器件制造方法 |
| KR100792409B1 (ko) * | 2004-10-12 | 2008-01-09 | 주식회사 하이닉스반도체 | 텅스텐막을 희생 하드마스크로 이용하는 반도체소자 제조방법 |
| US7419771B2 (en) * | 2005-01-11 | 2008-09-02 | Taiwan Semiconductor Manufacturing Co., Ltd. | Method for forming a finely patterned resist |
| US7491647B2 (en) | 2005-03-08 | 2009-02-17 | Lam Research Corporation | Etch with striation control |
| US7566525B2 (en) | 2005-06-14 | 2009-07-28 | Taiwan Semiconductor Manufacturing Co., Ltd. | Method for forming an anti-etching shielding layer of resist patterns in semiconductor fabrication |
| JP4652140B2 (ja) * | 2005-06-21 | 2011-03-16 | 東京エレクトロン株式会社 | プラズマエッチング方法、制御プログラム、コンピュータ記憶媒体 |
| US7425507B2 (en) | 2005-06-28 | 2008-09-16 | Micron Technology, Inc. | Semiconductor substrates including vias of nonuniform cross section, methods of forming and associated structures |
| US7531296B2 (en) | 2005-08-24 | 2009-05-12 | Taiwan Semiconductor Manufacturing, Co., Ltd. | Method of forming high etch resistant resist patterns |
-
2007
- 2007-01-10 US US11/621,902 patent/US7491343B2/en not_active Expired - Fee Related
-
2008
- 2008-01-07 TW TW097100625A patent/TWI409875B/zh not_active IP Right Cessation
- 2008-01-08 CN CN2008800020667A patent/CN101584027B/zh not_active Expired - Fee Related
- 2008-01-08 WO PCT/US2008/050524 patent/WO2008086361A1/en not_active Ceased
- 2008-01-08 KR KR1020097016604A patent/KR101433987B1/ko not_active Expired - Fee Related
- 2008-01-08 JP JP2009545644A patent/JP5489724B2/ja not_active Expired - Fee Related
-
2013
- 2013-04-17 JP JP2013086806A patent/JP2013191854A/ja active Pending
Also Published As
| Publication number | Publication date |
|---|---|
| JP2013191854A (ja) | 2013-09-26 |
| KR20090107055A (ko) | 2009-10-12 |
| KR101433987B1 (ko) | 2014-08-25 |
| CN101584027A (zh) | 2009-11-18 |
| WO2008086361A1 (en) | 2008-07-17 |
| US20080087639A1 (en) | 2008-04-17 |
| TWI409875B (zh) | 2013-09-21 |
| US7491343B2 (en) | 2009-02-17 |
| TW200845184A (en) | 2008-11-16 |
| JP2010516059A (ja) | 2010-05-13 |
| CN101584027B (zh) | 2011-07-13 |
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