KR101433987B1 - 에칭 동안 라인 말단 단축의 감소 방법 - Google Patents

에칭 동안 라인 말단 단축의 감소 방법 Download PDF

Info

Publication number
KR101433987B1
KR101433987B1 KR1020097016604A KR20097016604A KR101433987B1 KR 101433987 B1 KR101433987 B1 KR 101433987B1 KR 1020097016604 A KR1020097016604 A KR 1020097016604A KR 20097016604 A KR20097016604 A KR 20097016604A KR 101433987 B1 KR101433987 B1 KR 101433987B1
Authority
KR
South Korea
Prior art keywords
gas
photoresist
line
layer
polymer
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
KR1020097016604A
Other languages
English (en)
Korean (ko)
Other versions
KR20090107055A (ko
Inventor
요코 야마구치 아담스
고우리 코타
프랭크 와이 린
칭화 중
Original Assignee
램 리써치 코포레이션
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 램 리써치 코포레이션 filed Critical 램 리써치 코포레이션
Publication of KR20090107055A publication Critical patent/KR20090107055A/ko
Application granted granted Critical
Publication of KR101433987B1 publication Critical patent/KR101433987B1/ko
Expired - Fee Related legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Images

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P50/00—Etching of wafers, substrates or parts of devices
    • H10P50/73—Etching of wafers, substrates or parts of devices using masks for insulating materials
    • G—PHYSICS
    • G03—PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
    • G03F—PHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
    • G03F7/00—Photomechanical, e.g. photolithographic, production of textured or patterned surfaces, e.g. printing surfaces; Materials therefor, e.g. comprising photoresists; Apparatus specially adapted therefor
    • G03F7/70—Microphotolithographic exposure; Apparatus therefor
    • G03F7/70483—Information management; Active and passive control; Testing; Wafer monitoring, e.g. pattern monitoring
    • G03F7/70491—Information management, e.g. software; Active and passive control, e.g. details of controlling exposure processes or exposure tool monitoring processes
    • G03F7/705—Modelling or simulating from physical phenomena up to complete wafer processes or whole workflow in wafer productions
    • G—PHYSICS
    • G03—PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
    • G03F—PHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
    • G03F7/00—Photomechanical, e.g. photolithographic, production of textured or patterned surfaces, e.g. printing surfaces; Materials therefor, e.g. comprising photoresists; Apparatus specially adapted therefor
    • G03F7/70—Microphotolithographic exposure; Apparatus therefor
    • G03F7/70691—Handling of masks or workpieces
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/60—Formation of materials, e.g. in the shape of layers or pillars of insulating materials
    • H10P14/63—Formation of materials, e.g. in the shape of layers or pillars of insulating materials characterised by the formation processes
    • H10P14/6326—Deposition processes
    • H10P14/6328—Deposition from the gas or vapour phase
    • H10P14/6334—Deposition from the gas or vapour phase using decomposition or reaction of gaseous or vapour phase compounds, i.e. chemical vapour deposition
    • H10P14/6336—Deposition from the gas or vapour phase using decomposition or reaction of gaseous or vapour phase compounds, i.e. chemical vapour deposition in the presence of a plasma [PECVD]
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/60—Formation of materials, e.g. in the shape of layers or pillars of insulating materials
    • H10P14/63—Formation of materials, e.g. in the shape of layers or pillars of insulating materials characterised by the formation processes
    • H10P14/6326—Deposition processes
    • H10P14/6328—Deposition from the gas or vapour phase
    • H10P14/6334—Deposition from the gas or vapour phase using decomposition or reaction of gaseous or vapour phase compounds, i.e. chemical vapour deposition
    • H10P14/6339—Deposition from the gas or vapour phase using decomposition or reaction of gaseous or vapour phase compounds, i.e. chemical vapour deposition deposition by cyclic CVD, e.g. ALD, ALE or pulsed CVD
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/60—Formation of materials, e.g. in the shape of layers or pillars of insulating materials
    • H10P14/65—Formation of materials, e.g. in the shape of layers or pillars of insulating materials characterised by treatments performed before or after the formation of the materials
    • H10P14/6516—Formation of materials, e.g. in the shape of layers or pillars of insulating materials characterised by treatments performed before or after the formation of the materials of treatments performed after formation of the materials
    • H10P14/6529—Formation of materials, e.g. in the shape of layers or pillars of insulating materials characterised by treatments performed before or after the formation of the materials of treatments performed after formation of the materials by exposure to a gas or vapour
    • H10P14/6532—Formation of materials, e.g. in the shape of layers or pillars of insulating materials characterised by treatments performed before or after the formation of the materials of treatments performed after formation of the materials by exposure to a gas or vapour by exposure to a plasma
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/60—Formation of materials, e.g. in the shape of layers or pillars of insulating materials
    • H10P14/68—Organic materials, e.g. photoresists
    • H10P14/683—Organic materials, e.g. photoresists carbon-based polymeric organic materials, e.g. polyimides, poly cyclobutene or PVC
    • H10P14/687—Organic materials, e.g. photoresists carbon-based polymeric organic materials, e.g. polyimides, poly cyclobutene or PVC the materials being fluorocarbon compounds, e.g. (CHxFy) n or polytetrafluoroethylene
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P50/00—Etching of wafers, substrates or parts of devices
    • H10P50/71—Etching of wafers, substrates or parts of devices using masks for conductive or resistive materials
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P76/00—Manufacture or treatment of masks on semiconductor bodies, e.g. by lithography or photolithography
    • H10P76/20—Manufacture or treatment of masks on semiconductor bodies, e.g. by lithography or photolithography of masks comprising organic materials
    • H10P76/204—Manufacture or treatment of masks on semiconductor bodies, e.g. by lithography or photolithography of masks comprising organic materials of organic photoresist masks
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P95/00—Generic processes or apparatus for manufacture or treatments not covered by the other groups of this subclass
    • H10P95/08—Planarisation of organic insulating materials

Landscapes

  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Drying Of Semiconductors (AREA)
  • Exposure Of Semiconductors, Excluding Electron Or Ion Beam Exposure (AREA)
KR1020097016604A 2007-01-10 2008-01-08 에칭 동안 라인 말단 단축의 감소 방법 Expired - Fee Related KR101433987B1 (ko)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US11/621,902 US7491343B2 (en) 2006-09-14 2007-01-10 Line end shortening reduction during etch
US11/621,902 2007-01-10
PCT/US2008/050524 WO2008086361A1 (en) 2007-01-10 2008-01-08 Line end shortening reduction during etch

Publications (2)

Publication Number Publication Date
KR20090107055A KR20090107055A (ko) 2009-10-12
KR101433987B1 true KR101433987B1 (ko) 2014-08-25

Family

ID=39615674

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1020097016604A Expired - Fee Related KR101433987B1 (ko) 2007-01-10 2008-01-08 에칭 동안 라인 말단 단축의 감소 방법

Country Status (6)

Country Link
US (1) US7491343B2 (https=)
JP (2) JP5489724B2 (https=)
KR (1) KR101433987B1 (https=)
CN (1) CN101584027B (https=)
TW (1) TWI409875B (https=)
WO (1) WO2008086361A1 (https=)

Families Citing this family (15)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100840652B1 (ko) * 2006-12-29 2008-06-24 동부일렉트로닉스 주식회사 씨모스 이미지 센서의 제조방법
JP2010161162A (ja) 2009-01-07 2010-07-22 Tokyo Electron Ltd 微細パターンの形成方法
WO2010141257A2 (en) * 2009-06-03 2010-12-09 Applied Materials, Inc. Method and apparatus for etching
US8394723B2 (en) * 2010-01-07 2013-03-12 Lam Research Corporation Aspect ratio adjustment of mask pattern using trimming to alter geometry of photoresist features
US8815747B2 (en) * 2010-06-03 2014-08-26 Micron Technology, Inc. Methods of forming patterns on substrates
CN102468168B (zh) * 2010-11-01 2014-06-04 中芯国际集成电路制造(上海)有限公司 Mos晶体管的形成方法
US8304262B2 (en) * 2011-02-17 2012-11-06 Lam Research Corporation Wiggling control for pseudo-hardmask
JP6151215B2 (ja) * 2014-05-15 2017-06-21 東京エレクトロン株式会社 プラズマエッチング方法
US10049892B2 (en) * 2015-05-07 2018-08-14 Tokyo Electron Limited Method for processing photoresist materials and structures
KR20180113585A (ko) * 2016-03-04 2018-10-16 도쿄엘렉트론가부시키가이샤 통합 계획의 다양한 스테이지 동안의 패터닝을 위한 트림 방법
JP6458156B2 (ja) * 2016-03-28 2019-01-23 株式会社日立ハイテクノロジーズ プラズマ処理方法
US10727045B2 (en) * 2017-09-29 2020-07-28 Taiwan Semiconductor Manufacturing Company, Ltd. Method for manufacturing a semiconductor device
JP2019121750A (ja) * 2018-01-11 2019-07-22 東京エレクトロン株式会社 エッチング方法およびエッチング装置
JP7195113B2 (ja) 2018-11-07 2022-12-23 東京エレクトロン株式会社 処理方法及び基板処理装置
JP7588518B2 (ja) 2021-02-01 2024-11-22 東京エレクトロン株式会社 温度制御方法及び基板処理装置

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2000133638A (ja) 1998-10-22 2000-05-12 Tokyo Electron Ltd プラズマエッチング方法およびプラズマエッチング装置
JP2001308076A (ja) 2000-04-27 2001-11-02 Nec Corp 半導体装置の製造方法
KR20050031375A (ko) * 2003-09-29 2005-04-06 동경 엘렉트론 주식회사 에칭 방법 및 이를 제어하기 위한 프로그램이 기억된컴퓨터기억매체
WO2006096528A2 (en) 2005-03-08 2006-09-14 Lam Research Corporation Stabilized photoresist structure for etching process

Family Cites Families (21)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5959325A (en) 1997-08-21 1999-09-28 International Business Machines Corporation Method for forming cornered images on a substrate and photomask formed thereby
KR100447263B1 (ko) * 1999-12-30 2004-09-07 주식회사 하이닉스반도체 식각 폴리머를 이용한 반도체 소자의 제조방법
US6451705B1 (en) 2000-08-31 2002-09-17 Micron Technology, Inc. Self-aligned PECVD etch mask
US6653231B2 (en) 2001-03-28 2003-11-25 Advanced Micro Devices, Inc. Process for reducing the critical dimensions of integrated circuit device features
US6553560B2 (en) 2001-04-03 2003-04-22 Numerical Technologies, Inc. Alleviating line end shortening in transistor endcaps by extending phase shifters
US7125496B2 (en) 2001-06-28 2006-10-24 Hynix Semiconductor Inc. Etching method using photoresist etch barrier
CN1316564C (zh) * 2002-04-11 2007-05-16 联华电子股份有限公司 复合光致抗蚀剂层结构
JP3866155B2 (ja) * 2002-05-17 2007-01-10 株式会社ルネサステクノロジ 半導体装置およびその製造方法
KR100475080B1 (ko) 2002-07-09 2005-03-10 삼성전자주식회사 Ｓｉ-콘테이닝 수용성 폴리머를 이용한 레지스트 패턴형성방법 및 반도체 소자의 제조방법
US6794230B2 (en) 2002-10-31 2004-09-21 Taiwan Semiconductor Manufacturing Company, Ltd. Approach to improve line end shortening
TW575907B (en) 2002-12-24 2004-02-11 Macronix Int Co Ltd Patterning method for fabricating integrated circuit
US6916594B2 (en) 2002-12-30 2005-07-12 Hynix Semiconductor Inc. Overcoating composition for photoresist and method for forming photoresist pattern using the same
CN100423192C (zh) * 2003-03-31 2008-10-01 东京毅力科创株式会社 用于多层光致抗蚀剂干式显影的方法和装置
JP4455936B2 (ja) * 2003-07-09 2010-04-21 富士通マイクロエレクトロニクス株式会社 半導体装置の製造方法とエッチングシステム
CN100395874C (zh) * 2004-07-14 2008-06-18 中芯国际集成电路制造(上海)有限公司 改善蚀刻后光刻胶残余的半导体器件制造方法
KR100792409B1 (ko) * 2004-10-12 2008-01-09 주식회사 하이닉스반도체 텅스텐막을 희생 하드마스크로 이용하는 반도체소자 제조방법
US7419771B2 (en) * 2005-01-11 2008-09-02 Taiwan Semiconductor Manufacturing Co., Ltd. Method for forming a finely patterned resist
US7566525B2 (en) 2005-06-14 2009-07-28 Taiwan Semiconductor Manufacturing Co., Ltd. Method for forming an anti-etching shielding layer of resist patterns in semiconductor fabrication
JP4652140B2 (ja) * 2005-06-21 2011-03-16 東京エレクトロン株式会社 プラズマエッチング方法、制御プログラム、コンピュータ記憶媒体
US7425507B2 (en) 2005-06-28 2008-09-16 Micron Technology, Inc. Semiconductor substrates including vias of nonuniform cross section, methods of forming and associated structures
US7531296B2 (en) 2005-08-24 2009-05-12 Taiwan Semiconductor Manufacturing, Co., Ltd. Method of forming high etch resistant resist patterns

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2000133638A (ja) 1998-10-22 2000-05-12 Tokyo Electron Ltd プラズマエッチング方法およびプラズマエッチング装置
JP2001308076A (ja) 2000-04-27 2001-11-02 Nec Corp 半導体装置の製造方法
KR20050031375A (ko) * 2003-09-29 2005-04-06 동경 엘렉트론 주식회사 에칭 방법 및 이를 제어하기 위한 프로그램이 기억된컴퓨터기억매체
WO2006096528A2 (en) 2005-03-08 2006-09-14 Lam Research Corporation Stabilized photoresist structure for etching process

Also Published As

Publication number Publication date
JP2013191854A (ja) 2013-09-26
JP5489724B2 (ja) 2014-05-14
KR20090107055A (ko) 2009-10-12
CN101584027A (zh) 2009-11-18
WO2008086361A1 (en) 2008-07-17
US20080087639A1 (en) 2008-04-17
TWI409875B (zh) 2013-09-21
US7491343B2 (en) 2009-02-17
TW200845184A (en) 2008-11-16
JP2010516059A (ja) 2010-05-13
CN101584027B (zh) 2011-07-13

Similar Documents

Publication Publication Date Title
KR101433987B1 (ko) 에칭 동안 라인 말단 단축의 감소 방법
CN101715604B (zh) 深硅刻蚀上掩膜底切的最小化
CN101506939B (zh) 在斜面蚀刻处理期间避免低k损伤
JP5086090B2 (ja) 水素流量傾斜化によるフォトレジストプラズマコンディショニング工程を含むエッチング方法及び装置
KR101392121B1 (ko) 잔유물 없는 하드마스크 트림
US8329585B2 (en) Method for reducing line width roughness with plasma pre-etch treatment on photoresist
CN101779276B (zh) 掩模修整
KR101690337B1 (ko) Ｈ₂플라즈마 처리법을 이용한 유기 선폭 조도의 개선
KR101882519B1 (ko) 의사-하드마스크에 대한 위글링 제어
US8986492B2 (en) Spacer formation for array double patterning
JP2013016844A (ja) 均一性を制御したエッチング
US8668805B2 (en) Line end shortening reduction during etch

Legal Events

Date Code Title Description
PA0105 International application

St.27 status event code: A-0-1-A10-A15-nap-PA0105

P11-X000 Amendment of application requested

St.27 status event code: A-2-2-P10-P11-nap-X000

P13-X000 Application amended

St.27 status event code: A-2-2-P10-P13-nap-X000

PG1501 Laying open of application

St.27 status event code: A-1-1-Q10-Q12-nap-PG1501

A201 Request for examination
P11-X000 Amendment of application requested

St.27 status event code: A-2-2-P10-P11-nap-X000

P13-X000 Application amended

St.27 status event code: A-2-2-P10-P13-nap-X000

PA0201 Request for examination

St.27 status event code: A-1-2-D10-D11-exm-PA0201

R17-X000 Change to representative recorded

St.27 status event code: A-3-3-R10-R17-oth-X000

E902 Notification of reason for refusal
PE0902 Notice of grounds for rejection

St.27 status event code: A-1-2-D10-D21-exm-PE0902

P11-X000 Amendment of application requested

St.27 status event code: A-2-2-P10-P11-nap-X000

P13-X000 Application amended

St.27 status event code: A-2-2-P10-P13-nap-X000

E701 Decision to grant or registration of patent right
PE0701 Decision of registration

St.27 status event code: A-1-2-D10-D22-exm-PE0701

GRNT Written decision to grant
PR0701 Registration of establishment

St.27 status event code: A-2-4-F10-F11-exm-PR0701

PR1002 Payment of registration fee

St.27 status event code: A-2-2-U10-U12-oth-PR1002

Fee payment year number: 1

PG1601 Publication of registration

St.27 status event code: A-4-4-Q10-Q13-nap-PG1601

FPAY Annual fee payment

Payment date: 20170809

Year of fee payment: 4

PR1001 Payment of annual fee

St.27 status event code: A-4-4-U10-U11-oth-PR1001

Fee payment year number: 4

FPAY Annual fee payment

Payment date: 20180808

Year of fee payment: 5

PR1001 Payment of annual fee

St.27 status event code: A-4-4-U10-U11-oth-PR1001

Fee payment year number: 5

P22-X000 Classification modified

St.27 status event code: A-4-4-P10-P22-nap-X000

FPAY Annual fee payment

Payment date: 20190807

Year of fee payment: 6

PR1001 Payment of annual fee

St.27 status event code: A-4-4-U10-U11-oth-PR1001

Fee payment year number: 6

PR1001 Payment of annual fee

St.27 status event code: A-4-4-U10-U11-oth-PR1001

Fee payment year number: 7

PC1903 Unpaid annual fee

St.27 status event code: A-4-4-U10-U13-oth-PC1903

Not in force date: 20210820

Payment event data comment text: Termination Category : DEFAULT_OF_REGISTRATION_FEE

PC1903 Unpaid annual fee

St.27 status event code: N-4-6-H10-H13-oth-PC1903

Ip right cessation event data comment text: Termination Category : DEFAULT_OF_REGISTRATION_FEE

Not in force date: 20210820

P22-X000 Classification modified

St.27 status event code: A-4-4-P10-P22-nap-X000

P22-X000 Classification modified

St.27 status event code: A-4-4-P10-P22-nap-X000