JP5437237B2 - ディープシリコンエッチングにおけるマスクアンダカットの最小化 - Google Patents

ディープシリコンエッチングにおけるマスクアンダカットの最小化 Download PDF

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Publication number
JP5437237B2
JP5437237B2 JP2010513313A JP2010513313A JP5437237B2 JP 5437237 B2 JP5437237 B2 JP 5437237B2 JP 2010513313 A JP2010513313 A JP 2010513313A JP 2010513313 A JP2010513313 A JP 2010513313A JP 5437237 B2 JP5437237 B2 JP 5437237B2
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mask
gas
polymer
deposited
etching
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Japanese (ja)
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JP2010530643A5 (enExample
JP2010530643A (ja
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パンドゥムソポーン・タマラク
チャン・パトリック
セト・ジャッキー
サドジャディ・エス．エム．・レザ
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Lam Research Corp
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Lam Research Corp
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    • H10P50/695—
    • H10P50/287—

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  • Drying Of Semiconductors (AREA)
  • Plasma Technology (AREA)
JP2010513313A 2007-06-18 2008-06-02 ディープシリコンエッチングにおけるマスクアンダカットの最小化 Expired - Fee Related JP5437237B2 (ja)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US11/820,334 US8262920B2 (en) 2007-06-18 2007-06-18 Minimization of mask undercut on deep silicon etch
US11/820,334 2007-06-18
PCT/US2008/065578 WO2008157018A1 (en) 2007-06-18 2008-06-02 Minimization of mask undercut on deep silicon etch

Publications (3)

Publication Number Publication Date
JP2010530643A JP2010530643A (ja) 2010-09-09
JP2010530643A5 JP2010530643A5 (enExample) 2011-07-21
JP5437237B2 true JP5437237B2 (ja) 2014-03-12

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JP2010513313A Expired - Fee Related JP5437237B2 (ja) 2007-06-18 2008-06-02 ディープシリコンエッチングにおけるマスクアンダカットの最小化

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US (2) US8262920B2 (enExample)
JP (1) JP5437237B2 (enExample)
KR (1) KR101476477B1 (enExample)
CN (1) CN101715604B (enExample)
TW (1) TWI446437B (enExample)
WO (1) WO2008157018A1 (enExample)

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JP5093854B2 (ja) * 2009-03-25 2012-12-12 Ｓｐｐテクノロジーズ株式会社 エッチング方法
US8158522B2 (en) * 2009-09-25 2012-04-17 Applied Materials, Inc. Method of forming a deep trench in a substrate
KR101908113B1 (ko) * 2009-11-16 2018-10-15 삼성전자 주식회사 전기활성 폴리머 엑츄에이터 및 그 제조방법
US9257274B2 (en) 2010-04-15 2016-02-09 Lam Research Corporation Gapfill of variable aspect ratio features with a composite PEALD and PECVD method
US9059101B2 (en) * 2011-07-07 2015-06-16 Lam Research Corporation Radiofrequency adjustment for instability management in semiconductor processing
CN102956543B (zh) * 2011-08-25 2015-06-03 上海华虹宏力半导体制造有限公司 一种硅通孔的制作方法
US8597982B2 (en) * 2011-10-31 2013-12-03 Nordson Corporation Methods of fabricating electronics assemblies
KR102223145B1 (ko) 2014-07-04 2021-03-05 삼성디스플레이 주식회사 박막 트랜지스터 기판, 이를 갖는 액정 표시 패널 및 이의 제조방법
US10049892B2 (en) * 2015-05-07 2018-08-14 Tokyo Electron Limited Method for processing photoresist materials and structures
US9711359B2 (en) * 2015-08-13 2017-07-18 Lam Research Corporation Shadow trim line edge roughness reduction
TWI687970B (zh) * 2016-02-22 2020-03-11 東京威力科創股份有限公司 圖案化層之循環式蝕刻的方法
US9773643B1 (en) * 2016-06-30 2017-09-26 Lam Research Corporation Apparatus and method for deposition and etch in gap fill
US10002773B2 (en) * 2016-10-11 2018-06-19 Lam Research Corporation Method for selectively etching silicon oxide with respect to an organic mask
US10134600B2 (en) * 2017-02-06 2018-11-20 Lam Research Corporation Dielectric contact etch
US9779956B1 (en) * 2017-02-06 2017-10-03 Lam Research Corporation Hydrogen activated atomic layer etching
CN111063655A (zh) * 2018-10-17 2020-04-24 无锡华润上华科技有限公司 一种半导体器件的制造方法
JP7494209B2 (ja) 2019-05-01 2024-06-03 ラム リサーチ コーポレーション 調整された原子層堆積
CN114245832B (zh) 2019-06-07 2025-10-28 朗姆研究公司 原子层沉积期间的膜特性的原位控制
US11177137B2 (en) * 2020-01-17 2021-11-16 Taiwan Semiconductor Manufacturing Company, Ltd. Wafer etching process and methods thereof

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Also Published As

Publication number Publication date
US8262920B2 (en) 2012-09-11
WO2008157018A1 (en) 2008-12-24
US20080308526A1 (en) 2008-12-18
TW200908141A (en) 2009-02-16
CN101715604B (zh) 2012-02-01
KR101476477B1 (ko) 2014-12-24
US20120298301A1 (en) 2012-11-29
KR20100035159A (ko) 2010-04-02
TWI446437B (zh) 2014-07-21
JP2010530643A (ja) 2010-09-09
CN101715604A (zh) 2010-05-26

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