JP5436995B2 - 配線基板及びその製造方法 - Google Patents

配線基板及びその製造方法 Download PDF

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Publication number
JP5436995B2
JP5436995B2 JP2009211368A JP2009211368A JP5436995B2 JP 5436995 B2 JP5436995 B2 JP 5436995B2 JP 2009211368 A JP2009211368 A JP 2009211368A JP 2009211368 A JP2009211368 A JP 2009211368A JP 5436995 B2 JP5436995 B2 JP 5436995B2
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Japan
Prior art keywords
layer
wiring
adhesion layer
adhesion
substrate
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
JP2009211368A
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English (en)
Japanese (ja)
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JP2011061113A5 (enExample
JP2011061113A (ja
Inventor
智生 山崎
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Shinko Electric Industries Co Ltd
Original Assignee
Shinko Electric Industries Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Shinko Electric Industries Co Ltd filed Critical Shinko Electric Industries Co Ltd
Priority to JP2009211368A priority Critical patent/JP5436995B2/ja
Priority to US12/869,805 priority patent/US8288659B2/en
Publication of JP2011061113A publication Critical patent/JP2011061113A/ja
Publication of JP2011061113A5 publication Critical patent/JP2011061113A5/ja
Application granted granted Critical
Publication of JP5436995B2 publication Critical patent/JP5436995B2/ja
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    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/38—Improvement of the adhesion between the insulating substrate and the metal
    • H05K3/388—Improvement of the adhesion between the insulating substrate and the metal by the use of a metallic or inorganic thin film adhesion layer
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/46—Manufacturing multilayer circuits
    • H05K3/4644—Manufacturing multilayer circuits by building the multilayer layer by layer, i.e. build-up multilayer circuits
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/46—Manufacturing multilayer circuits
    • H05K3/4644—Manufacturing multilayer circuits by building the multilayer layer by layer, i.e. build-up multilayer circuits
    • H05K3/465—Manufacturing multilayer circuits by building the multilayer layer by layer, i.e. build-up multilayer circuits by applying an insulating layer having channels for the next circuit layer
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T29/00—Metal working
    • Y10T29/49—Method of mechanical manufacture
    • Y10T29/49002—Electrical device making
    • Y10T29/49117—Conductor or circuit manufacturing
    • Y10T29/49124—On flat or curved insulated base, e.g., printed circuit, etc.
    • Y10T29/49155—Manufacturing circuit on or in base

Landscapes

  • Engineering & Computer Science (AREA)
  • Chemical & Material Sciences (AREA)
  • Inorganic Chemistry (AREA)
  • Manufacturing & Machinery (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Manufacturing Of Printed Wiring (AREA)
JP2009211368A 2009-09-14 2009-09-14 配線基板及びその製造方法 Active JP5436995B2 (ja)

Priority Applications (2)

Application Number Priority Date Filing Date Title
JP2009211368A JP5436995B2 (ja) 2009-09-14 2009-09-14 配線基板及びその製造方法
US12/869,805 US8288659B2 (en) 2009-09-14 2010-08-27 Wiring board and manufacturing method thereof

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2009211368A JP5436995B2 (ja) 2009-09-14 2009-09-14 配線基板及びその製造方法

Publications (3)

Publication Number Publication Date
JP2011061113A JP2011061113A (ja) 2011-03-24
JP2011061113A5 JP2011061113A5 (enExample) 2012-08-16
JP5436995B2 true JP5436995B2 (ja) 2014-03-05

Family

ID=43729373

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2009211368A Active JP5436995B2 (ja) 2009-09-14 2009-09-14 配線基板及びその製造方法

Country Status (2)

Country Link
US (1) US8288659B2 (enExample)
JP (1) JP5436995B2 (enExample)

Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP5602584B2 (ja) * 2010-10-28 2014-10-08 新光電気工業株式会社 配線基板及びその製造方法
KR20220033838A (ko) * 2020-09-10 2022-03-17 엘지이노텍 주식회사 인쇄회로기판 및 이의 제조 방법
EP4319510A4 (en) * 2021-03-22 2024-10-02 Panasonic Intellectual Property Management Co., Ltd. WIRING BODY, MOUNTING SUBSTRATE, WIRING TRANSFER BOARD WITH WIRING, INTERMEDIATE MATERIAL FOR WIRING BODY, AND METHOD FOR MANUFACTURING WIRING BODY
WO2025154262A1 (ja) * 2024-01-19 2025-07-24 株式会社レゾナック 配線基板を製造する方法

Family Cites Families (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH05287500A (ja) * 1992-04-07 1993-11-02 Nissin Electric Co Ltd フィルムキャリア形基板の製造方法
MY139405A (en) * 1998-09-28 2009-09-30 Ibiden Co Ltd Printed circuit board and method for its production
TW498510B (en) * 2001-06-05 2002-08-11 Chipbond Technology Corp Metallized surface wafer level package structure
JP2003218516A (ja) 2002-01-23 2003-07-31 Shinko Electric Ind Co Ltd 配線基板の製造方法
US7060364B2 (en) * 2002-12-26 2006-06-13 Mitsui Mining & Smelting Co., Ltd. Film carrier tape for mounting electronic devices thereon
US20050224977A1 (en) * 2004-01-29 2005-10-13 Yusuke Yoshimura Wiring substrate and method using the same
JP4086803B2 (ja) * 2004-03-23 2008-05-14 松下電器産業株式会社 フレキシブルプリント回路基板の製造方法
JP4494873B2 (ja) * 2004-06-02 2010-06-30 株式会社アルバック プリント配線板、プリント配線板の製造方法およびその製造装置
JP2006306009A (ja) * 2004-07-27 2006-11-09 Kakogawa Plastic Kk ２層フィルム、２層フィルムの製造方法およびプリント基板の製造方法
JP2007245646A (ja) * 2006-03-17 2007-09-27 Kakogawa Plastic Kk ２層フィルム、２層フィルムの製造方法およびプリント基板の製造方法
JP4968266B2 (ja) * 2007-01-24 2012-07-04 住友金属鉱山株式会社 ２層フレキシブル基板とその製造方法及び該２層フレキシブル基板より得られたフレキシブルプリント配線基板
JP5113544B2 (ja) * 2008-01-30 2013-01-09 新光電気工業株式会社 配線基板の製造方法
JP2009188324A (ja) * 2008-02-08 2009-08-20 Shinko Electric Ind Co Ltd 配線基板及びその製造方法

Also Published As

Publication number Publication date
US20110061916A1 (en) 2011-03-17
US8288659B2 (en) 2012-10-16
JP2011061113A (ja) 2011-03-24

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