JP5348926B2 - Soi基板の製造方法 - Google Patents
Soi基板の製造方法 Download PDFInfo
- Publication number
- JP5348926B2 JP5348926B2 JP2008102308A JP2008102308A JP5348926B2 JP 5348926 B2 JP5348926 B2 JP 5348926B2 JP 2008102308 A JP2008102308 A JP 2008102308A JP 2008102308 A JP2008102308 A JP 2008102308A JP 5348926 B2 JP5348926 B2 JP 5348926B2
- Authority
- JP
- Japan
- Prior art keywords
- layer
- single crystal
- crystal semiconductor
- substrate
- electrode layer
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
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Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D86/00—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
- H10D86/01—Manufacture or treatment
- H10D86/021—Manufacture or treatment of multiple TFTs
- H10D86/0214—Manufacture or treatment of multiple TFTs using temporary substrates
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D86/00—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
- H10D86/40—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D86/00—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
- H10D86/40—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs
- H10D86/60—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs wherein the TFTs are in active matrices
Landscapes
- Thin Film Transistor (AREA)
- Liquid Crystal (AREA)
- Electroluminescent Light Sources (AREA)
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2008102308A JP5348926B2 (ja) | 2007-05-11 | 2008-04-10 | Soi基板の製造方法 |
Applications Claiming Priority (3)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2007127148 | 2007-05-11 | ||
| JP2007127148 | 2007-05-11 | ||
| JP2008102308A JP5348926B2 (ja) | 2007-05-11 | 2008-04-10 | Soi基板の製造方法 |
Publications (3)
| Publication Number | Publication Date |
|---|---|
| JP2008311621A JP2008311621A (ja) | 2008-12-25 |
| JP2008311621A5 JP2008311621A5 (enExample) | 2011-05-12 |
| JP5348926B2 true JP5348926B2 (ja) | 2013-11-20 |
Family
ID=39969912
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2008102308A Expired - Fee Related JP5348926B2 (ja) | 2007-05-11 | 2008-04-10 | Soi基板の製造方法 |
Country Status (2)
| Country | Link |
|---|---|
| US (1) | US7825007B2 (enExample) |
| JP (1) | JP5348926B2 (enExample) |
Families Citing this family (20)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5834327A (en) * | 1995-03-18 | 1998-11-10 | Semiconductor Energy Laboratory Co., Ltd. | Method for producing display device |
| WO2009001836A1 (en) * | 2007-06-28 | 2008-12-31 | Semiconductor Energy Laboratory Co., Ltd. | Manufacturing method of semiconductor device |
| US8431451B2 (en) | 2007-06-29 | 2013-04-30 | Semicondutor Energy Laboratory Co., Ltd. | Display device and method for manufacturing the same |
| JP5548351B2 (ja) * | 2007-11-01 | 2014-07-16 | 株式会社半導体エネルギー研究所 | 半導体装置の作製方法 |
| JP5469851B2 (ja) * | 2007-11-27 | 2014-04-16 | 株式会社半導体エネルギー研究所 | 半導体装置の作製方法 |
| US7932164B2 (en) * | 2008-03-17 | 2011-04-26 | Semiconductor Energy Laboratory Co., Ltd. | Method for manufacturing semiconductor substrate by using monitor substrate to obtain optimal energy density for laser irradiation of single crystal semiconductor layers |
| SG160310A1 (en) * | 2008-10-02 | 2010-04-29 | Semiconductor Energy Lab | Manufacturing method of semiconductor substrate and semiconductor device |
| WO2011043178A1 (en) * | 2009-10-09 | 2011-04-14 | Semiconductor Energy Laboratory Co., Ltd. | Reprocessing method of semiconductor substrate, manufacturing method of reprocessed semiconductor substrate, and manufacturing method of soi substrate |
| JP5507197B2 (ja) * | 2009-10-23 | 2014-05-28 | スタンレー電気株式会社 | 光半導体素子、光半導体素子の製造方法及び光半導体装置の製造方法 |
| JP5509816B2 (ja) * | 2009-11-30 | 2014-06-04 | ソニー株式会社 | セパレータ、これを用いた電池および微多孔膜 |
| US9123529B2 (en) | 2011-06-21 | 2015-09-01 | Semiconductor Energy Laboratory Co., Ltd. | Method for reprocessing semiconductor substrate, method for manufacturing reprocessed semiconductor substrate, and method for manufacturing SOI substrate |
| US20140103499A1 (en) * | 2012-10-11 | 2014-04-17 | International Business Machines Corporation | Advanced handler wafer bonding and debonding |
| JP6654435B2 (ja) * | 2016-01-07 | 2020-02-26 | 株式会社ディスコ | ウエーハ生成方法 |
| JP6164672B1 (ja) | 2016-07-19 | 2017-07-19 | 国立研究開発法人産業技術総合研究所 | 半導体装置およびその製造方法 |
| JP6810578B2 (ja) * | 2016-11-18 | 2021-01-06 | 株式会社Screenホールディングス | ドーパント導入方法および熱処理方法 |
| US10263107B2 (en) * | 2017-05-01 | 2019-04-16 | The Regents Of The University Of California | Strain gated transistors and method |
| US10811320B2 (en) * | 2017-09-29 | 2020-10-20 | Taiwan Semiconductor Manufacturing Company, Ltd. | Footing removal in cut-metal process |
| US11167375B2 (en) | 2018-08-10 | 2021-11-09 | The Research Foundation For The State University Of New York | Additive manufacturing processes and additively manufactured products |
| JP7242362B2 (ja) * | 2019-03-18 | 2023-03-20 | キオクシア株式会社 | 半導体装置の製造方法 |
| JP2021150525A (ja) | 2020-03-19 | 2021-09-27 | キオクシア株式会社 | 半導体記憶装置及び半導体記憶装置の製造方法 |
Family Cites Families (21)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS6461943A (en) * | 1987-09-02 | 1989-03-08 | Seiko Epson Corp | Semiconductor device and manufacture thereof |
| US6534380B1 (en) * | 1997-07-18 | 2003-03-18 | Denso Corporation | Semiconductor substrate and method of manufacturing the same |
| JPH1197379A (ja) | 1997-07-25 | 1999-04-09 | Denso Corp | 半導体基板及び半導体基板の製造方法 |
| JPH11163363A (ja) | 1997-11-22 | 1999-06-18 | Semiconductor Energy Lab Co Ltd | 半導体装置およびその作製方法 |
| JP2000012864A (ja) * | 1998-06-22 | 2000-01-14 | Semiconductor Energy Lab Co Ltd | 半導体装置の作製方法 |
| JP2000124092A (ja) | 1998-10-16 | 2000-04-28 | Shin Etsu Handotai Co Ltd | 水素イオン注入剥離法によってsoiウエーハを製造する方法およびこの方法で製造されたsoiウエーハ |
| JP4379943B2 (ja) | 1999-04-07 | 2009-12-09 | 株式会社デンソー | 半導体基板の製造方法および半導体基板製造装置 |
| JP4182323B2 (ja) * | 2002-02-27 | 2008-11-19 | ソニー株式会社 | 複合基板、基板製造方法 |
| US7119365B2 (en) * | 2002-03-26 | 2006-10-10 | Sharp Kabushiki Kaisha | Semiconductor device and manufacturing method thereof, SOI substrate and display device using the same, and manufacturing method of the SOI substrate |
| JP4103447B2 (ja) * | 2002-04-30 | 2008-06-18 | 株式会社Ihi | 大面積単結晶シリコン基板の製造方法 |
| US7256104B2 (en) * | 2003-05-21 | 2007-08-14 | Canon Kabushiki Kaisha | Substrate manufacturing method and substrate processing apparatus |
| FR2855908B1 (fr) * | 2003-06-06 | 2005-08-26 | Soitec Silicon On Insulator | Procede d'obtention d'une structure comprenant au moins un substrat et une couche ultramince |
| JP4759919B2 (ja) | 2004-01-16 | 2011-08-31 | セイコーエプソン株式会社 | 電気光学装置の製造方法 |
| JP5110772B2 (ja) | 2004-02-03 | 2012-12-26 | 株式会社半導体エネルギー研究所 | 半導体薄膜層を有する基板の製造方法 |
| US7148124B1 (en) * | 2004-11-18 | 2006-12-12 | Alexander Yuri Usenko | Method for forming a fragile layer inside of a single crystalline substrate preferably for making silicon-on-insulator wafers |
| US7691730B2 (en) * | 2005-11-22 | 2010-04-06 | Corning Incorporated | Large area semiconductor on glass insulator |
| US7608521B2 (en) * | 2006-05-31 | 2009-10-27 | Corning Incorporated | Producing SOI structure using high-purity ion shower |
| US20070281440A1 (en) * | 2006-05-31 | 2007-12-06 | Jeffrey Scott Cites | Producing SOI structure using ion shower |
| US8153513B2 (en) * | 2006-07-25 | 2012-04-10 | Silicon Genesis Corporation | Method and system for continuous large-area scanning implantation process |
| CN101281912B (zh) * | 2007-04-03 | 2013-01-23 | 株式会社半导体能源研究所 | Soi衬底及其制造方法以及半导体装置 |
| JP5325404B2 (ja) * | 2007-09-21 | 2013-10-23 | 株式会社半導体エネルギー研究所 | Soi基板の作製方法 |
-
2008
- 2008-03-31 US US12/078,410 patent/US7825007B2/en not_active Expired - Fee Related
- 2008-04-10 JP JP2008102308A patent/JP5348926B2/ja not_active Expired - Fee Related
Also Published As
| Publication number | Publication date |
|---|---|
| US20080280424A1 (en) | 2008-11-13 |
| JP2008311621A (ja) | 2008-12-25 |
| US7825007B2 (en) | 2010-11-02 |
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