JP5343245B2 - シリコンインターポーザの製造方法 - Google Patents
シリコンインターポーザの製造方法 Download PDFInfo
- Publication number
- JP5343245B2 JP5343245B2 JP2008127918A JP2008127918A JP5343245B2 JP 5343245 B2 JP5343245 B2 JP 5343245B2 JP 2008127918 A JP2008127918 A JP 2008127918A JP 2008127918 A JP2008127918 A JP 2008127918A JP 5343245 B2 JP5343245 B2 JP 5343245B2
- Authority
- JP
- Japan
- Prior art keywords
- silicon substrate
- hole
- forming
- silicon
- seed layer
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
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Classifications
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
- H10W70/60—Insulating or insulated package substrates; Interposers; Redistribution layers
- H10W70/67—Insulating or insulated package substrates; Interposers; Redistribution layers characterised by their insulating layers or insulating parts
- H10W70/69—Insulating materials thereof
- H10W70/698—Semiconductor materials that are electrically insulating, e.g. undoped silicon
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W20/00—Interconnections in chips, wafers or substrates
- H10W20/20—Interconnections within wafers or substrates, e.g. through-silicon vias [TSV]
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W42/00—Arrangements for protection of devices
- H10W42/60—Arrangements for protection of devices protecting against electrostatic charges or discharges, e.g. Faraday shields
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
- H10W70/01—Manufacture or treatment
- H10W70/05—Manufacture or treatment of insulating or insulated package substrates, or of interposers, or of redistribution layers
- H10W70/095—Manufacture or treatment of insulating or insulated package substrates, or of interposers, or of redistribution layers of vias therein
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
- H10W70/60—Insulating or insulated package substrates; Interposers; Redistribution layers
- H10W70/62—Insulating or insulated package substrates; Interposers; Redistribution layers characterised by their interconnections
- H10W70/63—Vias, e.g. via plugs
- H10W70/635—Through-vias
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W90/00—Package configurations
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10H—INORGANIC LIGHT-EMITTING SEMICONDUCTOR DEVICES HAVING POTENTIAL BARRIERS
- H10H20/00—Individual inorganic light-emitting semiconductor devices having potential barriers, e.g. light-emitting diodes [LED]
- H10H20/80—Constructional details
- H10H20/85—Packages
- H10H20/857—Interconnections, e.g. lead-frames, bond wires or solder balls
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/071—Connecting or disconnecting
- H10W72/072—Connecting or disconnecting of bump connectors
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/071—Connecting or disconnecting
- H10W72/072—Connecting or disconnecting of bump connectors
- H10W72/07231—Techniques
- H10W72/07232—Compression bonding, e.g. thermocompression bonding
- H10W72/07233—Ultrasonic bonding, e.g. thermosonic bonding
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/071—Connecting or disconnecting
- H10W72/072—Connecting or disconnecting of bump connectors
- H10W72/07231—Techniques
- H10W72/07236—Soldering or alloying
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/071—Connecting or disconnecting
- H10W72/073—Connecting or disconnecting of die-attach connectors
- H10W72/07331—Connecting techniques
- H10W72/07336—Soldering or alloying
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/20—Bump connectors, e.g. solder bumps or copper pillars; Dummy bumps; Thermal bumps
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/20—Bump connectors, e.g. solder bumps or copper pillars; Dummy bumps; Thermal bumps
- H10W72/241—Dispositions, e.g. layouts
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/90—Bond pads, in general
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/90—Bond pads, in general
- H10W72/941—Dispositions of bond pads
- H10W72/9415—Dispositions of bond pads relative to the surface, e.g. recessed, protruding
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/90—Bond pads, in general
- H10W72/951—Materials of bond pads
- H10W72/952—Materials of bond pads comprising metals or metalloids, e.g. PbSn, Ag or Cu
Landscapes
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
Priority Applications (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2008127918A JP5343245B2 (ja) | 2008-05-15 | 2008-05-15 | シリコンインターポーザの製造方法 |
| US12/465,898 US8026610B2 (en) | 2008-05-15 | 2009-05-14 | Silicon interposer and method for manufacturing the same |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2008127918A JP5343245B2 (ja) | 2008-05-15 | 2008-05-15 | シリコンインターポーザの製造方法 |
Publications (3)
| Publication Number | Publication Date |
|---|---|
| JP2009277895A JP2009277895A (ja) | 2009-11-26 |
| JP2009277895A5 JP2009277895A5 (https=) | 2011-03-24 |
| JP5343245B2 true JP5343245B2 (ja) | 2013-11-13 |
Family
ID=41315404
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2008127918A Expired - Fee Related JP5343245B2 (ja) | 2008-05-15 | 2008-05-15 | シリコンインターポーザの製造方法 |
Country Status (2)
| Country | Link |
|---|---|
| US (1) | US8026610B2 (https=) |
| JP (1) | JP5343245B2 (https=) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US9508484B2 (en) | 2012-02-22 | 2016-11-29 | Phoenix Contact Gmbh & Co. Kg | Planar transmitter with a layered structure |
Families Citing this family (26)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2011029339A (ja) * | 2009-07-23 | 2011-02-10 | Sony Corp | 半導体素子およびその製造方法 |
| US8304863B2 (en) * | 2010-02-09 | 2012-11-06 | International Business Machines Corporation | Electromigration immune through-substrate vias |
| JP5498864B2 (ja) * | 2010-06-07 | 2014-05-21 | 新光電気工業株式会社 | 配線基板及び配線基板の製造方法 |
| JP5608430B2 (ja) | 2010-06-07 | 2014-10-15 | 新光電気工業株式会社 | 配線基板及び配線基板の製造方法 |
| KR101692434B1 (ko) | 2010-06-28 | 2017-01-18 | 삼성전자주식회사 | 반도체 소자 및 그 제조 방법 |
| JP2012119601A (ja) | 2010-12-03 | 2012-06-21 | Nec Corp | インターポーザ及び半導体装置 |
| WO2012142592A1 (en) * | 2011-04-14 | 2012-10-18 | Georgia Tech Research Corporation | Through package via structures in panel-based silicon substrates and methods of making the same |
| CN102811564B (zh) * | 2011-05-31 | 2015-06-17 | 精材科技股份有限公司 | 转接板及其制作方法 |
| EP2602818A1 (en) * | 2011-12-09 | 2013-06-12 | Ipdia | An interposer device |
| JP5684157B2 (ja) * | 2012-01-04 | 2015-03-11 | 株式会社東芝 | 半導体装置 |
| US8698308B2 (en) * | 2012-01-31 | 2014-04-15 | Taiwan Semiconductor Manufacturing Company, Ltd. | Bump structural designs to minimize package defects |
| US9129943B1 (en) * | 2012-03-29 | 2015-09-08 | Amkor Technology, Inc. | Embedded component package and fabrication method |
| TWI484191B (zh) * | 2012-09-28 | 2015-05-11 | Hermes Epitek Corp | 電路測試探針卡 |
| KR101439306B1 (ko) * | 2013-02-13 | 2014-09-11 | 전자부품연구원 | 연성 실리콘 인터포저 및 이의 제작방법 |
| TWI503934B (zh) * | 2013-05-09 | 2015-10-11 | 日月光半導體製造股份有限公司 | 半導體元件及其製造方法及半導體封裝結構 |
| US9214433B2 (en) * | 2013-05-21 | 2015-12-15 | Xilinx, Inc. | Charge damage protection on an interposer for a stacked die assembly |
| TWM496091U (zh) * | 2014-03-26 | 2015-02-21 | 賀喜能源股份有限公司 | 具矽基座的發光二極體及發光二極體燈具 |
| EP3035385A1 (en) * | 2014-12-16 | 2016-06-22 | IMEC vzw | Semiconductor interposer comprising a schottky diode and a method for fabricating the interposer |
| US9841548B2 (en) * | 2015-06-30 | 2017-12-12 | Apple Inc. | Electronic devices with soft input-output components |
| US10026721B2 (en) * | 2015-06-30 | 2018-07-17 | Apple Inc. | Electronic devices with soft input-output components |
| JP2017136711A (ja) | 2016-02-02 | 2017-08-10 | セイコーエプソン株式会社 | 配線基板、memsデバイス、液体噴射ヘッド及び液体噴射装置 |
| CN108109989A (zh) * | 2017-12-15 | 2018-06-01 | 西安科锐盛创新科技有限公司 | 集成电路转接板 |
| CN113228312B (zh) * | 2018-12-27 | 2024-08-13 | 波主有限公司 | 半导体发光器件 |
| KR102227215B1 (ko) * | 2018-12-27 | 2021-03-12 | 안상정 | 반도체 발광소자 |
| CN113517200B (zh) | 2020-05-27 | 2024-06-07 | 台湾积体电路制造股份有限公司 | 半导体器件及其形成方法 |
| EP4244892A1 (de) * | 2020-11-16 | 2023-09-20 | TDK Electronics AG | Siliziumsubstrat mit esd-schutzelement |
Family Cites Families (8)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6291858B1 (en) * | 2000-01-03 | 2001-09-18 | International Business Machines Corporation | Multistack 3-dimensional high density semiconductor device and method for fabrication |
| JP2004095849A (ja) * | 2002-08-30 | 2004-03-25 | Fujikura Ltd | 貫通電極付き半導体基板の製造方法、貫通電極付き半導体デバイスの製造方法 |
| JP4440554B2 (ja) * | 2002-09-24 | 2010-03-24 | 浜松ホトニクス株式会社 | 半導体装置 |
| JP4247017B2 (ja) * | 2003-03-10 | 2009-04-02 | 浜松ホトニクス株式会社 | 放射線検出器の製造方法 |
| JP4979213B2 (ja) * | 2005-08-31 | 2012-07-18 | オンセミコンダクター・トレーディング・リミテッド | 回路基板、回路基板の製造方法および回路装置 |
| JP4851163B2 (ja) * | 2005-10-31 | 2012-01-11 | オンセミコンダクター・トレーディング・リミテッド | 半導体装置の製造方法 |
| JP2007311649A (ja) | 2006-05-19 | 2007-11-29 | Fuji Electric Systems Co Ltd | シリコンインターポーザ基板を用いた高周波回路モジュール装置 |
| JP4961617B2 (ja) * | 2007-10-01 | 2012-06-27 | 新光電気工業株式会社 | 配線基板とその製造方法及び半導体装置 |
-
2008
- 2008-05-15 JP JP2008127918A patent/JP5343245B2/ja not_active Expired - Fee Related
-
2009
- 2009-05-14 US US12/465,898 patent/US8026610B2/en active Active
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US9508484B2 (en) | 2012-02-22 | 2016-11-29 | Phoenix Contact Gmbh & Co. Kg | Planar transmitter with a layered structure |
Also Published As
| Publication number | Publication date |
|---|---|
| US8026610B2 (en) | 2011-09-27 |
| US20090283914A1 (en) | 2009-11-19 |
| JP2009277895A (ja) | 2009-11-26 |
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