JP5341556B2 - 半導体装置の製造方法 - Google Patents
半導体装置の製造方法 Download PDFInfo
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- JP5341556B2 JP5341556B2 JP2009046356A JP2009046356A JP5341556B2 JP 5341556 B2 JP5341556 B2 JP 5341556B2 JP 2009046356 A JP2009046356 A JP 2009046356A JP 2009046356 A JP2009046356 A JP 2009046356A JP 5341556 B2 JP5341556 B2 JP 5341556B2
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- 238000004519 manufacturing process Methods 0.000 title claims description 20
- 239000011347 resin Substances 0.000 claims description 111
- 229920005989 resin Polymers 0.000 claims description 111
- 238000007789 sealing Methods 0.000 claims description 61
- 238000000034 method Methods 0.000 claims description 19
- 239000002184 metal Substances 0.000 claims description 16
- 229910052751 metal Inorganic materials 0.000 claims description 16
- 238000002347 injection Methods 0.000 claims description 15
- 239000007924 injection Substances 0.000 claims description 15
- 229910001111 Fine metal Inorganic materials 0.000 claims description 7
- 238000003825 pressing Methods 0.000 description 6
- 239000007788 liquid Substances 0.000 description 4
- 229910052802 copper Inorganic materials 0.000 description 3
- 239000010949 copper Substances 0.000 description 3
- 239000000463 material Substances 0.000 description 3
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 2
- 238000013459 approach Methods 0.000 description 2
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- 230000015556 catabolic process Effects 0.000 description 1
- 230000006866 deterioration Effects 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
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- 230000005496 eutectics Effects 0.000 description 1
- 230000005669 field effect Effects 0.000 description 1
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 description 1
- 239000010931 gold Substances 0.000 description 1
- 229910052737 gold Inorganic materials 0.000 description 1
- 238000013007 heat curing Methods 0.000 description 1
- 238000010438 heat treatment Methods 0.000 description 1
- 238000001746 injection moulding Methods 0.000 description 1
- 230000001678 irradiating effect Effects 0.000 description 1
- 229910044991 metal oxide Inorganic materials 0.000 description 1
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- 229910000679 solder Inorganic materials 0.000 description 1
- 239000007787 solid Substances 0.000 description 1
- 230000009466 transformation Effects 0.000 description 1
- 238000011144 upstream manufacturing Methods 0.000 description 1
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Description
特開平1−205432号公報
キャビティ36Aは、アイランド12が図示され、キャビティ36Bは、リードLが図示されている。本来この二つのキャビティには、同じものが封止されるが、ここでは図面の都合上、別のものを示した。
両方ともにアイランドを有し、そのアイランドの裏面が封止されるタイプである。よってアイランド12の裏面と下金型LDの間は、その隙間が狭く、未充填部分が無いようにするためにも、注入口P2は、アイランド12の高さとほぼ同等か、または±100μmの間に位置する。また隙間が裏面にあると言う事は、その厚さ分変動し易いと言う事になる。
図3(B)は図3(A)を部分的に拡大して示す平面図である。ここでは、上側の外枠52と下側の外枠52とを連続させるように、タイバー58が延在している。紙面上では、左側にユニット56A−56Dが一列に配置されてタイバー58により連結され、右側にユニット56E−56Hが一列に配置されてタイバー58により連結されている。各ユニットは、アイランド12と、リード14A、14B、14Cから成る。そして、リード14A、14Cの一端はアイランド12に接近すると共に、リード14Bはアイランド12と一体的に導出している。ユニット56Aのリード14A、14B、14Cの中間部および端部は、タイバー58と連続している。同様に、他のユニット56B−56Dもタイバー58と連続している。また、右側に一列に配置されるユニット56E−56Hのリードもタイバー58により連結されている。ここで、横方向に隣接するユニットのリードは、千鳥状に配置されても良い。この場合は、例えば、ユニット56Aのリード14A−14Cと、ユニット56Eのリード14A−14Cが対向して千鳥状に配置される。
しかしながら本発明では、このP1を従来よりも押し上げ、溶融樹脂がアイランド12に力を作用させる前で、隣のキャビティ36Bに射出させている。このことにより、封止樹脂16がアイランド12に与える圧力が低減されて、結果的にアイランド12の下方への移動が抑制される。
以上の工程を経て、図2に示す構成の半導体装置10が製造される。
12 アイランド
14,14A,14B,14C リード
16 封止樹脂
20 半導体素子
22 貫通孔
24 金属細線
30 金型
32 上金型
34 下金型
36,36A,36B,36C,36D,36E キャビティ
38 ランナー
40 プランジャー
42 ポッド
44 ランナー
50 リードフレーム
52 外枠
54 ブロック
56、56A、56B、56C、56D、56E、56F、56G、56H ユニット
58 タイバー
Claims (4)
- 第1の方向に沿って複数のキャビティを整列して配置し、隣接するキャビティの間をランナーを介して互いに連通した金型を用意する工程と、
前記金型にリードフレームを配置し、前記リードフレームに含まれるアイランド、前記アイランドの近傍に一端が配置されたリード、前記アイランドに固着された半導体素子および前記リードと前記半導体素子とを接続する金属細線を各々の前記キャビティに収納する工程と、
前記ランナーを介して前記複数のキャビティに封止樹脂を注入し、前記アイランド、前記リード、前記半導体素子および前記金属細線を前記封止樹脂で封止する工程と、を具備する半導体装置の製造方法に於いて、
前記封止する工程では、一のキャビティから前記一のキャビティの排出口を経由して前記ランナーに排出された前記封止樹脂を、前記ランナーから前記一のキャビティに隣接する他のキャビティの注入口を経由して前記他のキャビティに注入するとともに、
平面視において、前記キャビティの排出口と注入口とを前記一方向に対して右または左のどちらか偏った位置に交互に配置し、
断面視において、前記排出口を前記注入口よりも上方に配置したことを特徴とする半導体装置の製造方法。 - 前記キャビティには前記ランナーを介して連通した第1キャビティと第2キャビティが含まれ、
平面視で、前記第1キャビティの前記排出口は前記キャビティの右または左のどちらか一方に偏った位置に配置され、
平面視で、前記第2キャビティの前記排出口は前記キャビティの右または左のどちらか他方に偏った位置に配置され、
前記第1キャビティと前記第2キャビティを通過する前記封止樹脂は蛇行しながら注入されることを特徴とする請求項1に記載の半導体装置の製造方法。 - 前記封止樹脂が硬化した後、前記金型から前記半導体装置を取り出し、前記ランナーに充填された前記封止樹脂を取り除き、前記半導体装置の側面に切除痕を設けることを特徴とする請求項1または請求項2に記載の半導体装置の製造方法。
- 前記アイランドは、前記注入口に接近する第1側辺と、前記第1側辺に対向して前記排出口に接近する第2側辺と、前記第1側辺とは交差してなる第3側辺と、前記第3側辺に対向する第4側辺とを有し、
前記リードフレームには、前記アイランドの前記第1側辺および前記第2側辺と連続する保持リードが含まれ、
金属細線が接続される前記リードの一端は、前記アイランドの前記第3側辺および前記第4側辺の近傍に配置されることを特徴とする請求項1から請求項3の何れかに記載の半導体装置の製造方法。
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JP2009046356A JP5341556B2 (ja) | 2008-09-30 | 2009-02-27 | 半導体装置の製造方法 |
US12/568,486 US8105883B2 (en) | 2008-09-30 | 2009-09-28 | Molding die with tilted runner, method of manufacturing semiconductor device using the same, and semiconductor device made by the method |
CN200910179607XA CN101930933B (zh) | 2008-09-30 | 2009-09-29 | 半导体装置及其制造方法 |
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JP4852088B2 (ja) * | 2008-11-04 | 2012-01-11 | 株式会社東芝 | バイアス回路 |
JP5333402B2 (ja) * | 2010-10-06 | 2013-11-06 | 三菱電機株式会社 | 半導体装置の製造方法 |
CN102856217B (zh) * | 2011-06-30 | 2018-05-22 | 恩智浦美国有限公司 | 用于模塑半导体器件的装置和方法 |
DE102012207678A1 (de) * | 2012-05-09 | 2013-11-14 | Osram Opto Semiconductors Gmbh | Vorrichtung zum formen einer gehäusestruktur für eine mehrzahl von elektronischen bauteilen und gehäusestruktur für eine mehrzahl von elektronischen bauteilen |
US9911838B2 (en) * | 2012-10-26 | 2018-03-06 | Ixys Corporation | IGBT die structure with auxiliary P well terminal |
US9947613B2 (en) | 2014-11-07 | 2018-04-17 | Mitsubishi Electric Corporation | Power semiconductor device and method for manufacturing the same |
US9583421B2 (en) | 2015-07-16 | 2017-02-28 | Semiconductor Components Industries, Llc | Recessed lead leadframe packages |
CN107645874A (zh) * | 2016-07-20 | 2018-01-30 | 珠海市声驰电器有限公司 | 一种密封电路结构及其灌封方法 |
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JP2020123691A (ja) * | 2019-01-31 | 2020-08-13 | 株式会社三社電機製作所 | 半導体製品 |
US20210043466A1 (en) * | 2019-08-06 | 2021-02-11 | Texas Instruments Incorporated | Universal semiconductor package molds |
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