JP5322520B2 - 半導体装置、電子機器、及び半導体装置の作製方法 - Google Patents

半導体装置、電子機器、及び半導体装置の作製方法 Download PDF

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Publication number
JP5322520B2
JP5322520B2 JP2008179919A JP2008179919A JP5322520B2 JP 5322520 B2 JP5322520 B2 JP 5322520B2 JP 2008179919 A JP2008179919 A JP 2008179919A JP 2008179919 A JP2008179919 A JP 2008179919A JP 5322520 B2 JP5322520 B2 JP 5322520B2
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Prior art keywords
single crystal
crystal semiconductor
layer
semiconductor layer
substrate
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JP2008179919A
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Japanese (ja)
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JP2009044142A (ja
JP2009044142A5 (OSRAM
Inventor
哲弥 掛端
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Semiconductor Energy Laboratory Co Ltd
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Semiconductor Energy Laboratory Co Ltd
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Priority to JP2008179919A priority Critical patent/JP5322520B2/ja
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Publication of JP2009044142A5 publication Critical patent/JP2009044142A5/ja
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    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D86/00Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
    • H10D86/01Manufacture or treatment
    • H10D86/021Manufacture or treatment of multiple TFTs
    • H10D86/0214Manufacture or treatment of multiple TFTs using temporary substrates
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D86/00Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
    • H10D86/40Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D86/00Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
    • H10D86/40Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs
    • H10D86/60Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs wherein the TFTs are in active matrices
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00Field-effect transistors [FET]
    • H10D30/01Manufacture or treatment
    • H10D30/021Manufacture or treatment of FETs having insulated gates [IGFET]
    • H10D30/031Manufacture or treatment of FETs having insulated gates [IGFET] of thin-film transistors [TFT]
    • H10D30/0321Manufacture or treatment of FETs having insulated gates [IGFET] of thin-film transistors [TFT] comprising silicon, e.g. amorphous silicon or polysilicon
    • H10D30/0323Manufacture or treatment of FETs having insulated gates [IGFET] of thin-film transistors [TFT] comprising silicon, e.g. amorphous silicon or polysilicon comprising monocrystalline silicon

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  • Thin Film Transistor (AREA)
  • Recrystallisation Techniques (AREA)
  • Electroluminescent Light Sources (AREA)
  • Devices For Indicating Variable Information By Combining Individual Elements (AREA)
JP2008179919A 2007-07-13 2008-07-10 半導体装置、電子機器、及び半導体装置の作製方法 Expired - Fee Related JP5322520B2 (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2008179919A JP5322520B2 (ja) 2007-07-13 2008-07-10 半導体装置、電子機器、及び半導体装置の作製方法

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
JP2007184984 2007-07-13
JP2007184984 2007-07-13
JP2008179919A JP5322520B2 (ja) 2007-07-13 2008-07-10 半導体装置、電子機器、及び半導体装置の作製方法

Publications (3)

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JP2009044142A JP2009044142A (ja) 2009-02-26
JP2009044142A5 JP2009044142A5 (OSRAM) 2011-06-23
JP5322520B2 true JP5322520B2 (ja) 2013-10-23

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Country Status (2)

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US (1) US7790563B2 (OSRAM)
JP (1) JP5322520B2 (OSRAM)

Families Citing this family (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP5580010B2 (ja) * 2008-09-05 2014-08-27 株式会社半導体エネルギー研究所 半導体装置の作製方法
US20100081251A1 (en) * 2008-09-29 2010-04-01 Semiconductor Energy Laboratory Co., Ltd. Method for manufacturing soi substrate
US8048754B2 (en) * 2008-09-29 2011-11-01 Semiconductor Energy Laboratory Co., Ltd. Method for manufacturing SOI substrate and method for manufacturing single crystal semiconductor layer
JP5611571B2 (ja) * 2008-11-27 2014-10-22 株式会社半導体エネルギー研究所 半導体基板の作製方法及び半導体装置の作製方法
JP2011077504A (ja) * 2009-09-02 2011-04-14 Semiconductor Energy Lab Co Ltd 半導体装置の作製方法
JP5755931B2 (ja) 2010-04-28 2015-07-29 株式会社半導体エネルギー研究所 半導体膜の作製方法、電極の作製方法、2次電池の作製方法、および太陽電池の作製方法
JP5672786B2 (ja) * 2010-06-15 2015-02-18 株式会社デンソー 炭化珪素半導体基板の製造方法およびその基板を用いた炭化珪素半導体装置
US8735263B2 (en) 2011-01-21 2014-05-27 Semiconductor Energy Laboratory Co., Ltd. Method for manufacturing SOI substrate
CN104483771B (zh) * 2014-10-28 2018-02-06 上海中航光电子有限公司 一种tft阵列基板、显示面板及显示装置

Family Cites Families (19)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2681472B1 (fr) * 1991-09-18 1993-10-29 Commissariat Energie Atomique Procede de fabrication de films minces de materiau semiconducteur.
US5624851A (en) * 1993-03-12 1997-04-29 Semiconductor Energy Laboratory Co., Ltd. Process of fabricating a semiconductor device in which one portion of an amorphous silicon film is thermally crystallized and another portion is laser crystallized
JP3067949B2 (ja) * 1994-06-15 2000-07-24 シャープ株式会社 電子装置および液晶表示装置
JP3572713B2 (ja) * 1995-04-11 2004-10-06 ソニー株式会社 半導体量子細線デバイスの製造方法
TW297138B (OSRAM) * 1995-05-31 1997-02-01 Handotai Energy Kenkyusho Kk
JP4103968B2 (ja) * 1996-09-18 2008-06-18 株式会社半導体エネルギー研究所 絶縁ゲイト型半導体装置
US6388652B1 (en) * 1997-08-20 2002-05-14 Semiconductor Energy Laboratory Co., Ltd. Electrooptical device
US6686623B2 (en) * 1997-11-18 2004-02-03 Semiconductor Energy Laboratory Co., Ltd. Nonvolatile memory and electronic apparatus
JPH11163363A (ja) 1997-11-22 1999-06-18 Semiconductor Energy Lab Co Ltd 半導体装置およびその作製方法
JP2000012864A (ja) * 1998-06-22 2000-01-14 Semiconductor Energy Lab Co Ltd 半導体装置の作製方法
US6271101B1 (en) * 1998-07-29 2001-08-07 Semiconductor Energy Laboratory Co., Ltd. Process for production of SOI substrate and process for production of semiconductor device
JP4476390B2 (ja) * 1998-09-04 2010-06-09 株式会社半導体エネルギー研究所 半導体装置の作製方法
JP4126912B2 (ja) * 2001-06-22 2008-07-30 セイコーエプソン株式会社 電気光学装置及びその製造方法並びに電子機器
JP2005026472A (ja) * 2003-07-02 2005-01-27 Sharp Corp 半導体装置の製造方法
US20050048706A1 (en) * 2003-08-27 2005-03-03 Semiconductor Energy Laboratory Co., Ltd. Method of manufacturing semiconductor device
JP4759919B2 (ja) * 2004-01-16 2011-08-31 セイコーエプソン株式会社 電気光学装置の製造方法
JP4540359B2 (ja) * 2004-02-10 2010-09-08 シャープ株式会社 半導体装置およびその製造方法
WO2005112129A1 (ja) * 2004-05-13 2005-11-24 Fujitsu Limited 半導体装置およびその製造方法、半導体基板の製造方法
JP4542492B2 (ja) * 2005-10-07 2010-09-15 セイコーエプソン株式会社 電気光学装置及びその製造方法、電子機器、並びに半導体装置

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JP2009044142A (ja) 2009-02-26
US7790563B2 (en) 2010-09-07
US20090017568A1 (en) 2009-01-15

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