JP5193898B2 - 半導体装置及び電子装置 - Google Patents
半導体装置及び電子装置 Download PDFInfo
- Publication number
- JP5193898B2 JP5193898B2 JP2009029452A JP2009029452A JP5193898B2 JP 5193898 B2 JP5193898 B2 JP 5193898B2 JP 2009029452 A JP2009029452 A JP 2009029452A JP 2009029452 A JP2009029452 A JP 2009029452A JP 5193898 B2 JP5193898 B2 JP 5193898B2
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- Prior art keywords
- semiconductor device
- electronic component
- pad
- wiring
- wiring pattern
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W90/00—Package configurations
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10P72/00—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof
- H10P72/70—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof for supporting or gripping
- H10P72/74—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof for supporting or gripping using temporarily an auxiliary support
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
- H10W70/01—Manufacture or treatment
- H10W70/05—Manufacture or treatment of insulating or insulated package substrates, or of interposers, or of redistribution layers
- H10W70/08—Manufacture or treatment of insulating or insulated package substrates, or of interposers, or of redistribution layers by depositing layers on the chip or wafer, e.g. "chip-first" RDLs
- H10W70/09—Manufacture or treatment of insulating or insulated package substrates, or of interposers, or of redistribution layers by depositing layers on the chip or wafer, e.g. "chip-first" RDLs extending onto an encapsulation that laterally surrounds the chip or wafer, e.g. fan-out wafer level package [FOWLP] RDLs
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
- H10W70/01—Manufacture or treatment
- H10W70/05—Manufacture or treatment of insulating or insulated package substrates, or of interposers, or of redistribution layers
- H10W70/093—Connecting or disconnecting other interconnections thereto or therefrom, e.g. connecting bond wires or bumps
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
- H10W70/60—Insulating or insulated package substrates; Interposers; Redistribution layers
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
- H10W70/60—Insulating or insulated package substrates; Interposers; Redistribution layers
- H10W70/62—Insulating or insulated package substrates; Interposers; Redistribution layers characterised by their interconnections
- H10W70/65—Shapes or dispositions of interconnections
- H10W70/654—Top-view layouts
- H10W70/655—Fan-out layouts
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/20—Bump connectors, e.g. solder bumps or copper pillars; Dummy bumps; Thermal bumps
- H10W72/241—Dispositions, e.g. layouts
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/50—Bond wires
- H10W72/551—Materials of bond wires
- H10W72/552—Materials of bond wires comprising metals or metalloids, e.g. silver
- H10W72/5522—Materials of bond wires comprising metals or metalloids, e.g. silver comprising gold [Au]
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/50—Bond wires
- H10W72/59—Bond pads specially adapted therefor
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/851—Dispositions of multiple connectors or interconnections
- H10W72/874—On different surfaces
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/851—Dispositions of multiple connectors or interconnections
- H10W72/874—On different surfaces
- H10W72/884—Die-attach connectors and bond wires
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/90—Bond pads, in general
- H10W72/921—Structures or relative sizes of bond pads
- H10W72/922—Bond pads being integral with underlying chip-level interconnections
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/90—Bond pads, in general
- H10W72/921—Structures or relative sizes of bond pads
- H10W72/922—Bond pads being integral with underlying chip-level interconnections
- H10W72/9223—Bond pads being integral with underlying chip-level interconnections with redistribution layers [RDL]
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/90—Bond pads, in general
- H10W72/921—Structures or relative sizes of bond pads
- H10W72/923—Bond pads having multiple stacked layers
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/90—Bond pads, in general
- H10W72/941—Dispositions of bond pads
- H10W72/9413—Dispositions of bond pads on encapsulations
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/90—Bond pads, in general
- H10W72/941—Dispositions of bond pads
- H10W72/9415—Dispositions of bond pads relative to the surface, e.g. recessed, protruding
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/90—Bond pads, in general
- H10W72/941—Dispositions of bond pads
- H10W72/942—Dispositions of bond pads relative to underlying supporting features, e.g. bond pads, RDLs or vias
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W74/00—Encapsulations, e.g. protective coatings
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W74/00—Encapsulations, e.g. protective coatings
- H10W74/01—Manufacture or treatment
- H10W74/019—Manufacture or treatment using temporary auxiliary substrates
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W74/00—Encapsulations, e.g. protective coatings
- H10W74/10—Encapsulations, e.g. protective coatings characterised by their shape or disposition
- H10W74/131—Encapsulations, e.g. protective coatings characterised by their shape or disposition the semiconductor body being only partially enclosed
- H10W74/142—Encapsulations, e.g. protective coatings characterised by their shape or disposition the semiconductor body being only partially enclosed the encapsulations exposing the passive side of the semiconductor body
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W74/00—Encapsulations, e.g. protective coatings
- H10W74/10—Encapsulations, e.g. protective coatings characterised by their shape or disposition
- H10W74/15—Encapsulations, e.g. protective coatings characterised by their shape or disposition on active surfaces of flip-chip devices, e.g. underfills
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W90/00—Package configurations
- H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
- H10W90/721—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bump connectors
- H10W90/722—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bump connectors between stacked chips
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W90/00—Package configurations
- H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
- H10W90/721—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bump connectors
- H10W90/724—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bump connectors between a chip and a stacked insulating package substrate, interposer or RDL
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W90/00—Package configurations
- H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
- H10W90/731—Package configurations characterised by the relative positions of pads or connectors relative to package parts of die-attach connectors
- H10W90/734—Package configurations characterised by the relative positions of pads or connectors relative to package parts of die-attach connectors between a chip and a stacked insulating package substrate, interposer or RDL
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W90/00—Package configurations
- H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
- H10W90/751—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires
- H10W90/754—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires between a chip and a stacked insulating package substrate, interposer or RDL
Landscapes
- Production Of Multi-Layered Print Wiring Board (AREA)
Priority Applications (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2009029452A JP5193898B2 (ja) | 2009-02-12 | 2009-02-12 | 半導体装置及び電子装置 |
| US12/702,705 US8344492B2 (en) | 2009-02-12 | 2010-02-09 | Semiconductor device and method of manufacturing the same, and electronic apparatus |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2009029452A JP5193898B2 (ja) | 2009-02-12 | 2009-02-12 | 半導体装置及び電子装置 |
Publications (3)
| Publication Number | Publication Date |
|---|---|
| JP2010186847A JP2010186847A (ja) | 2010-08-26 |
| JP2010186847A5 JP2010186847A5 (https=) | 2012-03-01 |
| JP5193898B2 true JP5193898B2 (ja) | 2013-05-08 |
Family
ID=42539740
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2009029452A Active JP5193898B2 (ja) | 2009-02-12 | 2009-02-12 | 半導体装置及び電子装置 |
Country Status (2)
| Country | Link |
|---|---|
| US (1) | US8344492B2 (https=) |
| JP (1) | JP5193898B2 (https=) |
Families Citing this family (30)
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| TWI362732B (en) * | 2008-04-07 | 2012-04-21 | Nanya Technology Corp | Multi-chip stack package |
| US8093704B2 (en) * | 2008-06-03 | 2012-01-10 | Intel Corporation | Package on package using a bump-less build up layer (BBUL) package |
| US20110147908A1 (en) * | 2009-12-17 | 2011-06-23 | Peng Sun | Module for Use in a Multi Package Assembly and a Method of Making the Module and the Multi Package Assembly |
| KR101712043B1 (ko) | 2010-10-14 | 2017-03-03 | 삼성전자주식회사 | 적층 반도체 패키지, 상기 적층 반도체 패키지를 포함하는 반도체 장치 및 상기 적층 반도체 패키지의 제조 방법 |
| KR101145041B1 (ko) * | 2010-10-19 | 2012-05-11 | 주식회사 네패스 | 반도체칩 패키지, 반도체 모듈 및 그 제조 방법 |
| US20120267782A1 (en) * | 2011-04-25 | 2012-10-25 | Yung-Hsiang Chen | Package-on-package semiconductor device |
| KR20130005465A (ko) * | 2011-07-06 | 2013-01-16 | 삼성전자주식회사 | 반도체 스택 패키지 장치 |
| JP2013069807A (ja) * | 2011-09-21 | 2013-04-18 | Shinko Electric Ind Co Ltd | 半導体パッケージ及びその製造方法 |
| KR20130090143A (ko) * | 2012-02-03 | 2013-08-13 | 삼성전자주식회사 | 패키지-온-패키지 타입의 반도체 패키지 및 그 제조방법 |
| US20140145348A1 (en) * | 2012-11-26 | 2014-05-29 | Samsung Electro-Mechanics Co., Ltd. | Rf (radio frequency) module and method of maufacturing the same |
| US9305853B2 (en) * | 2013-08-30 | 2016-04-05 | Apple Inc. | Ultra fine pitch PoP coreless package |
| KR102109042B1 (ko) * | 2013-09-16 | 2020-05-12 | 엘지이노텍 주식회사 | 반도체 패키지 |
| TWI646639B (zh) * | 2013-09-16 | 2019-01-01 | Lg伊諾特股份有限公司 | 半導體封裝 |
| US9502270B2 (en) | 2014-07-08 | 2016-11-22 | Taiwan Semiconductor Manufacturing Company, Ltd. | Semiconductor device packages, packaging methods, and packaged semiconductor devices |
| TWI536074B (zh) * | 2015-03-31 | 2016-06-01 | 業鑫科技顧問股份有限公司 | 電連接結構及陣列基板 |
| US10177090B2 (en) | 2015-07-28 | 2019-01-08 | Bridge Semiconductor Corporation | Package-on-package semiconductor assembly having bottom device confined by dielectric recess |
| US10566289B2 (en) | 2015-10-13 | 2020-02-18 | Samsung Electronics Co., Ltd. | Fan-out semiconductor package and manufacturing method thereof |
| KR20170043427A (ko) * | 2015-10-13 | 2017-04-21 | 삼성전기주식회사 | 전자부품 패키지 및 그 제조방법 |
| US9691723B2 (en) * | 2015-10-30 | 2017-06-27 | Taiwan Semiconductor Manufacturing Company, Ltd. | Connector formation methods and packaged semiconductor devices |
| US10818621B2 (en) * | 2016-03-25 | 2020-10-27 | Samsung Electronics Co., Ltd. | Fan-out semiconductor package |
| US10373884B2 (en) | 2016-03-31 | 2019-08-06 | Samsung Electronics Co., Ltd. | Fan-out semiconductor package for packaging semiconductor chip and capacitors |
| KR101952863B1 (ko) * | 2016-06-21 | 2019-02-28 | 삼성전기주식회사 | 팬-아웃 반도체 패키지 |
| JP6562467B2 (ja) * | 2016-06-21 | 2019-08-21 | サムスン エレクトロニクス カンパニー リミテッド | ファン−アウト半導体パッケージ |
| KR102055593B1 (ko) * | 2017-02-03 | 2019-12-13 | 삼성전자주식회사 | 팬-아웃 반도체 패키지 |
| KR20190013051A (ko) | 2017-07-31 | 2019-02-11 | 삼성전기주식회사 | 팬-아웃 반도체 패키지 |
| KR102380821B1 (ko) * | 2017-09-15 | 2022-03-31 | 삼성전자주식회사 | 팬-아웃 반도체 패키지 |
| TWI736780B (zh) * | 2017-10-31 | 2021-08-21 | 台灣積體電路製造股份有限公司 | 晶片封裝及其形成方法 |
| US11322449B2 (en) | 2017-10-31 | 2022-05-03 | Taiwan Semiconductor Manufacturing Co., Ltd. | Package with fan-out structures |
| KR101963292B1 (ko) * | 2017-10-31 | 2019-03-28 | 삼성전기주식회사 | 팬-아웃 반도체 패키지 |
| CN218730889U (zh) * | 2020-03-06 | 2023-03-24 | 株式会社村田制作所 | 散热构造体以及电子设备 |
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| US5222014A (en) | 1992-03-02 | 1993-06-22 | Motorola, Inc. | Three-dimensional multi-chip pad array carrier |
| US5353498A (en) * | 1993-02-08 | 1994-10-11 | General Electric Company | Method for fabricating an integrated circuit module |
| JP2001144218A (ja) * | 1999-11-17 | 2001-05-25 | Sony Corp | 半導体装置及び半導体装置の製造方法 |
| AU2001283257A1 (en) | 2000-08-16 | 2002-02-25 | Intel Corporation | Direct build-up layer on an encapsulated die package |
| US6734534B1 (en) | 2000-08-16 | 2004-05-11 | Intel Corporation | Microelectronic substrate with integrated devices |
| JP2003298005A (ja) * | 2002-02-04 | 2003-10-17 | Casio Comput Co Ltd | 半導体装置およびその製造方法 |
| JP3773896B2 (ja) * | 2002-02-15 | 2006-05-10 | Necエレクトロニクス株式会社 | 半導体装置の製造方法 |
| JP4028749B2 (ja) * | 2002-04-15 | 2007-12-26 | 日本特殊陶業株式会社 | 配線基板 |
| US20040061213A1 (en) * | 2002-09-17 | 2004-04-01 | Chippac, Inc. | Semiconductor multi-package module having package stacked over die-up flip chip ball grid array package and having wire bond interconnect between stacked packages |
| JP4096774B2 (ja) * | 2003-03-24 | 2008-06-04 | セイコーエプソン株式会社 | 半導体装置、電子デバイス、電子機器、半導体装置の製造方法及び電子デバイスの製造方法 |
| US7180165B2 (en) * | 2003-09-05 | 2007-02-20 | Sanmina, Sci Corporation | Stackable electronic assembly |
| JP2005353837A (ja) * | 2004-06-10 | 2005-12-22 | Shinko Electric Ind Co Ltd | 半導体装置及びその製造方法 |
| US7279786B2 (en) * | 2005-02-04 | 2007-10-09 | Stats Chippac Ltd. | Nested integrated circuit package on package system |
| JP2007123524A (ja) * | 2005-10-27 | 2007-05-17 | Shinko Electric Ind Co Ltd | 電子部品内蔵基板 |
| US20070141751A1 (en) * | 2005-12-16 | 2007-06-21 | Mistry Addi B | Stackable molded packages and methods of making the same |
| US7800212B2 (en) * | 2007-12-27 | 2010-09-21 | Stats Chippac Ltd. | Mountable integrated circuit package system with stacking interposer |
| EP2136610A4 (en) * | 2008-01-25 | 2011-07-13 | Ibiden Co Ltd | MULTILAYER CONDUCTOR PLATE AND METHOD FOR THE PRODUCTION THEREOF |
-
2009
- 2009-02-12 JP JP2009029452A patent/JP5193898B2/ja active Active
-
2010
- 2010-02-09 US US12/702,705 patent/US8344492B2/en active Active
Also Published As
| Publication number | Publication date |
|---|---|
| JP2010186847A (ja) | 2010-08-26 |
| US20100200975A1 (en) | 2010-08-12 |
| US8344492B2 (en) | 2013-01-01 |
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