JP5122192B2 - 半導体素子実装装置 - Google Patents

半導体素子実装装置 Download PDF

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Publication number
JP5122192B2
JP5122192B2 JP2007176209A JP2007176209A JP5122192B2 JP 5122192 B2 JP5122192 B2 JP 5122192B2 JP 2007176209 A JP2007176209 A JP 2007176209A JP 2007176209 A JP2007176209 A JP 2007176209A JP 5122192 B2 JP5122192 B2 JP 5122192B2
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JP
Japan
Prior art keywords
semiconductor element
elastomer
heating
pressing
mounting apparatus
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
JP2007176209A
Other languages
English (en)
Japanese (ja)
Other versions
JP2009016544A5 (enExample
JP2009016544A (ja
Inventor
一博 登
善広 戸村
雄一郎 山田
鉄平 岩瀬
謙太郎 熊澤
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Corp
Panasonic Holdings Corp
Original Assignee
Panasonic Corp
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Panasonic Corp, Matsushita Electric Industrial Co Ltd filed Critical Panasonic Corp
Priority to JP2007176209A priority Critical patent/JP5122192B2/ja
Publication of JP2009016544A publication Critical patent/JP2009016544A/ja
Publication of JP2009016544A5 publication Critical patent/JP2009016544A5/ja
Application granted granted Critical
Publication of JP5122192B2 publication Critical patent/JP5122192B2/ja
Expired - Fee Related legal-status Critical Current
Anticipated expiration legal-status Critical

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Classifications

    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B30—PRESSES
    • B30B—PRESSES IN GENERAL
    • B30B5/00—Presses characterised by the use of pressing means other than those mentioned in the preceding groups
    • B30B5/02—Presses characterised by the use of pressing means other than those mentioned in the preceding groups wherein the pressing means is in the form of a flexible element, e.g. diaphragm, urged by fluid pressure
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B30—PRESSES
    • B30B—PRESSES IN GENERAL
    • B30B15/00—Details of, or accessories for, presses; Auxiliary measures in connection with pressing
    • B30B15/06—Platens or press rams
    • B30B15/065—Press rams
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/071—Connecting or disconnecting
    • H10W72/0711—Apparatus therefor
    • H10W72/07141—Means for applying energy, e.g. ovens or lasers
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/071—Connecting or disconnecting
    • H10W72/0711—Apparatus therefor
    • H10W72/07173—Means for moving chips, wafers or other parts, e.g. conveyor belts
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/071—Connecting or disconnecting
    • H10W72/072—Connecting or disconnecting of bump connectors
    • H10W72/07202—Connecting or disconnecting of bump connectors using auxiliary members
    • H10W72/07204—Connecting or disconnecting of bump connectors using auxiliary members using temporary auxiliary members, e.g. sacrificial coatings
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/071—Connecting or disconnecting
    • H10W72/072—Connecting or disconnecting of bump connectors
    • H10W72/07202—Connecting or disconnecting of bump connectors using auxiliary members
    • H10W72/07204—Connecting or disconnecting of bump connectors using auxiliary members using temporary auxiliary members, e.g. sacrificial coatings
    • H10W72/07207—Temporary substrates, e.g. removable substrates
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/071—Connecting or disconnecting
    • H10W72/073—Connecting or disconnecting of die-attach connectors
    • H10W72/07302—Connecting or disconnecting of die-attach connectors using an auxiliary member
    • H10W72/07304—Connecting or disconnecting of die-attach connectors using an auxiliary member the auxiliary member being temporary, e.g. a sacrificial coating
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/071—Connecting or disconnecting
    • H10W72/073—Connecting or disconnecting of die-attach connectors
    • H10W72/07331—Connecting techniques
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W74/00—Encapsulations, e.g. protective coatings
    • H10W74/10—Encapsulations, e.g. protective coatings characterised by their shape or disposition
    • H10W74/15—Encapsulations, e.g. protective coatings characterised by their shape or disposition on active surfaces of flip-chip devices, e.g. underfills
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/721—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bump connectors
    • H10W90/724—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bump connectors between a chip and a stacked insulating package substrate, interposer or RDL
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/731—Package configurations characterised by the relative positions of pads or connectors relative to package parts of die-attach connectors
    • H10W90/734—Package configurations characterised by the relative positions of pads or connectors relative to package parts of die-attach connectors between a chip and a stacked insulating package substrate, interposer or RDL

Landscapes

  • Engineering & Computer Science (AREA)
  • Mechanical Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Fluid Mechanics (AREA)
  • Wire Bonding (AREA)
JP2007176209A 2007-07-04 2007-07-04 半導体素子実装装置 Expired - Fee Related JP5122192B2 (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2007176209A JP5122192B2 (ja) 2007-07-04 2007-07-04 半導体素子実装装置

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2007176209A JP5122192B2 (ja) 2007-07-04 2007-07-04 半導体素子実装装置

Publications (3)

Publication Number Publication Date
JP2009016544A JP2009016544A (ja) 2009-01-22
JP2009016544A5 JP2009016544A5 (enExample) 2010-08-05
JP5122192B2 true JP5122192B2 (ja) 2013-01-16

Family

ID=40357101

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2007176209A Expired - Fee Related JP5122192B2 (ja) 2007-07-04 2007-07-04 半導体素子実装装置

Country Status (1)

Country Link
JP (1) JP5122192B2 (enExample)

Families Citing this family (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2009128206A1 (ja) * 2008-04-18 2009-10-22 パナソニック株式会社 フリップチップ実装方法とフリップチップ実装装置およびそれに使用されるツール保護シート
JP6043058B2 (ja) * 2011-11-07 2016-12-14 デクセリアルズ株式会社 接続装置、接続構造体の製造方法、チップスタック部品の製造方法及び電子部品の実装方法
KR101345037B1 (ko) * 2012-08-23 2013-12-26 앰코 테크놀로지 코리아 주식회사 반도체 디바이스 제조 장치 및 그 방법
TWI664681B (zh) * 2014-08-25 2019-07-01 Toray Engineering Co., Ltd. 安裝用頭及使用其之安裝裝置
US12191276B2 (en) 2020-07-16 2025-01-07 Shinkawa Ltd. Mounting apparatus
JP7569247B2 (ja) * 2021-03-12 2024-10-17 キオクシア株式会社 半導体製造装置
US11676937B2 (en) * 2021-05-04 2023-06-13 Asmpt Singapore Pte. Ltd. Flexible sinter tool for bonding semiconductor devices

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP4684502B2 (ja) * 2001-09-27 2011-05-18 日東電工株式会社 導電接続方法及びそれに用いる離型シート
JP2003258413A (ja) * 2002-03-06 2003-09-12 Nikkiso Co Ltd 回路素子の実装装置および実装方法
JP3921459B2 (ja) * 2003-07-11 2007-05-30 ソニーケミカル＆インフォメーションデバイス株式会社 電気部品の実装方法及び実装装置
KR101253794B1 (ko) * 2005-02-02 2013-04-12 데쿠세리아루즈 가부시키가이샤 전기 부품의 실장 장치
JP4619209B2 (ja) * 2005-06-28 2011-01-26 パナソニック株式会社 半導体素子実装方法および半導体素子実装装置

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Publication number Publication date
JP2009016544A (ja) 2009-01-22

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