JP5075611B2 - 半導体装置 - Google Patents

半導体装置 Download PDF

Info

Publication number
JP5075611B2
JP5075611B2 JP2007329505A JP2007329505A JP5075611B2 JP 5075611 B2 JP5075611 B2 JP 5075611B2 JP 2007329505 A JP2007329505 A JP 2007329505A JP 2007329505 A JP2007329505 A JP 2007329505A JP 5075611 B2 JP5075611 B2 JP 5075611B2
Authority
JP
Japan
Prior art keywords
resin layer
semiconductor device
sealing resin
metal post
low
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
JP2007329505A
Other languages
English (en)
Japanese (ja)
Other versions
JP2009152423A5 (https=
JP2009152423A (ja
Inventor
晋吾 樋口
弘守 奥村
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Rohm Co Ltd
Original Assignee
Rohm Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Rohm Co Ltd filed Critical Rohm Co Ltd
Priority to JP2007329505A priority Critical patent/JP5075611B2/ja
Priority to US12/339,218 priority patent/US7928583B2/en
Publication of JP2009152423A publication Critical patent/JP2009152423A/ja
Publication of JP2009152423A5 publication Critical patent/JP2009152423A5/ja
Application granted granted Critical
Publication of JP5075611B2 publication Critical patent/JP5075611B2/ja
Expired - Fee Related legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Images

Classifications

    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W74/00Encapsulations, e.g. protective coatings
    • H10W74/10Encapsulations, e.g. protective coatings characterised by their shape or disposition
    • H10W74/111Encapsulations, e.g. protective coatings characterised by their shape or disposition the semiconductor body being completely enclosed
    • H10W74/129Encapsulations, e.g. protective coatings characterised by their shape or disposition the semiconductor body being completely enclosed forming a chip-scale package [CSP]
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00Interconnections or connectors in packages
    • H10W72/20Bump connectors, e.g. solder bumps or copper pillars; Dummy bumps; Thermal bumps
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00Interconnections or connectors in packages
    • H10W72/071Connecting or disconnecting
    • H10W72/072Connecting or disconnecting of bump connectors
    • H10W72/07251Connecting or disconnecting of bump connectors characterised by changes in properties of the bump connectors during connecting
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00Interconnections or connectors in packages
    • H10W72/20Bump connectors, e.g. solder bumps or copper pillars; Dummy bumps; Thermal bumps
    • H10W72/221Structures or relative sizes
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00Interconnections or connectors in packages
    • H10W72/20Bump connectors, e.g. solder bumps or copper pillars; Dummy bumps; Thermal bumps
    • H10W72/241Dispositions, e.g. layouts
    • H10W72/242Dispositions, e.g. layouts relative to the surface, e.g. recessed, protruding
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00Interconnections or connectors in packages
    • H10W72/20Bump connectors, e.g. solder bumps or copper pillars; Dummy bumps; Thermal bumps
    • H10W72/251Materials
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00Interconnections or connectors in packages
    • H10W72/20Bump connectors, e.g. solder bumps or copper pillars; Dummy bumps; Thermal bumps
    • H10W72/281Auxiliary members
    • H10W72/283Reinforcing structures, e.g. bump collars
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00Interconnections or connectors in packages
    • H10W72/20Bump connectors, e.g. solder bumps or copper pillars; Dummy bumps; Thermal bumps
    • H10W72/29Bond pads specially adapted therefor
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00Interconnections or connectors in packages
    • H10W72/90Bond pads, in general
    • H10W72/931Shapes of bond pads
    • H10W72/932Plan-view shape, i.e. in top view
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00Interconnections or connectors in packages
    • H10W72/90Bond pads, in general
    • H10W72/941Dispositions of bond pads
    • H10W72/9415Dispositions of bond pads relative to the surface, e.g. recessed, protruding
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00Interconnections or connectors in packages
    • H10W72/90Bond pads, in general
    • H10W72/951Materials of bond pads
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00Interconnections or connectors in packages
    • H10W72/90Bond pads, in general
    • H10W72/981Auxiliary members, e.g. spacers
    • H10W72/983Reinforcing structures, e.g. collars

Landscapes

  • Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
JP2007329505A 2007-12-21 2007-12-21 半導体装置 Expired - Fee Related JP5075611B2 (ja)

Priority Applications (2)

Application Number Priority Date Filing Date Title
JP2007329505A JP5075611B2 (ja) 2007-12-21 2007-12-21 半導体装置
US12/339,218 US7928583B2 (en) 2007-12-21 2008-12-19 Semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2007329505A JP5075611B2 (ja) 2007-12-21 2007-12-21 半導体装置

Publications (3)

Publication Number Publication Date
JP2009152423A JP2009152423A (ja) 2009-07-09
JP2009152423A5 JP2009152423A5 (https=) 2010-12-09
JP5075611B2 true JP5075611B2 (ja) 2012-11-21

Family

ID=40787634

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2007329505A Expired - Fee Related JP5075611B2 (ja) 2007-12-21 2007-12-21 半導体装置

Country Status (2)

Country Link
US (1) US7928583B2 (https=)
JP (1) JP5075611B2 (https=)

Families Citing this family (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US9524945B2 (en) 2010-05-18 2016-12-20 Taiwan Semiconductor Manufacturing Company, Ltd. Cu pillar bump with L-shaped non-metal sidewall protection structure
US8198133B2 (en) * 2009-07-13 2012-06-12 International Business Machines Corporation Structures and methods to improve lead-free C4 interconnect reliability
US8766438B2 (en) * 2009-09-01 2014-07-01 Advanpack Solutions Pte Ltd. Package structure
JP5226639B2 (ja) * 2009-10-09 2013-07-03 株式会社テラミクロス 半導体装置およびその製造方法
JP2010268010A (ja) * 2010-08-31 2010-11-25 Sony Chemical & Information Device Corp 電子部品、並びに、接合体及びその製造方法
JP5966330B2 (ja) * 2011-11-24 2016-08-10 ローム株式会社 半導体チップおよび半導体パッケージ
US9627290B2 (en) * 2011-12-07 2017-04-18 Taiwan Semiconductor Manufacturing Company, Ltd. Bump structure design for stress reduction
US9159686B2 (en) * 2012-01-24 2015-10-13 Taiwan Semiconductor Manufacturing Company, Ltd. Crack stopper on under-bump metallization layer
JP6182309B2 (ja) * 2012-11-28 2017-08-16 新光電気工業株式会社 配線基板、半導体装置及び配線基板の製造方法
JP7157783B2 (ja) * 2020-09-07 2022-10-20 富士電機株式会社 半導体モジュールの製造方法及び半導体モジュール

Family Cites Families (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3496569B2 (ja) * 1999-04-23 2004-02-16 カシオ計算機株式会社 半導体装置及びその製造方法並びにその実装構造
JP3450238B2 (ja) * 1999-11-04 2003-09-22 Necエレクトロニクス株式会社 半導体装置及びその製造方法
JP2001339012A (ja) * 2000-05-30 2001-12-07 Nec Kyushu Ltd 半導体装置およびその製造方法
JP3998564B2 (ja) 2002-11-13 2007-10-31 株式会社巴川製紙所 半導体封止用硬化性接着剤組成物および接着シート
JP4360873B2 (ja) * 2003-09-18 2009-11-11 ミナミ株式会社 ウエハレベルcspの製造方法
US7294929B2 (en) * 2003-12-30 2007-11-13 Texas Instruments Incorporated Solder ball pad structure
TWI295498B (en) * 2005-09-30 2008-04-01 Siliconware Precision Industries Co Ltd Semiconductor element with conductive bumps and fabrication method thereof

Also Published As

Publication number Publication date
JP2009152423A (ja) 2009-07-09
US20090160063A1 (en) 2009-06-25
US7928583B2 (en) 2011-04-19

Similar Documents

Publication Publication Date Title
JP5075611B2 (ja) 半導体装置
CN110098158B (zh) 半导体封装件
KR101131138B1 (ko) 다양한 크기의 볼 패드를 갖는 배선기판과, 그를 갖는반도체 패키지 및 그를 이용한 적층 패키지
JP2008071953A (ja) 半導体装置
JP2000269371A (ja) 半導体装置および半導体実装構造体
US8089156B2 (en) Electrode structure for semiconductor chip with crack suppressing dummy metal patterns
JP4165460B2 (ja) 半導体装置
JP4197140B2 (ja) 半導体装置
JP2010050150A (ja) 半導体装置及び半導体モジュール
WO2011021364A1 (ja) 半導体装置およびその製造方法
KR20110020547A (ko) 스택 패키지
JP4045261B2 (ja) 半導体装置
US20050127487A1 (en) Semiconductor package with improved solder joint reliability
US20100283145A1 (en) Stack structure with copper bumps
TWI402955B (zh) 晶片封裝結構及封裝基板
JP5971133B2 (ja) 回路基板
JP5078631B2 (ja) 半導体装置
JP4589743B2 (ja) 半導体装置
JP2008010778A (ja) 半導体装置
US20060180944A1 (en) Flip chip ball grid array package with constraint plate
JP2007059867A (ja) 半導体装置
WO2012070168A1 (ja) 半導体チップ及び半導体装置
JP2001358172A (ja) 半導体パッケージ
KR20100050981A (ko) 반도체 패키지 및 이를 이용한 스택 패키지
KR20080074654A (ko) 적층 반도체 패키지

Legal Events

Date Code Title Description
A521 Request for written amendment filed

Free format text: JAPANESE INTERMEDIATE CODE: A523

Effective date: 20101026

A621 Written request for application examination

Free format text: JAPANESE INTERMEDIATE CODE: A621

Effective date: 20101210

A977 Report on retrieval

Free format text: JAPANESE INTERMEDIATE CODE: A971007

Effective date: 20120314

A131 Notification of reasons for refusal

Free format text: JAPANESE INTERMEDIATE CODE: A131

Effective date: 20120403

A521 Request for written amendment filed

Free format text: JAPANESE INTERMEDIATE CODE: A523

Effective date: 20120525

TRDD Decision of grant or rejection written
A01 Written decision to grant a patent or to grant a registration (utility model)

Free format text: JAPANESE INTERMEDIATE CODE: A01

Effective date: 20120731

A01 Written decision to grant a patent or to grant a registration (utility model)

Free format text: JAPANESE INTERMEDIATE CODE: A01

A61 First payment of annual fees (during grant procedure)

Free format text: JAPANESE INTERMEDIATE CODE: A61

Effective date: 20120827

R150 Certificate of patent or registration of utility model

Ref document number: 5075611

Country of ref document: JP

Free format text: JAPANESE INTERMEDIATE CODE: R150

Free format text: JAPANESE INTERMEDIATE CODE: R150

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20150831

Year of fee payment: 3

R250 Receipt of annual fees

Free format text: JAPANESE INTERMEDIATE CODE: R250

RD03 Notification of appointment of power of attorney

Free format text: JAPANESE INTERMEDIATE CODE: R3D03

R250 Receipt of annual fees

Free format text: JAPANESE INTERMEDIATE CODE: R250

S111 Request for change of ownership or part of ownership

Free format text: JAPANESE INTERMEDIATE CODE: R313113

R350 Written notification of registration of transfer

Free format text: JAPANESE INTERMEDIATE CODE: R350

S111 Request for change of ownership or part of ownership

Free format text: JAPANESE INTERMEDIATE CODE: R313113

R350 Written notification of registration of transfer

Free format text: JAPANESE INTERMEDIATE CODE: R350

LAPS Cancellation because of no payment of annual fees