JP5075611B2 - 半導体装置 - Google Patents

半導体装置 Download PDF

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Publication number
JP5075611B2
JP5075611B2 JP2007329505A JP2007329505A JP5075611B2 JP 5075611 B2 JP5075611 B2 JP 5075611B2 JP 2007329505 A JP2007329505 A JP 2007329505A JP 2007329505 A JP2007329505 A JP 2007329505A JP 5075611 B2 JP5075611 B2 JP 5075611B2
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JP
Japan
Prior art keywords
resin layer
semiconductor device
sealing resin
metal post
low
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
JP2007329505A
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English (en)
Japanese (ja)
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JP2009152423A (ja
JP2009152423A5 (enExample
Inventor
晋吾 樋口
弘守 奥村
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Rohm Co Ltd
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Rohm Co Ltd
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Publication date
Application filed by Rohm Co Ltd filed Critical Rohm Co Ltd
Priority to JP2007329505A priority Critical patent/JP5075611B2/ja
Priority to US12/339,218 priority patent/US7928583B2/en
Publication of JP2009152423A publication Critical patent/JP2009152423A/ja
Publication of JP2009152423A5 publication Critical patent/JP2009152423A5/ja
Application granted granted Critical
Publication of JP5075611B2 publication Critical patent/JP5075611B2/ja
Expired - Fee Related legal-status Critical Current
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
    • H01L23/31—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
    • H01L23/3107—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed
    • H01L23/3114—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed the device being a chip scale package, e.g. CSP
    • H—ELECTRICITY
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    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
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    • H01L24/02—Bonding areas ; Manufacturing methods related thereto
    • H01L24/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L24/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
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    • H01L24/10—Bump connectors ; Manufacturing methods related thereto
    • H01L24/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
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    • H01L2224/02—Bonding areas; Manufacturing methods related thereto
    • H01L2224/0212—Auxiliary members for bonding areas, e.g. spacers
    • H01L2224/02122—Auxiliary members for bonding areas, e.g. spacers being formed on the semiconductor or solid-state body
    • H01L2224/02123—Auxiliary members for bonding areas, e.g. spacers being formed on the semiconductor or solid-state body inside the bonding area
    • H01L2224/02125—Reinforcing structures
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    • H01L2224/13001—Core members of the bump connector
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    • H01L2924/14—Integrated circuits

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  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
JP2007329505A 2007-12-21 2007-12-21 半導体装置 Expired - Fee Related JP5075611B2 (ja)

Priority Applications (2)

Application Number Priority Date Filing Date Title
JP2007329505A JP5075611B2 (ja) 2007-12-21 2007-12-21 半導体装置
US12/339,218 US7928583B2 (en) 2007-12-21 2008-12-19 Semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2007329505A JP5075611B2 (ja) 2007-12-21 2007-12-21 半導体装置

Publications (3)

Publication Number Publication Date
JP2009152423A JP2009152423A (ja) 2009-07-09
JP2009152423A5 JP2009152423A5 (enExample) 2010-12-09
JP5075611B2 true JP5075611B2 (ja) 2012-11-21

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JP2007329505A Expired - Fee Related JP5075611B2 (ja) 2007-12-21 2007-12-21 半導体装置

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JP (1) JP5075611B2 (enExample)

Families Citing this family (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US9524945B2 (en) 2010-05-18 2016-12-20 Taiwan Semiconductor Manufacturing Company, Ltd. Cu pillar bump with L-shaped non-metal sidewall protection structure
US8198133B2 (en) * 2009-07-13 2012-06-12 International Business Machines Corporation Structures and methods to improve lead-free C4 interconnect reliability
WO2011027185A1 (zh) * 2009-09-01 2011-03-10 先进封装技术私人有限公司 封装结构
JP5226639B2 (ja) * 2009-10-09 2013-07-03 株式会社テラミクロス 半導体装置およびその製造方法
JP2010268010A (ja) * 2010-08-31 2010-11-25 Sony Chemical & Information Device Corp 電子部品、並びに、接合体及びその製造方法
JP5966330B2 (ja) * 2011-11-24 2016-08-10 ローム株式会社 半導体チップおよび半導体パッケージ
US9627290B2 (en) 2011-12-07 2017-04-18 Taiwan Semiconductor Manufacturing Company, Ltd. Bump structure design for stress reduction
US9159686B2 (en) * 2012-01-24 2015-10-13 Taiwan Semiconductor Manufacturing Company, Ltd. Crack stopper on under-bump metallization layer
JP6182309B2 (ja) * 2012-11-28 2017-08-16 新光電気工業株式会社 配線基板、半導体装置及び配線基板の製造方法

Family Cites Families (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3496569B2 (ja) * 1999-04-23 2004-02-16 カシオ計算機株式会社 半導体装置及びその製造方法並びにその実装構造
JP3450238B2 (ja) * 1999-11-04 2003-09-22 Ｎｅｃエレクトロニクス株式会社 半導体装置及びその製造方法
JP2001339012A (ja) * 2000-05-30 2001-12-07 Nec Kyushu Ltd 半導体装置およびその製造方法
JP3998564B2 (ja) 2002-11-13 2007-10-31 株式会社巴川製紙所 半導体封止用硬化性接着剤組成物および接着シート
JP4360873B2 (ja) * 2003-09-18 2009-11-11 ミナミ株式会社 ウエハレベルｃｓｐの製造方法
US7294929B2 (en) * 2003-12-30 2007-11-13 Texas Instruments Incorporated Solder ball pad structure
TWI295498B (en) * 2005-09-30 2008-04-01 Siliconware Precision Industries Co Ltd Semiconductor element with conductive bumps and fabrication method thereof

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Publication number Publication date
US7928583B2 (en) 2011-04-19
US20090160063A1 (en) 2009-06-25
JP2009152423A (ja) 2009-07-09

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