JP5038900B2 - 自己整合されたレトログレード外部ベース注入プロファイル及び自己整合されたシリサイドを有するバイポーラ・トランジスタ - Google Patents

自己整合されたレトログレード外部ベース注入プロファイル及び自己整合されたシリサイドを有するバイポーラ・トランジスタ Download PDF

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JP5038900B2
JP5038900B2 JP2007540424A JP2007540424A JP5038900B2 JP 5038900 B2 JP5038900 B2 JP 5038900B2 JP 2007540424 A JP2007540424 A JP 2007540424A JP 2007540424 A JP2007540424 A JP 2007540424A JP 5038900 B2 JP5038900 B2 JP 5038900B2
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emitter
forming
substrate
region
pedestal
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JP2008520088A (ja
JP2008520088A5 (enExample
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ハター、マーワン、エイチ
パジェット、フランソワ
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International Business Machines Corp
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    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D10/00—Bipolar junction transistors [BJT]
    • H10D10/01—Manufacture or treatment
    • H10D10/051—Manufacture or treatment of vertical BJTs
    • H10D10/054—Forming extrinsic base regions on silicon substrate after insulating device isolation in vertical BJTs having single crystalline emitter, collector or base regions
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D10/00—Bipolar junction transistors [BJT]
    • H10D10/01—Manufacture or treatment
    • H10D10/051—Manufacture or treatment of vertical BJTs
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D10/00—Bipolar junction transistors [BJT]
    • H10D10/40—Vertical BJTs
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
    • H10D62/10—Shapes, relative sizes or dispositions of the regions of the semiconductor bodies; Shapes of the semiconductor bodies
    • H10D62/17—Semiconductor regions connected to electrodes not carrying current to be rectified, amplified or switched, e.g. channel regions
    • H10D62/177—Base regions of bipolar transistors, e.g. BJTs or IGBTs

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  • Bipolar Transistors (AREA)
  • Electrodes Of Semiconductors (AREA)
JP2007540424A 2004-11-10 2005-11-10 自己整合されたレトログレード外部ベース注入プロファイル及び自己整合されたシリサイドを有するバイポーラ・トランジスタ Expired - Fee Related JP5038900B2 (ja)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US10/904,437 US7288829B2 (en) 2004-11-10 2004-11-10 Bipolar transistor with self-aligned retrograde extrinsic base implant profile and self-aligned silicide
US10/904,437 2004-11-10
PCT/US2005/041049 WO2006053257A1 (en) 2004-11-10 2005-11-10 Bipolar transistor with selfaligned silicide and extrinsic base

Publications (3)

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JP2008520088A JP2008520088A (ja) 2008-06-12
JP2008520088A5 JP2008520088A5 (enExample) 2008-11-27
JP5038900B2 true JP5038900B2 (ja) 2012-10-03

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JP2007540424A Expired - Fee Related JP5038900B2 (ja) 2004-11-10 2005-11-10 自己整合されたレトログレード外部ベース注入プロファイル及び自己整合されたシリサイドを有するバイポーラ・トランジスタ

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US (2) US7288829B2 (enExample)
EP (1) EP1815517A4 (enExample)
JP (1) JP5038900B2 (enExample)
CN (1) CN100568505C (enExample)
TW (1) TW200635030A (enExample)
WO (1) WO2006053257A1 (enExample)

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* Cited by examiner, † Cited by third party
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CN102097464B (zh) * 2009-12-15 2012-10-03 上海华虹Nec电子有限公司 高压双极晶体管
CN101866856A (zh) * 2010-05-12 2010-10-20 上海宏力半导体制造有限公司 Npn晶体管及其制作方法
CN101908485B (zh) * 2010-06-11 2016-03-02 上海华虹宏力半导体制造有限公司 利用三块掩模板制作垂直双极型晶体管的方法
CN101916724B (zh) * 2010-07-23 2015-04-15 上海华虹宏力半导体制造有限公司 一种晶体管的制作方法
EP2418681B1 (en) * 2010-08-10 2017-10-11 Nxp B.V. Heterojunction Bipolar Transistor and Manufacturing Method
CN102412274B (zh) * 2011-01-13 2014-02-26 上海华虹宏力半导体制造有限公司 锗硅hbt工艺中垂直寄生型pnp器件及制造方法
SE535380C2 (sv) * 2011-01-31 2012-07-17 Fairchild Semiconductor Bipolär transistor i kiselkarbid med övervuxen emitter
US8603883B2 (en) 2011-11-16 2013-12-10 International Business Machines Corporation Interface control in a bipolar junction transistor
US9059231B2 (en) 2013-06-13 2015-06-16 International Business Machines Corporation T-shaped compound semiconductor lateral bipolar transistor on semiconductor-on-insulator
JP6219224B2 (ja) * 2014-04-21 2017-10-25 ルネサスエレクトロニクス株式会社 半導体装置
US9722057B2 (en) * 2015-06-23 2017-08-01 Global Foundries Inc. Bipolar junction transistors with a buried dielectric region in the active device region
US11276682B1 (en) * 2020-09-01 2022-03-15 Newport Fab, Llc Nickel silicide in bipolar complementary-metal-oxide-semiconductor (BiCMOS) device and method of manufacturing
US20230352570A1 (en) * 2022-04-29 2023-11-02 Globalfoundries U.S. Inc. Bipolar junction transistor

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JPS63182860A (ja) * 1987-01-26 1988-07-28 Toshiba Corp 半導体装置とその製造方法
US5006476A (en) * 1988-09-07 1991-04-09 North American Philips Corp., Signetics Division Transistor manufacturing process using three-step base doping
US5302535A (en) * 1991-09-20 1994-04-12 Nec Corporation Method of manufacturing high speed bipolar transistor
JP2582519B2 (ja) 1992-07-13 1997-02-19 インターナショナル・ビジネス・マシーンズ・コーポレイション バイポーラ・トランジスタおよびその製造方法
US5320972A (en) * 1993-01-07 1994-06-14 Northern Telecom Limited Method of forming a bipolar transistor
JPH07245313A (ja) * 1994-03-03 1995-09-19 Fuji Electric Co Ltd バイポーラトランジスタの製造方法
US5834800A (en) * 1995-04-10 1998-11-10 Lucent Technologies Inc. Heterojunction bipolar transistor having mono crystalline SiGe intrinsic base and polycrystalline SiGe and Si extrinsic base regions
FR2764733B1 (fr) * 1997-06-11 2003-11-14 Commissariat Energie Atomique Transistor hyperfrequence a structure quasi-autoalignee et son procede de fabrication
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US6239477B1 (en) * 1998-10-07 2001-05-29 Texas Instruments Incorporated Self-aligned transistor contact for epitaxial layers
FR2799048B1 (fr) * 1999-09-23 2003-02-21 St Microelectronics Sa Procede de fabrication d'un transistor bipolaire vertical auto-aligne
US6784467B1 (en) * 2002-08-13 2004-08-31 Newport Fab, Llc Method for fabricating a self-aligned bipolar transistor and related structure
US6534372B1 (en) 2000-11-22 2003-03-18 Newport Fab, Llc Method for fabricating a self-aligned emitter in a bipolar transistor
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US20030082882A1 (en) * 2001-10-31 2003-05-01 Babcock Jeffrey A. Control of dopant diffusion from buried layers in bipolar integrated circuits
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Also Published As

Publication number Publication date
JP2008520088A (ja) 2008-06-12
CN100568505C (zh) 2009-12-09
US20060097350A1 (en) 2006-05-11
US7288829B2 (en) 2007-10-30
US20070275535A1 (en) 2007-11-29
EP1815517A1 (en) 2007-08-08
CN101057328A (zh) 2007-10-17
EP1815517A4 (en) 2009-08-05
WO2006053257A1 (en) 2006-05-18
US7732292B2 (en) 2010-06-08
TW200635030A (en) 2006-10-01

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