JP5015065B2 - 配線基板 - Google Patents

配線基板 Download PDF

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Publication number
JP5015065B2
JP5015065B2 JP2008139818A JP2008139818A JP5015065B2 JP 5015065 B2 JP5015065 B2 JP 5015065B2 JP 2008139818 A JP2008139818 A JP 2008139818A JP 2008139818 A JP2008139818 A JP 2008139818A JP 5015065 B2 JP5015065 B2 JP 5015065B2
Authority
JP
Japan
Prior art keywords
opening
wiring board
resin
chip
edge portion
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
JP2008139818A
Other languages
English (en)
Japanese (ja)
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JP2009289914A5 (enExample
JP2009289914A (ja
Inventor
行範 羽鳥
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Shinko Electric Industries Co Ltd
Original Assignee
Shinko Electric Industries Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Shinko Electric Industries Co Ltd filed Critical Shinko Electric Industries Co Ltd
Priority to JP2008139818A priority Critical patent/JP5015065B2/ja
Publication of JP2009289914A publication Critical patent/JP2009289914A/ja
Publication of JP2009289914A5 publication Critical patent/JP2009289914A5/ja
Application granted granted Critical
Publication of JP5015065B2 publication Critical patent/JP5015065B2/ja
Active legal-status Critical Current
Anticipated expiration legal-status Critical

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Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H01L2224/161—Disposition
    • H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/013—Alloys
    • H01L2924/0132—Binary Alloys
    • H01L2924/01322—Eutectic Alloys, i.e. obtained by a liquid transforming into two solid phases
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151—Die mounting substrate
    • H01L2924/153—Connection portion
    • H01L2924/1531—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface
    • H01L2924/15311—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface being a ball array, e.g. BGA

Landscapes

  • Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
  • Encapsulation Of And Coatings For Semiconductor Or Solid State Devices (AREA)
JP2008139818A 2008-05-28 2008-05-28 配線基板 Active JP5015065B2 (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2008139818A JP5015065B2 (ja) 2008-05-28 2008-05-28 配線基板

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2008139818A JP5015065B2 (ja) 2008-05-28 2008-05-28 配線基板

Publications (3)

Publication Number Publication Date
JP2009289914A JP2009289914A (ja) 2009-12-10
JP2009289914A5 JP2009289914A5 (enExample) 2011-05-12
JP5015065B2 true JP5015065B2 (ja) 2012-08-29

Family

ID=41458859

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2008139818A Active JP5015065B2 (ja) 2008-05-28 2008-05-28 配線基板

Country Status (1)

Country Link
JP (1) JP5015065B2 (enExample)

Families Citing this family (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2012009586A (ja) * 2010-06-24 2012-01-12 Shinko Electric Ind Co Ltd 配線基板、半導体装置及び配線基板の製造方法
JP5732238B2 (ja) * 2010-11-29 2015-06-10 シャープ株式会社 固体撮像装置および電子情報機器
JP5915225B2 (ja) * 2012-02-10 2016-05-11 凸版印刷株式会社 配線基板及びそれを用いた半導体装置
JP2014044979A (ja) * 2012-08-24 2014-03-13 Ngk Spark Plug Co Ltd 配線基板
JP2014072372A (ja) * 2012-09-28 2014-04-21 Ibiden Co Ltd プリント配線板の製造方法及びプリント配線板
JP7539309B2 (ja) * 2020-12-16 2024-08-23 日本特殊陶業株式会社 配線基板
TWI823452B (zh) * 2022-06-30 2023-11-21 頎邦科技股份有限公司 半導體封裝構造及其電路板

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH11111894A (ja) * 1997-10-02 1999-04-23 Fujitsu Ltd フリップチップ実装用基板
JP3497464B2 (ja) * 2000-11-24 2004-02-16 沖電気工業株式会社 半導体装置を実装する実装基板および実装構造
JP2005175113A (ja) * 2003-12-10 2005-06-30 Fdk Corp フリップチップ実装用プリント配線基板
JP2007220740A (ja) * 2006-02-14 2007-08-30 Elpida Memory Inc 半導体装置及びその製造方法

Also Published As

Publication number Publication date
JP2009289914A (ja) 2009-12-10

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