JP5001872B2 - 半導体装置 - Google Patents
半導体装置 Download PDFInfo
- Publication number
- JP5001872B2 JP5001872B2 JP2008031543A JP2008031543A JP5001872B2 JP 5001872 B2 JP5001872 B2 JP 5001872B2 JP 2008031543 A JP2008031543 A JP 2008031543A JP 2008031543 A JP2008031543 A JP 2008031543A JP 5001872 B2 JP5001872 B2 JP 5001872B2
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- lead
- wire
- leads
- semiconductor chip
- suspension
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Description
図1は本発明の実施の形態の半導体装置の構造の一例を示す平面図、図2は図1に示すA−A線に沿って切断した構造の一例を示す断面図、図3は図1に示す半導体装置におけるワイヤリング状態の一例を示す拡大部分平面図である。また、図13は本発明の実施の形態の変形例の半導体装置の組み立てにおけるワイヤボンディング後の構造を示す部分平面図である。
1a リード
1b 第1リード
1c 第2リード
1d アウタ部
1e インナ部
1f タブ(チップ搭載部)
1g チップ支持面
1h 裏面
1i 段差部
1j 吊りリード
1k 曲げ部
1m ワイヤ接続面
1n 肉逃げ部
1p ノンコネクト用リード
2 半導体チップ
2a 主面
2b 裏面
2c 第1辺(辺)
2d 第2辺(他の辺)
2e 電極パッド
2f 第1電極パッド
2g 第2電極パッド
3 封止体
3a 実装面
4 ワイヤ
4a 第1ワイヤ
4b 第2ワイヤ
4c 第3ワイヤ
5 QFN(半導体装置)
6 モールドライン
7 キャピラリ
Claims (4)
- チップ搭載部と、
前記チップ搭載部を支持する複数の吊りリードと、
第1辺を備えた表面、および前記表面に形成され、かつ、平面視において前記第1辺に沿って配置された複数の電極パッドを有し、前記チップ搭載部上に搭載された半導体チップと、
平面視において前記半導体チップの前記第1辺に沿って配置され、かつ、平面視において前記複数の吊りリードのうちの互いに隣り合う吊りリード間に配置された複数のリードと、
前記複数の電極パッドと前記複数のリードとをそれぞれ電気的に接続する複数のワイヤと、
前記半導体チップおよび前記複数のワイヤを封止する封止体と、
を含み、
前記複数のリードのうちの互いに隣り合うリード間のピッチは、前記複数の電極パッドのうちの互いに隣り合う電極パッド間のピッチよりも大きく、
前記複数の吊りリードは、第1吊りリードと、前記第1吊りリードの隣に配置された第2吊りリードとを有し、
前記複数のリードは、前記第1吊りリードと前記第2吊りリードとの間に配置された第1リードと、前記第1リードと前記第1吊りリードとの間に配置された第2リードと、前記第2リードと前記第1吊りリードとの間に配置された第3リードと、前記第1リードと前記第2吊りリードとの間に配置された第4リードと、前記第4リードと前記第2吊りリードとの間に配置された第5リードとを有し、
前記第2及び第4リードのそれぞれの先端部は、平面視において、前記第1リードの先端部よりも前記半導体チップから遠くに位置し、
前記第3及び第5リードのそれぞれの先端部は、平面視において、前記第2及び第4リードのそれぞれの先端部よりも前記半導体チップから遠くに位置し、
前記複数のリードの各先端部は、前記第1リードから前記第1吊りリード及び第2吊りリードまで段階的に前記半導体チップから遠ざかり、
前記複数のワイヤは、前記第1リードと電気的に接続される第1ワイヤと、前記第2リードと電気的に接続される第2ワイヤと、前記第3リードと電気的に接続される第3ワイヤと、前記第4リードと電気的に接続される第4ワイヤと、前記第5リードと電気的に接続される第5ワイヤとを有し、
前記半導体チップの第1辺と前記第2ワイヤとの平面視において成す広角度は、前記半導体チップの前記第1辺と前記第1ワイヤとの平面視において成す広角度よりも大きく、
前記半導体チップの第1辺と前記第3ワイヤとの平面視において成す広角度は、前記半導体チップの前記第1辺と前記第2ワイヤとの平面視において成す広角度よりも大きく、
前記半導体チップの第1辺と前記第4ワイヤとの平面視において成す広角度は、前記半導体チップの前記第1辺と前記第1ワイヤとの平面視において成す広角度よりも大きく、
前記半導体チップの第1辺と前記第5ワイヤとの平面視において成す広角度は、前記半導体チップの前記第1辺と前記第4ワイヤとの平面視において成す広角度よりも大きいことを特徴とする半導体装置。 - 請求項1記載の半導体装置において、
前記複数のリードのそれぞれは、第1部分と、平面視において前記第1部分よりも前記半導体チップから遠くに位置する第2部分とを有し、
前記複数のリードのそれぞれの前記第1部分の前記先端部は、平面視において、前記半導体チップと対向し、
前記複数のワイヤのそれぞれは、前記複数のリードのそれぞれの前記第1部分と電気的に接続されていることを特徴とする半導体装置。 - 請求項2記載の半導体装置において、
前記チップ搭載部の平面視における外形寸法は、前記半導体チップの平面視における外形寸法よりも小さいことを特徴とする半導体装置。 - 請求項3記載の半導体装置において、
前記複数の吊りリードは、第1吊り部と、第2吊り部とを有し、
前記第1吊り部の平面視における幅は、前記第2吊り部の平面視における幅よりも大きく、
前記複数のワイヤは、前記第1ワイヤと、前記第2ワイヤと、前記第3ワイヤと、前記第4ワイヤと、前記第5ワイヤと、第6ワイヤと、第7ワイヤとを有し、
前記第6ワイヤは、前記第1吊りリードの前記第1吊り部と電気的に接続されており、
前記第7ワイヤは、前記第2吊りリードの前記第1吊り部と電気的に接続されていることを特徴とする半導体装置。
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JP2008031543A JP5001872B2 (ja) | 2008-02-13 | 2008-02-13 | 半導体装置 |
US12/266,882 US7812429B2 (en) | 2008-02-13 | 2008-11-07 | Semiconductor device and manufacturing method of the same |
US12/883,468 US7964941B2 (en) | 2008-02-13 | 2010-09-16 | Semiconductor device and manufacturing method of the same |
US13/115,639 US8148200B2 (en) | 2008-02-13 | 2011-05-25 | Semiconductor device and manufacturing method of the same |
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US8754513B1 (en) | 2008-07-10 | 2014-06-17 | Marvell International Ltd. | Lead frame apparatus and method for improved wire bonding |
JP5588147B2 (ja) * | 2009-10-26 | 2014-09-10 | キヤノン株式会社 | 半導体装置及び半導体装置を搭載したプリント基板 |
CN102487025B (zh) * | 2010-12-08 | 2016-07-06 | 飞思卡尔半导体公司 | 用于长结合导线的支撑体 |
CN102891090A (zh) * | 2011-07-18 | 2013-01-23 | 飞思卡尔半导体公司 | 半导体器件及其封装方法 |
US10271448B2 (en) * | 2012-08-06 | 2019-04-23 | Investar Corporation | Thin leadframe QFN package design of RF front-ends for mobile wireless communication |
JP2015070161A (ja) * | 2013-09-30 | 2015-04-13 | ローム株式会社 | リードフレーム、半導体装置および半導体装置の製造方法 |
US20150262919A1 (en) * | 2014-03-14 | 2015-09-17 | Texas Instruments Incorporated | Structure and method of packaged semiconductor devices with qfn leadframes having stress-absorbing protrusions |
JP6695156B2 (ja) * | 2016-02-02 | 2020-05-20 | エイブリック株式会社 | 樹脂封止型半導体装置 |
FR3064817B1 (fr) * | 2017-04-04 | 2021-07-23 | United Monolithic Semiconductors Sas | Boitier plastique non coplanaire d'encapsulation d'un composant electronique hyperfrequence de puissance |
JP6796666B2 (ja) * | 2019-02-06 | 2020-12-09 | ローム株式会社 | 半導体装置 |
JP7338204B2 (ja) * | 2019-04-01 | 2023-09-05 | 富士電機株式会社 | 半導体装置 |
WO2023189650A1 (ja) * | 2022-03-31 | 2023-10-05 | ローム株式会社 | 半導体装置 |
CN116525594B (zh) * | 2023-07-03 | 2023-10-13 | 成都爱旗科技有限公司 | 一种封装结构、方法及电子设备 |
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JPH01312866A (ja) | 1988-06-10 | 1989-12-18 | Nec Kyushu Ltd | 半導体装置用リードフレーム |
KR100552353B1 (ko) * | 1992-03-27 | 2006-06-20 | 가부시키가이샤 히타치초엘에스아이시스템즈 | 리이드프레임및그것을사용한반도체집적회로장치와그제조방법 |
JPH05304241A (ja) * | 1992-04-28 | 1993-11-16 | Hitachi Ltd | 半導体装置 |
JP2000003988A (ja) * | 1998-06-15 | 2000-01-07 | Sony Corp | リードフレームおよび半導体装置 |
JP2004095572A (ja) * | 2002-08-29 | 2004-03-25 | Hitachi Ltd | 半導体装置およびその製造方法 |
JP4624170B2 (ja) * | 2005-04-25 | 2011-02-02 | ルネサスエレクトロニクス株式会社 | 半導体装置の製造方法 |
US7977774B2 (en) * | 2007-07-10 | 2011-07-12 | Amkor Technology, Inc. | Fusion quad flat semiconductor package |
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US20110001228A1 (en) | 2011-01-06 |
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