JP4955349B2 - 半導体装置 - Google Patents
半導体装置 Download PDFInfo
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- JP4955349B2 JP4955349B2 JP2006242919A JP2006242919A JP4955349B2 JP 4955349 B2 JP4955349 B2 JP 4955349B2 JP 2006242919 A JP2006242919 A JP 2006242919A JP 2006242919 A JP2006242919 A JP 2006242919A JP 4955349 B2 JP4955349 B2 JP 4955349B2
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- 239000004065 semiconductor Substances 0.000 title claims description 144
- 239000000758 substrate Substances 0.000 claims description 59
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 claims description 51
- 229910052710 silicon Inorganic materials 0.000 claims description 51
- 239000010703 silicon Substances 0.000 claims description 51
- 238000003860 storage Methods 0.000 claims description 28
- 230000000149 penetrating effect Effects 0.000 claims description 9
- 239000011521 glass Substances 0.000 claims description 7
- 238000007789 sealing Methods 0.000 claims description 7
- 238000000034 method Methods 0.000 description 25
- 238000004519 manufacturing process Methods 0.000 description 22
- 238000010586 diagram Methods 0.000 description 10
- 239000000463 material Substances 0.000 description 7
- 230000001133 acceleration Effects 0.000 description 4
- 229910010293 ceramic material Inorganic materials 0.000 description 4
- 238000001312 dry etching Methods 0.000 description 3
- 238000005530 etching Methods 0.000 description 3
- 238000001020 plasma etching Methods 0.000 description 3
- 238000001039 wet etching Methods 0.000 description 3
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 2
- 239000011248 coating agent Substances 0.000 description 2
- 238000000576 coating method Methods 0.000 description 2
- 238000009713 electroplating Methods 0.000 description 2
- 238000009413 insulation Methods 0.000 description 2
- 229910052814 silicon oxide Inorganic materials 0.000 description 2
- 230000015572 biosynthetic process Effects 0.000 description 1
- 239000000919 ceramic Substances 0.000 description 1
- 239000004020 conductor Substances 0.000 description 1
- 238000011109 contamination Methods 0.000 description 1
- 229910052802 copper Inorganic materials 0.000 description 1
- 238000005520 cutting process Methods 0.000 description 1
- 230000006866 deterioration Effects 0.000 description 1
- 238000007772 electroless plating Methods 0.000 description 1
- 230000002349 favourable effect Effects 0.000 description 1
- 239000005357 flat glass Substances 0.000 description 1
- 229910052737 gold Inorganic materials 0.000 description 1
- 238000000227 grinding Methods 0.000 description 1
- 238000010438 heat treatment Methods 0.000 description 1
- 238000005304 joining Methods 0.000 description 1
- 229910000833 kovar Inorganic materials 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 230000003287 optical effect Effects 0.000 description 1
- 239000005416 organic matter Substances 0.000 description 1
- 230000001590 oxidative effect Effects 0.000 description 1
- 238000007747 plating Methods 0.000 description 1
- 229910000679 solder Inorganic materials 0.000 description 1
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- B—PERFORMING OPERATIONS; TRANSPORTING
- B81—MICROSTRUCTURAL TECHNOLOGY
- B81C—PROCESSES OR APPARATUS SPECIALLY ADAPTED FOR THE MANUFACTURE OR TREATMENT OF MICROSTRUCTURAL DEVICES OR SYSTEMS
- B81C1/00—Manufacture or treatment of devices or systems in or on a substrate
- B81C1/00015—Manufacture or treatment of devices or systems in or on a substrate for manufacturing microsystems
- B81C1/00222—Integrating an electronic processing unit with a micromechanical structure
- B81C1/0023—Packaging together an electronic processing unit die and a micromechanical structure die
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- H01L23/053—Containers; Seals characterised by the shape of the container or parts, e.g. caps, walls the container being a hollow construction and having an insulating or insulated base as a mounting for the semiconductor body
- H01L23/055—Containers; Seals characterised by the shape of the container or parts, e.g. caps, walls the container being a hollow construction and having an insulating or insulated base as a mounting for the semiconductor body the leads having a passage through the base
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- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Manufacturing & Machinery (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Power Engineering (AREA)
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- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
Description
101 シリコン基板
101A,101B 穴部
101C 凹部
101D 絶縁膜
101E,101F 接合面
102,103 マスクパターン
102A,102B,103A 開口部
104 素子収納空間
105 ビアプラグ
106 バンプ
107,108 蓋部
109 バンプ
201 半導体素子
202,203 電極パッド
204 ペースト
205 半導体素子
206 ボンディングワイヤ
Claims (5)
- シリコン基板と、
前記シリコン基板に形成された凹部と該凹部の底面を貫通する穴部とを含む素子収納空間と、
前記素子収納空間に収納される、積層された複数の半導体素子と、
前記半導体素子を封止する、前記凹部を塞ぐ第1の蓋部および前記穴部を塞ぐ第2の蓋部と、
前記凹部の底面を貫通する、前記複数の半導体素子のいずれかに接続されるビアプラグと、を有することを特徴とする半導体装置。 - 前記複数の半導体素子は、MEMS素子と該MEMS素子のドライバ素子を含むことを特徴とする請求項1記載の半導体装置。
- 前記ドライバ素子は、前記MEMS素子が積層される側で前記ビアプラグと接続されていることを特徴とする請求項2記載の半導体装置。
- 前記第1の蓋部および前記第2の蓋部はガラスよりなることを特徴とする請求項1乃至3のいずれか1項記載の半導体装置。
- 前記第1の蓋部および前記第2の蓋部は前記シリコン基板に陽極接合により接合されていることを特徴とする請求項4記載の半導体装置。
Priority Applications (4)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2006242919A JP4955349B2 (ja) | 2006-09-07 | 2006-09-07 | 半導体装置 |
US11/896,010 US7829993B2 (en) | 2006-09-07 | 2007-08-29 | Semiconductor apparatus |
TW096132701A TW200816402A (en) | 2006-09-07 | 2007-09-03 | Semiconductor apparatus |
EP07017502A EP1898462B1 (en) | 2006-09-07 | 2007-09-06 | Semiconductor apparatus |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2006242919A JP4955349B2 (ja) | 2006-09-07 | 2006-09-07 | 半導体装置 |
Publications (2)
Publication Number | Publication Date |
---|---|
JP2008066517A JP2008066517A (ja) | 2008-03-21 |
JP4955349B2 true JP4955349B2 (ja) | 2012-06-20 |
Family
ID=38955183
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2006242919A Active JP4955349B2 (ja) | 2006-09-07 | 2006-09-07 | 半導体装置 |
Country Status (4)
Country | Link |
---|---|
US (1) | US7829993B2 (ja) |
EP (1) | EP1898462B1 (ja) |
JP (1) | JP4955349B2 (ja) |
TW (1) | TW200816402A (ja) |
Families Citing this family (9)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
WO2007083748A1 (ja) * | 2006-01-19 | 2007-07-26 | Fujikura Ltd. | 圧力センサパッケージ及び電子部品 |
TW200834830A (en) * | 2007-02-06 | 2008-08-16 | Advanced Semiconductor Eng | Microelectromechanical system package and the method for manufacturing the same |
KR101505551B1 (ko) * | 2007-11-30 | 2015-03-25 | 페어차일드코리아반도체 주식회사 | 온도 감지소자가 장착된 반도체 파워 모듈 패키지 및 그제조방법 |
US7964448B2 (en) * | 2008-09-18 | 2011-06-21 | Infineon Technologies Ag | Electronic device and method of manufacturing same |
JP5979994B2 (ja) * | 2012-06-12 | 2016-08-31 | 新光電気工業株式会社 | 電子装置 |
TWI590735B (zh) * | 2014-12-15 | 2017-07-01 | 財團法人工業技術研究院 | 訊號傳輸板及其製作方法 |
KR102520038B1 (ko) | 2018-01-10 | 2023-04-12 | 삼성전자주식회사 | 가스 센서 패키지 및 이를 포함하는 센싱 장치 |
IT201900006736A1 (it) | 2019-05-10 | 2020-11-10 | Applied Materials Inc | Procedimenti di fabbricazione di package |
US11454884B2 (en) | 2020-04-15 | 2022-09-27 | Applied Materials, Inc. | Fluoropolymer stamp fabrication method |
Family Cites Families (17)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
FR2800912B1 (fr) * | 1999-11-04 | 2003-07-25 | St Microelectronics Sa | Boitier semi-conducteur optique et procede de fabrication d'un tel boitier |
US6384473B1 (en) * | 2000-05-16 | 2002-05-07 | Sandia Corporation | Microelectronic device package with an integral window |
US6433411B1 (en) * | 2000-05-22 | 2002-08-13 | Agere Systems Guardian Corp. | Packaging micromechanical devices |
DE10047213A1 (de) * | 2000-09-23 | 2002-04-11 | Philips Corp Intellectual Pty | Elektrisches oder elektronisches Bauteil und Verfahren zum Herstellen desselben |
US7012315B1 (en) * | 2000-11-01 | 2006-03-14 | Micron Technology, Inc. | Frame scale package using contact lines through the elements |
JP2003282817A (ja) * | 2002-03-27 | 2003-10-03 | Matsushita Electric Ind Co Ltd | 半導体装置およびその製造方法 |
US7423336B2 (en) * | 2002-04-08 | 2008-09-09 | Micron Technology, Inc. | Bond pad rerouting element, rerouted semiconductor devices including the rerouting element, and assemblies including the rerouted semiconductor devices |
US7274094B2 (en) * | 2002-08-28 | 2007-09-25 | Micron Technology, Inc. | Leadless packaging for image sensor devices |
JP2004271312A (ja) * | 2003-03-07 | 2004-09-30 | Denso Corp | 容量型半導体センサ装置 |
JP2004281530A (ja) | 2003-03-13 | 2004-10-07 | Shinko Electric Ind Co Ltd | 半導体装置及びその製造方法 |
DE102004005668B4 (de) | 2004-02-05 | 2021-09-16 | Snaptrack, Inc. | Elektrisches Bauelement und Herstellungsverfahren |
JP2005274219A (ja) * | 2004-03-23 | 2005-10-06 | Matsushita Electric Works Ltd | 半導体加速度センサ装置並びにその製造方法 |
JP4628008B2 (ja) * | 2004-03-31 | 2011-02-09 | セイコーインスツル株式会社 | シリコン基板を有する電子回路装置 |
US7645635B2 (en) | 2004-08-16 | 2010-01-12 | Micron Technology, Inc. | Frame structure and semiconductor attach process for use therewith for fabrication of image sensor packages and the like, and resulting packages |
JP4969822B2 (ja) * | 2004-12-06 | 2012-07-04 | 株式会社デンソー | センサ装置 |
US7295029B2 (en) * | 2005-03-24 | 2007-11-13 | Memsic, Inc. | Chip-scale package for integrated circuits |
JP5107539B2 (ja) * | 2006-08-03 | 2012-12-26 | 新光電気工業株式会社 | 半導体装置および半導体装置の製造方法 |
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Publication number | Publication date |
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TW200816402A (en) | 2008-04-01 |
EP1898462B1 (en) | 2012-04-18 |
EP1898462A3 (en) | 2010-11-10 |
US7829993B2 (en) | 2010-11-09 |
US20080061424A1 (en) | 2008-03-13 |
EP1898462A2 (en) | 2008-03-12 |
JP2008066517A (ja) | 2008-03-21 |
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