JP4943959B2 - 半導体装置 - Google Patents

半導体装置 Download PDF

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Publication number
JP4943959B2
JP4943959B2 JP2007176037A JP2007176037A JP4943959B2 JP 4943959 B2 JP4943959 B2 JP 4943959B2 JP 2007176037 A JP2007176037 A JP 2007176037A JP 2007176037 A JP2007176037 A JP 2007176037A JP 4943959 B2 JP4943959 B2 JP 4943959B2
Authority
JP
Japan
Prior art keywords
substrate
semiconductor
electrode
pressure contact
pressure
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
JP2007176037A
Other languages
English (en)
Japanese (ja)
Other versions
JP2009016522A (ja
JP2009016522A5 (https=
Inventor
謙太郎 熊澤
善広 戸村
雄一郎 山田
一博 登
鉄平 岩瀬
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Corp
Panasonic Holdings Corp
Original Assignee
Panasonic Corp
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Panasonic Corp, Matsushita Electric Industrial Co Ltd filed Critical Panasonic Corp
Priority to JP2007176037A priority Critical patent/JP4943959B2/ja
Publication of JP2009016522A publication Critical patent/JP2009016522A/ja
Publication of JP2009016522A5 publication Critical patent/JP2009016522A5/ja
Application granted granted Critical
Publication of JP4943959B2 publication Critical patent/JP4943959B2/ja
Expired - Fee Related legal-status Critical Current
Anticipated expiration legal-status Critical

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Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/071—Connecting or disconnecting
    • H10W72/072—Connecting or disconnecting of bump connectors
    • H10W72/07251—Connecting or disconnecting of bump connectors characterised by changes in properties of the bump connectors during connecting
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/20—Bump connectors, e.g. solder bumps or copper pillars; Dummy bumps; Thermal bumps
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/20—Bump connectors, e.g. solder bumps or copper pillars; Dummy bumps; Thermal bumps
    • H10W72/231—Shapes
    • H10W72/234—Cross-sectional shape, i.e. in side view
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W74/00—Encapsulations, e.g. protective coatings
    • H10W74/10—Encapsulations, e.g. protective coatings characterised by their shape or disposition
    • H10W74/15—Encapsulations, e.g. protective coatings characterised by their shape or disposition on active surfaces of flip-chip devices, e.g. underfills
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/721—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bump connectors
    • H10W90/724—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bump connectors between a chip and a stacked insulating package substrate, interposer or RDL
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/731—Package configurations characterised by the relative positions of pads or connectors relative to package parts of die-attach connectors
    • H10W90/734—Package configurations characterised by the relative positions of pads or connectors relative to package parts of die-attach connectors between a chip and a stacked insulating package substrate, interposer or RDL

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  • Wire Bonding (AREA)
JP2007176037A 2007-07-04 2007-07-04 半導体装置 Expired - Fee Related JP4943959B2 (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2007176037A JP4943959B2 (ja) 2007-07-04 2007-07-04 半導体装置

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2007176037A JP4943959B2 (ja) 2007-07-04 2007-07-04 半導体装置

Publications (3)

Publication Number Publication Date
JP2009016522A JP2009016522A (ja) 2009-01-22
JP2009016522A5 JP2009016522A5 (https=) 2010-05-13
JP4943959B2 true JP4943959B2 (ja) 2012-05-30

Family

ID=40357083

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2007176037A Expired - Fee Related JP4943959B2 (ja) 2007-07-04 2007-07-04 半導体装置

Country Status (1)

Country Link
JP (1) JP4943959B2 (https=)

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR101849117B1 (ko) * 2011-10-19 2018-04-18 에스케이하이닉스 주식회사 연결 범프를 포함하는 전자 소자의 패키지, 전자 시스템 및 제조 방법
KR101735983B1 (ko) * 2013-03-07 2017-05-15 스미또모 베이크라이트 가부시키가이샤 접착 필름, 다이싱 시트 일체형 접착 필름, 백그라인드 테이프 일체형 접착 필름, 백그라인드 테이프 겸 다이싱 시트 일체형 접착 필름, 적층체, 적층체의 경화물, 및 반도체 장치, 그리고 반도체 장치의 제조 방법
JP7676108B2 (ja) * 2019-12-06 2025-05-14 富士電機株式会社 半導体装置及び半導体装置の製造方法

Family Cites Families (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0472659A (ja) * 1990-07-12 1992-03-06 Fujitsu Ltd 半導体装置およびその製造方法
JPH0992683A (ja) * 1995-09-25 1997-04-04 Fujitsu Ltd 半導体装置
JPH1079405A (ja) * 1996-09-04 1998-03-24 Hitachi Ltd 半導体装置およびそれが実装された電子部品
JPH10144728A (ja) * 1996-11-14 1998-05-29 Sony Corp 表面実装部品及びこれを用いたプリント配線板
JP2000031340A (ja) * 1998-07-15 2000-01-28 Murata Mfg Co Ltd 電子部品
CN1207785C (zh) * 2000-03-21 2005-06-22 三菱电机株式会社 半导体器件、电子装置的制造方法、电子装置和携带式信息终端
JP2004119550A (ja) * 2002-09-25 2004-04-15 Renesas Technology Corp 半導体装置およびその製造方法

Also Published As

Publication number Publication date
JP2009016522A (ja) 2009-01-22

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