JP4939690B2 - 半導体装置の作製方法 - Google Patents
半導体装置の作製方法 Download PDFInfo
- Publication number
- JP4939690B2 JP4939690B2 JP2001022386A JP2001022386A JP4939690B2 JP 4939690 B2 JP4939690 B2 JP 4939690B2 JP 2001022386 A JP2001022386 A JP 2001022386A JP 2001022386 A JP2001022386 A JP 2001022386A JP 4939690 B2 JP4939690 B2 JP 4939690B2
- Authority
- JP
- Japan
- Prior art keywords
- film
- region
- electrode
- semiconductor
- semiconductor layer
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
Images
Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D30/00—Field-effect transistors [FET]
- H10D30/60—Insulated-gate field-effect transistors [IGFET]
- H10D30/67—Thin-film transistors [TFT]
- H10D30/6729—Thin-film transistors [TFT] characterised by the electrodes
- H10D30/673—Thin-film transistors [TFT] characterised by the electrodes characterised by the shapes, relative sizes or dispositions of the gate electrodes
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D30/00—Field-effect transistors [FET]
- H10D30/01—Manufacture or treatment
- H10D30/021—Manufacture or treatment of FETs having insulated gates [IGFET]
- H10D30/031—Manufacture or treatment of FETs having insulated gates [IGFET] of thin-film transistors [TFT]
- H10D30/0312—Manufacture or treatment of FETs having insulated gates [IGFET] of thin-film transistors [TFT] characterised by the gate electrodes
- H10D30/0314—Manufacture or treatment of FETs having insulated gates [IGFET] of thin-film transistors [TFT] characterised by the gate electrodes of lateral top-gate TFTs comprising only a single gate
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D30/00—Field-effect transistors [FET]
- H10D30/01—Manufacture or treatment
- H10D30/021—Manufacture or treatment of FETs having insulated gates [IGFET]
- H10D30/031—Manufacture or treatment of FETs having insulated gates [IGFET] of thin-film transistors [TFT]
- H10D30/0312—Manufacture or treatment of FETs having insulated gates [IGFET] of thin-film transistors [TFT] characterised by the gate electrodes
- H10D30/0316—Manufacture or treatment of FETs having insulated gates [IGFET] of thin-film transistors [TFT] characterised by the gate electrodes of lateral bottom-gate TFTs comprising only a single gate
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D30/00—Field-effect transistors [FET]
- H10D30/01—Manufacture or treatment
- H10D30/021—Manufacture or treatment of FETs having insulated gates [IGFET]
- H10D30/031—Manufacture or treatment of FETs having insulated gates [IGFET] of thin-film transistors [TFT]
- H10D30/0321—Manufacture or treatment of FETs having insulated gates [IGFET] of thin-film transistors [TFT] comprising silicon, e.g. amorphous silicon or polysilicon
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D30/00—Field-effect transistors [FET]
- H10D30/60—Insulated-gate field-effect transistors [IGFET]
- H10D30/67—Thin-film transistors [TFT]
- H10D30/6704—Thin-film transistors [TFT] having supplementary regions or layers in the thin films or in the insulated bulk substrates for controlling properties of the device
- H10D30/6713—Thin-film transistors [TFT] having supplementary regions or layers in the thin films or in the insulated bulk substrates for controlling properties of the device characterised by the properties of the source or drain regions, e.g. compositions or sectional shapes
- H10D30/6715—Thin-film transistors [TFT] having supplementary regions or layers in the thin films or in the insulated bulk substrates for controlling properties of the device characterised by the properties of the source or drain regions, e.g. compositions or sectional shapes characterised by the doping profiles, e.g. having lightly-doped source or drain extensions
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D30/00—Field-effect transistors [FET]
- H10D30/60—Insulated-gate field-effect transistors [IGFET]
- H10D30/67—Thin-film transistors [TFT]
- H10D30/6704—Thin-film transistors [TFT] having supplementary regions or layers in the thin films or in the insulated bulk substrates for controlling properties of the device
- H10D30/6713—Thin-film transistors [TFT] having supplementary regions or layers in the thin films or in the insulated bulk substrates for controlling properties of the device characterised by the properties of the source or drain regions, e.g. compositions or sectional shapes
- H10D30/6715—Thin-film transistors [TFT] having supplementary regions or layers in the thin films or in the insulated bulk substrates for controlling properties of the device characterised by the properties of the source or drain regions, e.g. compositions or sectional shapes characterised by the doping profiles, e.g. having lightly-doped source or drain extensions
- H10D30/6717—Thin-film transistors [TFT] having supplementary regions or layers in the thin films or in the insulated bulk substrates for controlling properties of the device characterised by the properties of the source or drain regions, e.g. compositions or sectional shapes characterised by the doping profiles, e.g. having lightly-doped source or drain extensions the source and the drain regions being asymmetrical
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D30/00—Field-effect transistors [FET]
- H10D30/60—Insulated-gate field-effect transistors [IGFET]
- H10D30/67—Thin-film transistors [TFT]
- H10D30/6704—Thin-film transistors [TFT] having supplementary regions or layers in the thin films or in the insulated bulk substrates for controlling properties of the device
- H10D30/6713—Thin-film transistors [TFT] having supplementary regions or layers in the thin films or in the insulated bulk substrates for controlling properties of the device characterised by the properties of the source or drain regions, e.g. compositions or sectional shapes
- H10D30/6715—Thin-film transistors [TFT] having supplementary regions or layers in the thin films or in the insulated bulk substrates for controlling properties of the device characterised by the properties of the source or drain regions, e.g. compositions or sectional shapes characterised by the doping profiles, e.g. having lightly-doped source or drain extensions
- H10D30/6719—Thin-film transistors [TFT] having supplementary regions or layers in the thin films or in the insulated bulk substrates for controlling properties of the device characterised by the properties of the source or drain regions, e.g. compositions or sectional shapes characterised by the doping profiles, e.g. having lightly-doped source or drain extensions having significant overlap between the lightly-doped drains and the gate electrodes, e.g. gate-overlapped LDD [GOLDD] TFTs
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D30/00—Field-effect transistors [FET]
- H10D30/60—Insulated-gate field-effect transistors [IGFET]
- H10D30/67—Thin-film transistors [TFT]
- H10D30/6729—Thin-film transistors [TFT] characterised by the electrodes
- H10D30/6737—Thin-film transistors [TFT] characterised by the electrodes characterised by the electrode materials
- H10D30/6739—Conductor-insulator-semiconductor electrodes
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D86/00—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D86/00—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
- H10D86/01—Manufacture or treatment
- H10D86/021—Manufacture or treatment of multiple TFTs
- H10D86/0221—Manufacture or treatment of multiple TFTs comprising manufacture, treatment or patterning of TFT semiconductor bodies
- H10D86/0223—Manufacture or treatment of multiple TFTs comprising manufacture, treatment or patterning of TFT semiconductor bodies comprising crystallisation of amorphous, microcrystalline or polycrystalline semiconductor materials
- H10D86/0225—Manufacture or treatment of multiple TFTs comprising manufacture, treatment or patterning of TFT semiconductor bodies comprising crystallisation of amorphous, microcrystalline or polycrystalline semiconductor materials using crystallisation-promoting species, e.g. using a Ni catalyst
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D30/00—Field-effect transistors [FET]
- H10D30/60—Insulated-gate field-effect transistors [IGFET]
- H10D30/67—Thin-film transistors [TFT]
- H10D30/6704—Thin-film transistors [TFT] having supplementary regions or layers in the thin films or in the insulated bulk substrates for controlling properties of the device
- H10D30/6713—Thin-film transistors [TFT] having supplementary regions or layers in the thin films or in the insulated bulk substrates for controlling properties of the device characterised by the properties of the source or drain regions, e.g. compositions or sectional shapes
- H10D30/6715—Thin-film transistors [TFT] having supplementary regions or layers in the thin films or in the insulated bulk substrates for controlling properties of the device characterised by the properties of the source or drain regions, e.g. compositions or sectional shapes characterised by the doping profiles, e.g. having lightly-doped source or drain extensions
- H10D30/6721—Thin-film transistors [TFT] having supplementary regions or layers in the thin films or in the insulated bulk substrates for controlling properties of the device characterised by the properties of the source or drain regions, e.g. compositions or sectional shapes characterised by the doping profiles, e.g. having lightly-doped source or drain extensions having lightly-doped extensions consisting of multiple lightly doped zones or having non-homogeneous dopant distributions, e.g. graded LDD
Landscapes
- Thin Film Transistor (AREA)
- Recrystallisation Techniques (AREA)
Priority Applications (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2001022386A JP4939690B2 (ja) | 2001-01-30 | 2001-01-30 | 半導体装置の作製方法 |
| US10/058,158 US6713323B2 (en) | 2001-01-30 | 2002-01-29 | Semiconductor device and method of manufacturing the same |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2001022386A JP4939690B2 (ja) | 2001-01-30 | 2001-01-30 | 半導体装置の作製方法 |
Publications (3)
| Publication Number | Publication Date |
|---|---|
| JP2002231952A JP2002231952A (ja) | 2002-08-16 |
| JP2002231952A5 JP2002231952A5 (enExample) | 2008-03-21 |
| JP4939690B2 true JP4939690B2 (ja) | 2012-05-30 |
Family
ID=18887809
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2001022386A Expired - Fee Related JP4939690B2 (ja) | 2001-01-30 | 2001-01-30 | 半導体装置の作製方法 |
Country Status (2)
| Country | Link |
|---|---|
| US (1) | US6713323B2 (enExample) |
| JP (1) | JP4939690B2 (enExample) |
Families Citing this family (34)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP4056571B2 (ja) | 1995-08-02 | 2008-03-05 | 株式会社半導体エネルギー研究所 | 半導体装置の作製方法 |
| US7045444B2 (en) | 2000-12-19 | 2006-05-16 | Semiconductor Energy Laboratory Co., Ltd. | Method of manufacturing semiconductor device that includes selectively adding a noble gas element |
| US6858480B2 (en) | 2001-01-18 | 2005-02-22 | Semiconductor Energy Laboratory Co., Ltd. | Method of manufacturing semiconductor device |
| US6812081B2 (en) * | 2001-03-26 | 2004-11-02 | Semiconductor Energy Laboratory Co.,.Ltd. | Method of manufacturing semiconductor device |
| US6756608B2 (en) * | 2001-08-27 | 2004-06-29 | Semiconductor Energy Laboratory Co., Ltd. | Semiconductor device and method of manufacturing the same |
| JP2003297750A (ja) * | 2002-04-05 | 2003-10-17 | Semiconductor Energy Lab Co Ltd | 半導体装置およびその作製方法 |
| TWI265636B (en) * | 2002-06-21 | 2006-11-01 | Sanyo Electric Co | Method for producing thin film transistor |
| JP4689155B2 (ja) * | 2002-08-29 | 2011-05-25 | 株式会社半導体エネルギー研究所 | 半導体装置の作製方法 |
| US7161291B2 (en) * | 2002-09-24 | 2007-01-09 | Dai Nippon Printing Co., Ltd | Display element and method for producing the same |
| US7335255B2 (en) * | 2002-11-26 | 2008-02-26 | Semiconductor Energy Laboratory, Co., Ltd. | Manufacturing method of semiconductor device |
| JP4666907B2 (ja) * | 2002-12-13 | 2011-04-06 | 株式会社半導体エネルギー研究所 | 半導体装置の作製方法 |
| US7485579B2 (en) * | 2002-12-13 | 2009-02-03 | Semiconductor Energy Laboratory Co., Ltd. | Method of manufacturing a semiconductor device |
| JP2004200378A (ja) * | 2002-12-18 | 2004-07-15 | Semiconductor Energy Lab Co Ltd | 半導体装置の作製方法 |
| JP4663963B2 (ja) | 2003-02-17 | 2011-04-06 | 株式会社半導体エネルギー研究所 | 半導体装置の作製方法 |
| JP4116465B2 (ja) * | 2003-02-20 | 2008-07-09 | 株式会社日立製作所 | パネル型表示装置とその製造方法および製造装置 |
| AT500259B1 (de) * | 2003-09-09 | 2007-08-15 | Austria Tech & System Tech | Dünnschichtanordnung und verfahren zum herstellen einer solchen dünnschichtanordnung |
| US6886330B1 (en) * | 2003-11-19 | 2005-05-03 | General Motors Corporation | Hydroformed torque converter fluid coupling member |
| KR100611152B1 (ko) * | 2003-11-27 | 2006-08-09 | 삼성에스디아이 주식회사 | 평판표시장치 |
| US7507617B2 (en) * | 2003-12-25 | 2009-03-24 | Semiconductor Energy Laboratory Co., Ltd. | Method for manufacturing semiconductor device |
| US7276402B2 (en) * | 2003-12-25 | 2007-10-02 | Semiconductor Energy Laboratory Co., Ltd. | Semiconductor device and manufacturing method thereof |
| US8815060B2 (en) * | 2004-08-30 | 2014-08-26 | HGST Netherlands B.V. | Method for minimizing magnetically dead interfacial layer during COC process |
| US7485511B2 (en) * | 2005-06-01 | 2009-02-03 | Semiconductor Energy Laboratory Co., Ltd. | Integrated circuit device and method for manufacturing integrated circuit device |
| US8115206B2 (en) * | 2005-07-22 | 2012-02-14 | Semiconductor Energy Laboratory Co., Ltd. | Semiconductor device |
| KR100683791B1 (ko) * | 2005-07-30 | 2007-02-20 | 삼성에스디아이 주식회사 | 박막 트랜지스터 기판 및 이를 구비한 평판 디스플레이장치 |
| US7601566B2 (en) | 2005-10-18 | 2009-10-13 | Semiconductor Energy Laboratory Co., Ltd. | Semiconductor device and manufacturing method thereof |
| KR100805154B1 (ko) * | 2006-09-15 | 2008-02-21 | 삼성에스디아이 주식회사 | 유기 발광 표시 장치 및 그 제조 방법 |
| US7923337B2 (en) * | 2007-06-20 | 2011-04-12 | International Business Machines Corporation | Fin field effect transistor devices with self-aligned source and drain regions |
| US8395156B2 (en) * | 2009-11-24 | 2013-03-12 | Semiconductor Energy Laboratory Co., Ltd. | Display device |
| JP5993141B2 (ja) * | 2010-12-28 | 2016-09-14 | 株式会社半導体エネルギー研究所 | 記憶装置 |
| FR2978604B1 (fr) * | 2011-07-28 | 2018-09-14 | Soitec | Procede de guerison de defauts dans une couche semi-conductrice |
| KR102236381B1 (ko) * | 2014-07-18 | 2021-04-06 | 삼성디스플레이 주식회사 | 유기 발광 표시 장치 및 유기 발광 표시 장치의 제조 방법 |
| US10338446B2 (en) * | 2014-12-16 | 2019-07-02 | Sharp Kabushiki Kaisha | Semiconductor device having low resistance source and drain regions |
| JP6977561B2 (ja) * | 2015-11-18 | 2021-12-08 | ソニーグループ株式会社 | 半導体装置および投射型表示装置 |
| US11650469B2 (en) * | 2018-03-28 | 2023-05-16 | Sharp Kabushiki Kaisha | Method for producing display device |
Family Cites Families (13)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH05109737A (ja) | 1991-10-18 | 1993-04-30 | Casio Comput Co Ltd | 薄膜トランジスタの製造方法 |
| JP3431041B2 (ja) | 1993-11-12 | 2003-07-28 | 株式会社半導体エネルギー研究所 | 半導体装置の作製方法 |
| TW264575B (enExample) | 1993-10-29 | 1995-12-01 | Handotai Energy Kenkyusho Kk | |
| JP3431033B2 (ja) | 1993-10-29 | 2003-07-28 | 株式会社半導体エネルギー研究所 | 半導体作製方法 |
| JP3539821B2 (ja) * | 1995-03-27 | 2004-07-07 | 株式会社半導体エネルギー研究所 | 半導体装置の作製方法 |
| US5753560A (en) * | 1996-10-31 | 1998-05-19 | Motorola, Inc. | Method for fabricating a semiconductor device using lateral gettering |
| JPH1140498A (ja) * | 1997-07-22 | 1999-02-12 | Semiconductor Energy Lab Co Ltd | 半導体装置の作製方法 |
| JP4159713B2 (ja) * | 1998-11-25 | 2008-10-01 | 株式会社半導体エネルギー研究所 | 半導体装置 |
| US6306694B1 (en) * | 1999-03-12 | 2001-10-23 | Semiconductor Energy Laboratory Co., Ltd. | Process of fabricating a semiconductor device |
| JP3425392B2 (ja) * | 1999-05-27 | 2003-07-14 | シャープ株式会社 | 半導体装置の製造方法 |
| JP2001210828A (ja) | 2000-01-28 | 2001-08-03 | Seiko Epson Corp | 薄膜半導体装置の製造方法 |
| JP2001319878A (ja) * | 2000-05-11 | 2001-11-16 | Sharp Corp | 半導体製造方法 |
| SG103846A1 (en) * | 2001-02-28 | 2004-05-26 | Semiconductor Energy Lab | A method of manufacturing a semiconductor device |
-
2001
- 2001-01-30 JP JP2001022386A patent/JP4939690B2/ja not_active Expired - Fee Related
-
2002
- 2002-01-29 US US10/058,158 patent/US6713323B2/en not_active Expired - Lifetime
Also Published As
| Publication number | Publication date |
|---|---|
| US6713323B2 (en) | 2004-03-30 |
| JP2002231952A (ja) | 2002-08-16 |
| US20020102776A1 (en) | 2002-08-01 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| JP4939690B2 (ja) | 半導体装置の作製方法 | |
| JP4993810B2 (ja) | 半導体装置の作製方法 | |
| JP5088993B2 (ja) | 半導体装置の作製方法 | |
| JP5393726B2 (ja) | 半導体装置の作製方法 | |
| KR100803231B1 (ko) | 반도체장치 및 그의 제작방법 | |
| JP5072157B2 (ja) | 半導体装置の作製方法 | |
| JP2011101029A (ja) | 半導体装置及びその作製方法 | |
| JP2003229578A (ja) | 半導体装置、表示装置およびその作製方法 | |
| JP5046439B2 (ja) | 半導体装置の作製方法 | |
| JP4064075B2 (ja) | 半導体装置の作製方法 | |
| JP5292453B2 (ja) | 半導体装置の作製方法 | |
| JP4216003B2 (ja) | 半導体装置の作製方法 | |
| JP4346852B2 (ja) | 半導体装置の作製方法 | |
| JP4176362B2 (ja) | 半導体装置の作製方法 | |
| JP4712197B2 (ja) | 半導体装置の作製方法 | |
| US7141823B2 (en) | Thin film transistor semiconductor device | |
| JP5520911B2 (ja) | 半導体装置の作製方法 | |
| JP2004022900A (ja) | 半導体装置の作製方法 | |
| JP4212844B2 (ja) | 半導体装置の作製方法 | |
| JP4342843B2 (ja) | 半導体装置の作製方法 | |
| JP4766758B2 (ja) | 半導体装置の作製方法 | |
| JP4954387B2 (ja) | 半導体装置の作製方法 | |
| JP2005322935A (ja) | 半導体装置およびその作製方法 | |
| JP4837871B2 (ja) | 半導体装置の作製方法 | |
| JP4267253B2 (ja) | 半導体装置の作製方法 |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| A521 | Request for written amendment filed |
Free format text: JAPANESE INTERMEDIATE CODE: A523 Effective date: 20080130 |
|
| A621 | Written request for application examination |
Free format text: JAPANESE INTERMEDIATE CODE: A621 Effective date: 20080130 |
|
| A977 | Report on retrieval |
Free format text: JAPANESE INTERMEDIATE CODE: A971007 Effective date: 20110819 |
|
| A131 | Notification of reasons for refusal |
Free format text: JAPANESE INTERMEDIATE CODE: A131 Effective date: 20111004 |
|
| A521 | Request for written amendment filed |
Free format text: JAPANESE INTERMEDIATE CODE: A523 Effective date: 20111121 |
|
| TRDD | Decision of grant or rejection written | ||
| A01 | Written decision to grant a patent or to grant a registration (utility model) |
Free format text: JAPANESE INTERMEDIATE CODE: A01 Effective date: 20120221 |
|
| A01 | Written decision to grant a patent or to grant a registration (utility model) |
Free format text: JAPANESE INTERMEDIATE CODE: A01 |
|
| A61 | First payment of annual fees (during grant procedure) |
Free format text: JAPANESE INTERMEDIATE CODE: A61 Effective date: 20120227 |
|
| FPAY | Renewal fee payment (event date is renewal date of database) |
Free format text: PAYMENT UNTIL: 20150302 Year of fee payment: 3 |
|
| R150 | Certificate of patent or registration of utility model |
Free format text: JAPANESE INTERMEDIATE CODE: R150 |
|
| FPAY | Renewal fee payment (event date is renewal date of database) |
Free format text: PAYMENT UNTIL: 20150302 Year of fee payment: 3 |
|
| R250 | Receipt of annual fees |
Free format text: JAPANESE INTERMEDIATE CODE: R250 |
|
| R250 | Receipt of annual fees |
Free format text: JAPANESE INTERMEDIATE CODE: R250 |
|
| R250 | Receipt of annual fees |
Free format text: JAPANESE INTERMEDIATE CODE: R250 |
|
| LAPS | Cancellation because of no payment of annual fees |