JP4912647B2 - 半導体記憶装置およびその製造方法 - Google Patents

半導体記憶装置およびその製造方法 Download PDF

Info

Publication number
JP4912647B2
JP4912647B2 JP2005260383A JP2005260383A JP4912647B2 JP 4912647 B2 JP4912647 B2 JP 4912647B2 JP 2005260383 A JP2005260383 A JP 2005260383A JP 2005260383 A JP2005260383 A JP 2005260383A JP 4912647 B2 JP4912647 B2 JP 4912647B2
Authority
JP
Japan
Prior art keywords
insulating film
gate
substrate
memory device
semiconductor memory
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
JP2005260383A
Other languages
English (en)
Japanese (ja)
Other versions
JP2007073804A (ja
JP2007073804A5 (https=
Inventor
恒昭 疋田
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Renesas Electronics Corp
Original Assignee
Renesas Electronics Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Renesas Electronics Corp filed Critical Renesas Electronics Corp
Priority to JP2005260383A priority Critical patent/JP4912647B2/ja
Priority to CNA2006101281351A priority patent/CN1929115A/zh
Priority to US11/515,000 priority patent/US7315058B2/en
Publication of JP2007073804A publication Critical patent/JP2007073804A/ja
Publication of JP2007073804A5 publication Critical patent/JP2007073804A5/ja
Application granted granted Critical
Publication of JP4912647B2 publication Critical patent/JP4912647B2/ja
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Images

Classifications

    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00Field-effect transistors [FET]
    • H10D30/60Insulated-gate field-effect transistors [IGFET]
    • H10D30/68Floating-gate IGFETs
    • H10D30/681Floating-gate IGFETs having only two programming levels
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10BELECTRONIC MEMORY DEVICES
    • H10B41/00Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates
    • H10B41/30Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates characterised by the memory core region
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10BELECTRONIC MEMORY DEVICES
    • H10B69/00Erasable-and-programmable ROM [EPROM] devices not provided for in groups H10B41/00 - H10B63/00, e.g. ultraviolet erasable-and-programmable ROM [UVEPROM] devices
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00Field-effect transistors [FET]
    • H10D30/60Insulated-gate field-effect transistors [IGFET]
    • H10D30/68Floating-gate IGFETs
    • H10D30/6891Floating-gate IGFETs characterised by the shapes, relative sizes or dispositions of the floating gate electrode

Landscapes

  • Non-Volatile Memory (AREA)
  • Semiconductor Memories (AREA)
JP2005260383A 2005-09-08 2005-09-08 半導体記憶装置およびその製造方法 Expired - Fee Related JP4912647B2 (ja)

Priority Applications (3)

Application Number Priority Date Filing Date Title
JP2005260383A JP4912647B2 (ja) 2005-09-08 2005-09-08 半導体記憶装置およびその製造方法
CNA2006101281351A CN1929115A (zh) 2005-09-08 2006-09-05 半导体存储装置及其制造方法
US11/515,000 US7315058B2 (en) 2005-09-08 2006-09-05 Semiconductor memory device having a floating gate

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2005260383A JP4912647B2 (ja) 2005-09-08 2005-09-08 半導体記憶装置およびその製造方法

Publications (3)

Publication Number Publication Date
JP2007073804A JP2007073804A (ja) 2007-03-22
JP2007073804A5 JP2007073804A5 (https=) 2008-10-09
JP4912647B2 true JP4912647B2 (ja) 2012-04-11

Family

ID=37829257

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2005260383A Expired - Fee Related JP4912647B2 (ja) 2005-09-08 2005-09-08 半導体記憶装置およびその製造方法

Country Status (3)

Country Link
US (1) US7315058B2 (https=)
JP (1) JP4912647B2 (https=)
CN (1) CN1929115A (https=)

Families Citing this family (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100590568B1 (ko) * 2004-11-09 2006-06-19 삼성전자주식회사 멀티 비트 플래시 메모리 소자 및 동작 방법
US7968934B2 (en) * 2007-07-11 2011-06-28 Infineon Technologies Ag Memory device including a gate control layer
US8247861B2 (en) * 2007-07-18 2012-08-21 Infineon Technologies Ag Semiconductor device and method of making same
US8320191B2 (en) 2007-08-30 2012-11-27 Infineon Technologies Ag Memory cell arrangement, method for controlling a memory cell, memory array and electronic device
US20110133266A1 (en) * 2009-12-03 2011-06-09 Sanh Tang Flash Memory Having a Floating Gate in the Shape of a Curved Section

Family Cites Families (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2799566B2 (ja) * 1985-11-14 1998-09-17 セイコーインスツルメンツ株式会社 半導体装置の製造方法
JPH07130884A (ja) * 1993-10-29 1995-05-19 Oki Electric Ind Co Ltd 不揮発性半導体メモリの製造方法
JPH08181231A (ja) * 1994-12-27 1996-07-12 Hitachi Ltd 不揮発性半導体記憶装置及びその製造方法
JPH11354742A (ja) 1998-06-08 1999-12-24 Hitachi Ltd 半導体装置及びその製造方法
US6091104A (en) * 1999-03-24 2000-07-18 Chen; Chiou-Feng Flash memory cell with self-aligned gates and fabrication process
JP2003188290A (ja) * 2001-12-19 2003-07-04 Mitsubishi Electric Corp 不揮発性半導体記憶装置およびその製造方法
US6894339B2 (en) * 2003-01-02 2005-05-17 Actrans System Inc. Flash memory with trench select gate and fabrication process
JP2005051227A (ja) * 2003-07-17 2005-02-24 Nec Electronics Corp 半導体記憶装置
JP2005085903A (ja) * 2003-09-05 2005-03-31 Renesas Technology Corp 半導体装置およびその製造方法
JP2006121009A (ja) * 2004-10-25 2006-05-11 Renesas Technology Corp 半導体記憶装置およびその製造方法

Also Published As

Publication number Publication date
JP2007073804A (ja) 2007-03-22
US7315058B2 (en) 2008-01-01
CN1929115A (zh) 2007-03-14
US20070052006A1 (en) 2007-03-08

Similar Documents

Publication Publication Date Title
JP5734744B2 (ja) 半導体装置およびその製造方法
US9825049B2 (en) Semiconductor device and manufacturing method of semiconductor device
JP5538838B2 (ja) 半導体装置およびその製造方法
US6815764B2 (en) Local SONOS-type structure having two-piece gate and self-aligned ONO and method for manufacturing the same
JP5629120B2 (ja) 半導体装置
JP5592214B2 (ja) 半導体装置の製造方法
CN106952920B (zh) 半导体器件及其制造方法
TW201603144A (zh) 半導體裝置之製造方法
JP2007281092A (ja) 半導体装置およびその製造方法
JP2006108620A (ja) 導電性側壁スペーサを有する不揮発性メモリ装置及びその製造方法
CN109994542B (zh) 半导体器件及其制造方法
CN106024889A (zh) 半导体器件及其制造方法
JP4912647B2 (ja) 半導体記憶装置およびその製造方法
JP4817980B2 (ja) 不揮発性半導体記憶装置及び不揮発性半導体記憶装置の製造方法
US7220651B2 (en) Transistor and method for manufacturing the same
JP2007250854A (ja) 半導体記憶装置およびその製造方法
JPWO2008050775A1 (ja) 半導体装置及びその製造方法
JP4629982B2 (ja) 不揮発性記憶素子およびその製造方法
JP2007115773A (ja) 半導体記憶装置およびその製造方法
JP5014591B2 (ja) 半導体装置及びその製造方法
JP2009194221A (ja) 半導体装置およびその製造方法
JP2011210777A (ja) 半導体装置およびその製造方法
JP2012069652A (ja) 半導体装置およびその製造方法
JP2005108915A (ja) 半導体装置及びその製造方法

Legal Events

Date Code Title Description
A521 Request for written amendment filed

Free format text: JAPANESE INTERMEDIATE CODE: A523

Effective date: 20080821

A621 Written request for application examination

Free format text: JAPANESE INTERMEDIATE CODE: A621

Effective date: 20080821

A977 Report on retrieval

Free format text: JAPANESE INTERMEDIATE CODE: A971007

Effective date: 20101028

A131 Notification of reasons for refusal

Free format text: JAPANESE INTERMEDIATE CODE: A131

Effective date: 20110118

A131 Notification of reasons for refusal

Free format text: JAPANESE INTERMEDIATE CODE: A131

Effective date: 20111018

A521 Request for written amendment filed

Free format text: JAPANESE INTERMEDIATE CODE: A523

Effective date: 20111219

TRDD Decision of grant or rejection written
A01 Written decision to grant a patent or to grant a registration (utility model)

Free format text: JAPANESE INTERMEDIATE CODE: A01

Effective date: 20120117

A01 Written decision to grant a patent or to grant a registration (utility model)

Free format text: JAPANESE INTERMEDIATE CODE: A01

A61 First payment of annual fees (during grant procedure)

Free format text: JAPANESE INTERMEDIATE CODE: A61

Effective date: 20120118

R150 Certificate of patent or registration of utility model

Ref document number: 4912647

Country of ref document: JP

Free format text: JAPANESE INTERMEDIATE CODE: R150

Free format text: JAPANESE INTERMEDIATE CODE: R150

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20150127

Year of fee payment: 3

S531 Written request for registration of change of domicile

Free format text: JAPANESE INTERMEDIATE CODE: R313531

R350 Written notification of registration of transfer

Free format text: JAPANESE INTERMEDIATE CODE: R350

LAPS Cancellation because of no payment of annual fees