JP4892199B2 - 不揮発性半導体記憶装置の製造方法 - Google Patents

不揮発性半導体記憶装置の製造方法 Download PDF

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Publication number
JP4892199B2
JP4892199B2 JP2005165854A JP2005165854A JP4892199B2 JP 4892199 B2 JP4892199 B2 JP 4892199B2 JP 2005165854 A JP2005165854 A JP 2005165854A JP 2005165854 A JP2005165854 A JP 2005165854A JP 4892199 B2 JP4892199 B2 JP 4892199B2
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JP
Japan
Prior art keywords
silicon oxide
oxide film
film
gate
memory device
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
JP2005165854A
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English (en)
Japanese (ja)
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JP2006339599A5 (enExample
JP2006339599A (ja
Inventor
小林  孝
利之 峰
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Renesas Electronics Corp
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Renesas Electronics Corp
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Publication date
Application filed by Renesas Electronics Corp filed Critical Renesas Electronics Corp
Priority to JP2005165854A priority Critical patent/JP4892199B2/ja
Priority to US11/446,220 priority patent/US7692233B2/en
Publication of JP2006339599A publication Critical patent/JP2006339599A/ja
Publication of JP2006339599A5 publication Critical patent/JP2006339599A5/ja
Application granted granted Critical
Publication of JP4892199B2 publication Critical patent/JP4892199B2/ja
Anticipated expiration legal-status Critical
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Classifications

    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00Field-effect transistors [FET]
    • H10D30/60Insulated-gate field-effect transistors [IGFET]
    • H10D30/68Floating-gate IGFETs
    • H10D30/681Floating-gate IGFETs having only two programming levels
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10BELECTRONIC MEMORY DEVICES
    • H10B41/00Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates
    • H10B41/30Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates characterised by the memory core region
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10BELECTRONIC MEMORY DEVICES
    • H10B69/00Erasable-and-programmable ROM [EPROM] devices not provided for in groups H10B41/00 - H10B63/00, e.g. ultraviolet erasable-and-programmable ROM [UVEPROM] devices
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00Field-effect transistors [FET]
    • H10D30/01Manufacture or treatment
    • H10D30/021Manufacture or treatment of FETs having insulated gates [IGFET]
    • H10D30/0411Manufacture or treatment of FETs having insulated gates [IGFET] of FETs having floating gates
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00Field-effect transistors [FET]
    • H10D30/60Insulated-gate field-effect transistors [IGFET]
    • H10D30/68Floating-gate IGFETs
    • H10D30/6891Floating-gate IGFETs characterised by the shapes, relative sizes or dispositions of the floating gate electrode
    • H10D30/6892Floating-gate IGFETs characterised by the shapes, relative sizes or dispositions of the floating gate electrode having at least one additional gate other than the floating gate and the control gate, e.g. program gate, erase gate or select gate
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D64/00Electrodes of devices having potential barriers
    • H10D64/01Manufacture or treatment
    • H10D64/031Manufacture or treatment of data-storage electrodes
    • H10D64/035Manufacture or treatment of data-storage electrodes comprising conductor-insulator-conductor-insulator-semiconductor structures
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D64/00Electrodes of devices having potential barriers
    • H10D64/60Electrodes characterised by their materials
    • H10D64/66Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes
    • H10D64/68Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes characterised by the insulator, e.g. by the gate insulator
    • H10D64/681Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes characterised by the insulator, e.g. by the gate insulator having a compositional variation, e.g. multilayered
    • H10D64/685Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes characterised by the insulator, e.g. by the gate insulator having a compositional variation, e.g. multilayered being perpendicular to the channel plane
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02107Forming insulating materials on a substrate
    • H01L21/02109Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
    • H01L21/02112Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
    • H01L21/02123Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon
    • H01L21/02164Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon the material being a silicon oxide, e.g. SiO2
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02107Forming insulating materials on a substrate
    • H01L21/02109Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
    • H01L21/02112Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
    • H01L21/02123Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon
    • H01L21/0217Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon the material being a silicon nitride not containing oxygen, e.g. SixNy or SixByNz

Landscapes

  • Non-Volatile Memory (AREA)
  • Semiconductor Memories (AREA)
  • Formation Of Insulating Films (AREA)
JP2005165854A 2005-06-06 2005-06-06 不揮発性半導体記憶装置の製造方法 Expired - Fee Related JP4892199B2 (ja)

Priority Applications (2)

Application Number Priority Date Filing Date Title
JP2005165854A JP4892199B2 (ja) 2005-06-06 2005-06-06 不揮発性半導体記憶装置の製造方法
US11/446,220 US7692233B2 (en) 2005-06-06 2006-06-05 Semiconductor device and manufacturing method thereof

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2005165854A JP4892199B2 (ja) 2005-06-06 2005-06-06 不揮発性半導体記憶装置の製造方法

Publications (3)

Publication Number Publication Date
JP2006339599A JP2006339599A (ja) 2006-12-14
JP2006339599A5 JP2006339599A5 (enExample) 2008-07-17
JP4892199B2 true JP4892199B2 (ja) 2012-03-07

Family

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Family Applications (1)

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JP2005165854A Expired - Fee Related JP4892199B2 (ja) 2005-06-06 2005-06-06 不揮発性半導体記憶装置の製造方法

Country Status (2)

Country Link
US (1) US7692233B2 (enExample)
JP (1) JP4892199B2 (enExample)

Families Citing this family (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2007334925A (ja) * 2006-06-12 2007-12-27 Nec Electronics Corp 不揮発性半導体記憶装置
KR100831570B1 (ko) * 2006-12-27 2008-05-21 동부일렉트로닉스 주식회사 플래시 메모리소자 및 그 제조방법
US8320191B2 (en) 2007-08-30 2012-11-27 Infineon Technologies Ag Memory cell arrangement, method for controlling a memory cell, memory array and electronic device
FR2926400A1 (fr) 2008-01-11 2009-07-17 St Microelectronics Rousset Cellule eeprom a perte de charges
JP2009182076A (ja) * 2008-01-30 2009-08-13 Panasonic Corp 半導体装置及びその製造方法
FR2931289A1 (fr) 2008-05-13 2009-11-20 St Microelectronics Rousset Memoire a structure du type eeprom et a lecture seule
JP2010050208A (ja) * 2008-08-20 2010-03-04 Renesas Technology Corp 半導体記憶装置
KR20100095263A (ko) 2009-02-20 2010-08-30 삼성전자주식회사 비휘발성 메모리 소자 및 그 형성방법
KR101906167B1 (ko) 2011-10-27 2018-10-12 삼성전자주식회사 비휘발성 메모리 장치 및 그 제조 방법
CN110838491B (zh) * 2018-08-15 2022-05-10 无锡华润上华科技有限公司 半导体结构及其制造方法

Family Cites Families (17)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS57177560A (en) * 1981-04-24 1982-11-01 Fujitsu Ltd Semiconductor memory
US5095344A (en) 1988-06-08 1992-03-10 Eliyahou Harari Highly compact eprom and flash eeprom devices
US5043940A (en) 1988-06-08 1991-08-27 Eliyahou Harari Flash EEPROM memory systems having multistate storage cells
JP2670330B2 (ja) * 1989-01-17 1997-10-29 株式会社東芝 不揮発性半導体記憶装置
JP2786041B2 (ja) 1992-01-13 1998-08-13 シャープ株式会社 不揮発性半導体記憶装置の製造方法
JP3600326B2 (ja) * 1994-09-29 2004-12-15 旺宏電子股▲ふん▼有限公司 不揮発性半導体メモリ装置およびその製造方法
JP4149013B2 (ja) * 1996-12-26 2008-09-10 株式会社ルネサステクノロジ 半導体装置
KR100318683B1 (ko) * 1998-12-17 2001-12-28 윤종용 산화막/질화막/산화막 유전층의 형성방법
US6368919B2 (en) * 1999-01-19 2002-04-09 Micron Technology, Inc. Method and composite for decreasing charge leakage
JP2001015619A (ja) 1999-06-30 2001-01-19 Toshiba Corp 不揮発性半導体記憶装置の製造方法
JP4012341B2 (ja) 1999-07-14 2007-11-21 株式会社ルネサステクノロジ 半導体集積回路装置
JP2003168748A (ja) * 2001-11-30 2003-06-13 Hitachi Ltd 不揮発性半導体記憶装置およびその製造方法
US20030153149A1 (en) * 2002-02-08 2003-08-14 Zhong Dong Floating gate nitridation
JP2004040064A (ja) * 2002-07-01 2004-02-05 Yutaka Hayashi 不揮発性メモリとその製造方法
US7214579B2 (en) * 2002-10-24 2007-05-08 Nxp Bv. Self-aligned 2-bit “double poly CMP” flash memory cell
US7297597B2 (en) * 2004-07-23 2007-11-20 Promos Technologies, Inc. Method for simultaneously fabricating ONO-type memory cell, and gate dielectrics for associated high voltage write transistors and gate dielectrics for low voltage logic transistors by using ISSG
KR100766229B1 (ko) * 2005-05-30 2007-10-10 주식회사 하이닉스반도체 플래시 메모리 소자의 제조 방법

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Publication number Publication date
US20060273374A1 (en) 2006-12-07
US7692233B2 (en) 2010-04-06
JP2006339599A (ja) 2006-12-14

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