JP4892033B2 - リードフレームの製造方法 - Google Patents
リードフレームの製造方法 Download PDFInfo
- Publication number
- JP4892033B2 JP4892033B2 JP2009116788A JP2009116788A JP4892033B2 JP 4892033 B2 JP4892033 B2 JP 4892033B2 JP 2009116788 A JP2009116788 A JP 2009116788A JP 2009116788 A JP2009116788 A JP 2009116788A JP 4892033 B2 JP4892033 B2 JP 4892033B2
- Authority
- JP
- Japan
- Prior art keywords
- lead frame
- roughened
- base material
- substrate
- roughening
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/30—Die-attach connectors
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/50—Bond wires
- H10W72/551—Materials of bond wires
- H10W72/552—Materials of bond wires comprising metals or metalloids, e.g. silver
- H10W72/5522—Materials of bond wires comprising metals or metalloids, e.g. silver comprising gold [Au]
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/50—Bond wires
- H10W72/551—Materials of bond wires
- H10W72/552—Materials of bond wires comprising metals or metalloids, e.g. silver
- H10W72/5524—Materials of bond wires comprising metals or metalloids, e.g. silver comprising aluminium [Al]
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/851—Dispositions of multiple connectors or interconnections
- H10W72/874—On different surfaces
- H10W72/884—Die-attach connectors and bond wires
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/90—Bond pads, in general
- H10W72/931—Shapes of bond pads
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W90/00—Package configurations
- H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
- H10W90/731—Package configurations characterised by the relative positions of pads or connectors relative to package parts of die-attach connectors
- H10W90/736—Package configurations characterised by the relative positions of pads or connectors relative to package parts of die-attach connectors between a chip and a stacked lead frame, conducting package substrate or heat sink
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W90/00—Package configurations
- H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
- H10W90/751—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires
- H10W90/756—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires between a chip and a stacked lead frame, conducting package substrate or heat sink
Landscapes
- Lead Frames For Integrated Circuits (AREA)
Priority Applications (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2009116788A JP4892033B2 (ja) | 2009-05-13 | 2009-05-13 | リードフレームの製造方法 |
| CN200910179516.6A CN101887877B (zh) | 2009-05-13 | 2009-10-12 | 引线框的制造方法 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2009116788A JP4892033B2 (ja) | 2009-05-13 | 2009-05-13 | リードフレームの製造方法 |
Related Child Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2011244853A Division JP5376540B2 (ja) | 2011-11-08 | 2011-11-08 | リードフレーム及び半導体装置 |
Publications (3)
| Publication Number | Publication Date |
|---|---|
| JP2010267730A JP2010267730A (ja) | 2010-11-25 |
| JP2010267730A5 JP2010267730A5 (https=) | 2011-01-13 |
| JP4892033B2 true JP4892033B2 (ja) | 2012-03-07 |
Family
ID=43073710
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2009116788A Expired - Fee Related JP4892033B2 (ja) | 2009-05-13 | 2009-05-13 | リードフレームの製造方法 |
Country Status (2)
| Country | Link |
|---|---|
| JP (1) | JP4892033B2 (https=) |
| CN (1) | CN101887877B (https=) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US12224229B2 (en) | 2021-03-16 | 2025-02-11 | Kabushiki Kaisha Toshiba | Semiconductor device with grooved die pad |
Families Citing this family (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP5251991B2 (ja) * | 2011-01-14 | 2013-07-31 | トヨタ自動車株式会社 | 半導体モジュール |
| US9576884B2 (en) * | 2013-03-09 | 2017-02-21 | Adventive Ipbank | Low profile leaded semiconductor package |
| JP6142380B2 (ja) * | 2014-05-08 | 2017-06-07 | Shマテリアル株式会社 | リードフレーム及びその製造方法 |
| JP6686691B2 (ja) * | 2016-05-16 | 2020-04-22 | 株式会社デンソー | 電子装置 |
| JP6479265B2 (ja) * | 2016-12-27 | 2019-03-06 | 古河電気工業株式会社 | リードフレーム材およびその製造方法ならびに半導体パッケージ |
| JP7449665B2 (ja) * | 2019-09-26 | 2024-03-14 | 株式会社Kanzacc | 金属条材およびその金属条材の製造方法 |
| JP7029504B2 (ja) * | 2020-09-23 | 2022-03-03 | Shプレシジョン株式会社 | リードフレームおよびパワー系半導体装置の製造方法 |
Family Cites Families (12)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS60231349A (ja) * | 1984-05-01 | 1985-11-16 | Toshiba Corp | リ−ドフレ−ム |
| JPS61263142A (ja) * | 1985-05-15 | 1986-11-21 | Mitsui Haitetsuku:Kk | リ−ドフレ−ム |
| JP2006210958A (ja) * | 1997-02-27 | 2006-08-10 | Fujitsu Ltd | 半導体装置 |
| JP4208893B2 (ja) * | 1997-02-27 | 2009-01-14 | 富士通マイクロエレクトロニクス株式会社 | 半導体装置の製造方法 |
| SG76591A1 (en) * | 1999-02-27 | 2000-11-21 | Aem Tech Engineers Pte Ltd | Method for selective plating of a metal substrate using laser developed masking layer and apparatus for carrying out the method |
| JP4329678B2 (ja) * | 2004-11-11 | 2009-09-09 | 株式会社デンソー | 半導体装置に用いるリードフレームの製造方法 |
| JP2006147664A (ja) * | 2004-11-16 | 2006-06-08 | Hitachi Ltd | 電子装置用モールド部品、および電子装置 |
| JP4857594B2 (ja) * | 2005-04-26 | 2012-01-18 | 大日本印刷株式会社 | 回路部材、及び回路部材の製造方法 |
| US20090146280A1 (en) * | 2005-11-28 | 2009-06-11 | Dai Nippon Printing Co., Ltd. | Circuit member, manufacturing method of the circuit member, and semiconductor device including the circuit member |
| JP4620584B2 (ja) * | 2005-12-27 | 2011-01-26 | 大日本印刷株式会社 | 回路部材の製造方法 |
| JP2007287765A (ja) * | 2006-04-13 | 2007-11-01 | Denso Corp | 樹脂封止型半導体装置 |
| JP2008103455A (ja) * | 2006-10-18 | 2008-05-01 | Nec Electronics Corp | 半導体装置および半導体装置の製造方法 |
-
2009
- 2009-05-13 JP JP2009116788A patent/JP4892033B2/ja not_active Expired - Fee Related
- 2009-10-12 CN CN200910179516.6A patent/CN101887877B/zh not_active Expired - Fee Related
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US12224229B2 (en) | 2021-03-16 | 2025-02-11 | Kabushiki Kaisha Toshiba | Semiconductor device with grooved die pad |
Also Published As
| Publication number | Publication date |
|---|---|
| CN101887877B (zh) | 2016-02-03 |
| CN101887877A (zh) | 2010-11-17 |
| JP2010267730A (ja) | 2010-11-25 |
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