JP4891504B2 - パワーアップ状態用のトライステート回路 - Google Patents

パワーアップ状態用のトライステート回路 Download PDF

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Publication number
JP4891504B2
JP4891504B2 JP2001510991A JP2001510991A JP4891504B2 JP 4891504 B2 JP4891504 B2 JP 4891504B2 JP 2001510991 A JP2001510991 A JP 2001510991A JP 2001510991 A JP2001510991 A JP 2001510991A JP 4891504 B2 JP4891504 B2 JP 4891504B2
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JP
Japan
Prior art keywords
circuit
state
buffer circuit
control circuit
operating
Prior art date
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Expired - Lifetime
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JP2001510991A
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English (en)
Japanese (ja)
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JP2003533903A5 (enExample
JP2003533903A (ja
Inventor
ベイル，イエフイム
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Thomson Licensing SAS
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Thomson Licensing SAS
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    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/02—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
    • H03K19/08—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices
    • H03K19/094—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices using field-effect transistors
    • H03K19/09425—Multistate logic
    • H03K19/09429—Multistate logic one of the states being the high impedance or floating state
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K17/00—Electronic switching or gating, i.e. not by contact-making and –breaking
    • H03K17/22—Modifications for ensuring a predetermined initial state when the supply voltage has been applied
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/0175—Coupling arrangements; Interface arrangements
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/02—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
    • H03K19/08—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices
    • H03K19/082—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices using bipolar transistors
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/02—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
    • H03K19/08—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices
    • H03K19/082—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices using bipolar transistors
    • H03K19/0823—Multistate logic
    • H03K19/0826—Multistate logic one of the states being the high impedance or floating state

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  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • Computing Systems (AREA)
  • General Engineering & Computer Science (AREA)
  • Mathematical Physics (AREA)
  • Power Engineering (AREA)
  • Logic Circuits (AREA)
  • Television Receiver Circuits (AREA)
  • Electronic Switches (AREA)
  • Dc-Dc Converters (AREA)
JP2001510991A 1999-07-16 2000-07-14 パワーアップ状態用のトライステート回路 Expired - Lifetime JP4891504B2 (ja)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US14442299P 1999-07-16 1999-07-16
US60/144,422 1999-07-16
PCT/US2000/019258 WO2001006655A1 (en) 1999-07-16 2000-07-14 Tristate circuit for power up conditions

Publications (3)

Publication Number Publication Date
JP2003533903A JP2003533903A (ja) 2003-11-11
JP2003533903A5 JP2003533903A5 (enExample) 2007-08-16
JP4891504B2 true JP4891504B2 (ja) 2012-03-07

Family

ID=22508525

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2001510991A Expired - Lifetime JP4891504B2 (ja) 1999-07-16 2000-07-14 パワーアップ状態用のトライステート回路

Country Status (8)

Country Link
EP (1) EP1196995B1 (enExample)
JP (1) JP4891504B2 (enExample)
KR (1) KR100727570B1 (enExample)
CN (1) CN1218486C (enExample)
AU (1) AU6214700A (enExample)
DE (1) DE60006967T2 (enExample)
MX (1) MXPA02000553A (enExample)
WO (1) WO2001006655A1 (enExample)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN103746681B (zh) * 2013-12-24 2017-06-30 北京时代民芯科技有限公司 一种cmos器件电源上下电输出三态控制电路
US10345832B1 (en) * 2018-05-14 2019-07-09 Asm Ip Holding B.V. Insulation system and substrate processing apparatus

Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS54158843A (en) * 1978-06-06 1979-12-15 Nippon Telegr & Teleph Corp <Ntt> Power-on reset circuit
JPH05184066A (ja) * 1992-01-07 1993-07-23 Mitsubishi Electric Corp 出力ドライブ回路
JPH05315921A (ja) * 1992-04-02 1993-11-26 Nec Corp 出力回路
JPH0675668A (ja) * 1992-08-25 1994-03-18 Nec Corp 出力回路
JPH10188560A (ja) * 1996-12-20 1998-07-21 Fujitsu Ltd 半導体集積回路
JP2000278110A (ja) * 1999-03-23 2000-10-06 Toshiba Corp 半導体集積回路

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4210829A (en) * 1978-10-02 1980-07-01 National Semiconductor Corporation Power up circuit with high noise immunity
JPS60116223A (ja) * 1983-11-28 1985-06-22 Hitachi Ltd ドライステ−トゲ−トの保護回路
US4871926A (en) * 1988-09-06 1989-10-03 Motorola, Inc. Low power, three state power up circuit

Patent Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS54158843A (en) * 1978-06-06 1979-12-15 Nippon Telegr & Teleph Corp <Ntt> Power-on reset circuit
JPH05184066A (ja) * 1992-01-07 1993-07-23 Mitsubishi Electric Corp 出力ドライブ回路
JPH05315921A (ja) * 1992-04-02 1993-11-26 Nec Corp 出力回路
JPH0675668A (ja) * 1992-08-25 1994-03-18 Nec Corp 出力回路
JPH10188560A (ja) * 1996-12-20 1998-07-21 Fujitsu Ltd 半導体集積回路
JP2000278110A (ja) * 1999-03-23 2000-10-06 Toshiba Corp 半導体集積回路

Also Published As

Publication number Publication date
DE60006967T2 (de) 2004-10-21
CN1361944A (zh) 2002-07-31
WO2001006655A1 (en) 2001-01-25
KR100727570B1 (ko) 2007-06-14
EP1196995B1 (en) 2003-12-03
JP2003533903A (ja) 2003-11-11
DE60006967D1 (de) 2004-01-15
AU6214700A (en) 2001-02-05
KR20020027460A (ko) 2002-04-13
MXPA02000553A (es) 2002-07-02
EP1196995A1 (en) 2002-04-17
CN1218486C (zh) 2005-09-07

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