JP4861717B2 - 試験装置、及び試験方法 - Google Patents

試験装置、及び試験方法 Download PDF

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Publication number
JP4861717B2
JP4861717B2 JP2006035588A JP2006035588A JP4861717B2 JP 4861717 B2 JP4861717 B2 JP 4861717B2 JP 2006035588 A JP2006035588 A JP 2006035588A JP 2006035588 A JP2006035588 A JP 2006035588A JP 4861717 B2 JP4861717 B2 JP 4861717B2
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Japan
Prior art keywords
test
device under
under test
pin
deterministic jitter
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JP2006035588A
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Japanese (ja)
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JP2006220660A5 (https=
JP2006220660A (ja
Inventor
雅裕 石田
隆弘 山口
マニ ソーマ，
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Advantest Corp
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Advantest Corp
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    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28—Testing of electronic circuits, e.g. by signal tracer
    • G01R31/317—Testing of digital circuits
    • G01R31/31708—Analysis of signal quality
    • G01R31/31709—Jitter measurements; Jitter generators
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28—Testing of electronic circuits, e.g. by signal tracer
    • G01R31/317—Testing of digital circuits
    • G01R31/31712—Input or output aspects
    • G01R31/31716—Testing of input or output with loop-back
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28—Testing of electronic circuits, e.g. by signal tracer
    • G01R31/2851—Testing of integrated circuits [IC]
    • G01R31/2882—Testing timing characteristics

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  • Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Nonlinear Science (AREA)
  • Tests Of Electronic Circuits (AREA)
JP2006035588A 2005-02-11 2006-02-13 試験装置、及び試験方法 Expired - Fee Related JP4861717B2 (ja)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US11/056,330 US7313496B2 (en) 2005-02-11 2005-02-11 Test apparatus and test method for testing a device under test
US11/056,330 2005-02-11

Publications (3)

Publication Number Publication Date
JP2006220660A JP2006220660A (ja) 2006-08-24
JP2006220660A5 JP2006220660A5 (https=) 2009-02-12
JP4861717B2 true JP4861717B2 (ja) 2012-01-25

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JP2006035588A Expired - Fee Related JP4861717B2 (ja) 2005-02-11 2006-02-13 試験装置、及び試験方法

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US (1) US7313496B2 (https=)
JP (1) JP4861717B2 (https=)
DE (1) DE102006006048B4 (https=)

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US7277805B2 (en) * 2006-01-06 2007-10-02 International Business Machines Corporation Jitter measurements for repetitive clock signals
JP5025638B2 (ja) * 2006-04-19 2012-09-12 株式会社アドバンテスト 信号出力装置、試験装置、およびプログラム
US7936809B2 (en) * 2006-07-11 2011-05-03 Altera Corporation Economical, scalable transceiver jitter test
JP2008116420A (ja) * 2006-11-08 2008-05-22 Yokogawa Electric Corp 試験用モジュール
CN101657731B (zh) * 2007-04-24 2012-10-10 爱德万测试株式会社 测试装置及测试方法
US7991046B2 (en) * 2007-05-18 2011-08-02 Teradyne, Inc. Calibrating jitter
US7797121B2 (en) * 2007-06-07 2010-09-14 Advantest Corporation Test apparatus, and device for calibration
US8090009B2 (en) * 2007-08-07 2012-01-03 Advantest Corporation Test apparatus
US20090138761A1 (en) * 2007-11-28 2009-05-28 Jose Moreira System and method for electronic testing of devices
KR100960118B1 (ko) * 2007-12-17 2010-05-27 한국전자통신연구원 클럭 지터 발생 장치 및 이를 포함하는 시험 장치
JP5228481B2 (ja) 2007-12-28 2013-07-03 富士通株式会社 半導体装置に対する同時動作信号ノイズに基づいてジッタを見積る方法、その見積りに使用する同時動作信号ノイズ量対ジッタ量相関関係を算出する方法、それらを実現するプログラム、及び半導体装置及びそれが搭載されたプリント回路基板の設計方法
JP5012663B2 (ja) * 2008-05-27 2012-08-29 富士通株式会社 回路シミュレーション装置、回路シミュレーションプログラム、回路シミュレーション方法
US8466700B2 (en) * 2009-03-18 2013-06-18 Infineon Technologies Ag System that measures characteristics of output signal
JP5735755B2 (ja) * 2010-05-17 2015-06-17 株式会社アドバンテスト 試験装置及び試験方法
US20120194206A1 (en) * 2011-01-28 2012-08-02 Advantest Corporation Measuring Apparatus
JP5394435B2 (ja) * 2011-05-13 2014-01-22 株式会社アドバンテスト 製造方法、スイッチ装置、伝送路切り替え装置、および試験装置
US9602225B2 (en) 2011-06-28 2017-03-21 Keysight Technologies, Inc. Impairment compensation
US9667358B2 (en) 2011-06-28 2017-05-30 Keysight Technologies, Inc. Impairment compensation
JP5394451B2 (ja) * 2011-07-26 2014-01-22 株式会社アドバンテスト アクチュエータの製造方法、スイッチ装置、伝送路切替装置、および試験装置
US20150084660A1 (en) * 2013-09-25 2015-03-26 Tektronix, Inc. Time-domain reflectometer de-embed probe
TWI512309B (zh) * 2013-12-27 2015-12-11 Chroma Ate Inc 自動測試設備及其控制方法
JP2015169524A (ja) 2014-03-06 2015-09-28 株式会社アドバンテスト 試験装置、キャリブレーションデバイス、キャリブレーション方法、および試験方法
US9577818B2 (en) * 2015-02-04 2017-02-21 Teradyne, Inc. High speed data transfer using calibrated, single-clock source synchronous serializer-deserializer protocol
US9929856B1 (en) * 2016-11-07 2018-03-27 Dell Products, Lp System and method for jitter negation in a high speed serial interface
US12117486B2 (en) 2019-01-31 2024-10-15 Tektronix, Inc. Systems, methods and devices for high-speed input/output margin testing
US11940483B2 (en) 2019-01-31 2024-03-26 Tektronix, Inc. Systems, methods and devices for high-speed input/output margin testing
US12140609B2 (en) * 2020-03-31 2024-11-12 Advantest Corporation Universal test interface systems and methods
US11334459B2 (en) * 2020-08-18 2022-05-17 Advantest Corporation Flexible test systems and methods
US12061232B2 (en) 2020-09-21 2024-08-13 Tektronix, Inc. Margin test data tagging and predictive expected margins
US12055584B2 (en) 2020-11-24 2024-08-06 Tektronix, Inc. Systems, methods, and devices for high-speed input/output margin testing
WO2022111804A1 (en) * 2020-11-25 2022-06-02 Advantest Corporation An automated test equipment comprising a device under test loopback and an automated test system with an automated test equipment comprising a device under test loopback
CN112946526B (zh) * 2021-01-13 2022-12-09 桂林电子科技大学 电子器件断点检测方法、装置和电子设备

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JP3176318B2 (ja) * 1997-06-19 2001-06-18 日本電気アイシーマイコンシステム株式会社 Ｉｃ試験装置および方法
US6173427B1 (en) * 1997-06-20 2001-01-09 Nec Corporation Immunity evaluation method and apparatus for electronic circuit device and LSI tester
US6100815A (en) * 1997-12-24 2000-08-08 Electro Scientific Industries, Inc. Compound switching matrix for probing and interconnecting devices under test to measurement equipment
JP2001111408A (ja) * 1999-10-08 2001-04-20 Hitachi Ltd 高速信号伝送配線実装構造
DE60100114T2 (de) * 2001-04-03 2003-10-02 Agilent Technologies Inc., A Delaware Corp. Filter zur Einspeisung von datenabhängigem Jitter und Pegelgeräusch
US20030156545A1 (en) * 2002-02-15 2003-08-21 Masashi Shimanouchi Signal paths providing multiple test configurations
WO2003073280A1 (en) * 2002-02-26 2003-09-04 Advantest Corporation Measuring apparatus and measuring method
JP3790741B2 (ja) * 2002-12-17 2006-06-28 アンリツ株式会社 ジッタ測定装置およびジッタ測定方法
EP1464970A1 (en) 2003-04-04 2004-10-06 Agilent Technologies Inc Loop-back testing with delay elements
JP3886941B2 (ja) * 2003-07-10 2007-02-28 アンリツ株式会社 ジッタ耐力測定装置
DE102004061510A1 (de) * 2003-12-16 2005-10-06 Advantest Corp. Prüfvorrichtung und Prüfverfahren
US20050172181A1 (en) * 2004-01-16 2005-08-04 Mellanox Technologies Ltd. System and method for production testing of high speed communications receivers

Also Published As

Publication number Publication date
DE102006006048B4 (de) 2008-05-15
DE102006006048A1 (de) 2006-08-24
US20060184332A1 (en) 2006-08-17
JP2006220660A (ja) 2006-08-24
US7313496B2 (en) 2007-12-25

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