JP2022524715A5 - - Google Patents

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Publication number
JP2022524715A5
JP2022524715A5 JP2021544930A JP2021544930A JP2022524715A5 JP 2022524715 A5 JP2022524715 A5 JP 2022524715A5 JP 2021544930 A JP2021544930 A JP 2021544930A JP 2021544930 A JP2021544930 A JP 2021544930A JP 2022524715 A5 JP2022524715 A5 JP 2022524715A5
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margin
speed
link
lane
dut
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JP2021544930A
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JP7728174B2 (ja
JP2022524715A (ja
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Priority claimed from PCT/US2020/016220 external-priority patent/WO2020160477A1/en
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JP2021544930A 2019-01-31 2020-01-31 試験装置、電気的マージン試験方法及びマージン・テスタ Active JP7728174B2 (ja)

Applications Claiming Priority (5)

Application Number Priority Date Filing Date Title
US201962799720P 2019-01-31 2019-01-31
US62/799,720 2019-01-31
US201962804942P 2019-02-13 2019-02-13
US62/804,942 2019-02-13
PCT/US2020/016220 WO2020160477A1 (en) 2019-01-31 2020-01-31 Systems, methods and devices for high-speed input/output margin testing

Publications (3)

Publication Number Publication Date
JP2022524715A JP2022524715A (ja) 2022-05-10
JP2022524715A5 true JP2022524715A5 (https=) 2022-12-28
JP7728174B2 JP7728174B2 (ja) 2025-08-22

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JP2021544930A Active JP7728174B2 (ja) 2019-01-31 2020-01-31 試験装置、電気的マージン試験方法及びマージン・テスタ

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US (2) US12117486B2 (https=)
JP (1) JP7728174B2 (https=)
KR (1) KR20210119422A (https=)
CN (1) CN113396396B (https=)
DE (1) DE112020000640T5 (https=)
WO (1) WO2020160477A1 (https=)

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