JP4755592B2 - 造形部分をパターン形成する方法 - Google Patents

造形部分をパターン形成する方法 Download PDF

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Publication number
JP4755592B2
JP4755592B2 JP2006526058A JP2006526058A JP4755592B2 JP 4755592 B2 JP4755592 B2 JP 4755592B2 JP 2006526058 A JP2006526058 A JP 2006526058A JP 2006526058 A JP2006526058 A JP 2006526058A JP 4755592 B2 JP4755592 B2 JP 4755592B2
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JP
Japan
Prior art keywords
substrate
antireflection film
modeling
dimension
gas
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Expired - Fee Related
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JP2006526058A
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English (en)
Japanese (ja)
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JP2007505492A (ja
JP2007505492A5 (https=
Inventor
アラン、スコット、ディー
バビッチ、カテリナ、イー
ホームズ、スティーブン、ジェイ
マホロワラ、アルパン、ピー
ファイファー、ダーク
ワイズ、リチャード、ステファン
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International Business Machines Corp
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International Business Machines Corp
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Publication of JP2007505492A5 publication Critical patent/JP2007505492A5/ja
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    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10PGENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P50/00Etching of wafers, substrates or parts of devices
    • H10P50/73Etching of wafers, substrates or parts of devices using masks for insulating materials
    • BPERFORMING OPERATIONS; TRANSPORTING
    • B82NANOTECHNOLOGY
    • B82YSPECIFIC USES OR APPLICATIONS OF NANOSTRUCTURES; MEASUREMENT OR ANALYSIS OF NANOSTRUCTURES; MANUFACTURE OR TREATMENT OF NANOSTRUCTURES
    • B82Y40/00Manufacture or treatment of nanostructures
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10PGENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P50/00Etching of wafers, substrates or parts of devices
    • H10P50/20Dry etching; Plasma etching; Reactive-ion etching
    • H10P50/28Dry etching; Plasma etching; Reactive-ion etching of insulating materials
    • H10P50/282Dry etching; Plasma etching; Reactive-ion etching of insulating materials of inorganic materials
    • H10P50/283Dry etching; Plasma etching; Reactive-ion etching of insulating materials of inorganic materials by chemical means
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10PGENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P76/00Manufacture or treatment of masks on semiconductor bodies, e.g. by lithography or photolithography
    • H10P76/20Manufacture or treatment of masks on semiconductor bodies, e.g. by lithography or photolithography of masks comprising organic materials
    • H10P76/204Manufacture or treatment of masks on semiconductor bodies, e.g. by lithography or photolithography of masks comprising organic materials of organic photoresist masks
    • H10P76/2041Photolithographic processes
    • H10P76/2043Photolithographic processes using an anti-reflective coating
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10PGENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P76/00Manufacture or treatment of masks on semiconductor bodies, e.g. by lithography or photolithography
    • H10P76/40Manufacture or treatment of masks on semiconductor bodies, e.g. by lithography or photolithography of masks comprising inorganic materials
    • H10P76/408Manufacture or treatment of masks on semiconductor bodies, e.g. by lithography or photolithography of masks comprising inorganic materials characterised by their sizes, orientations, dispositions, behaviours or shapes
    • H10P76/4085Manufacture or treatment of masks on semiconductor bodies, e.g. by lithography or photolithography of masks comprising inorganic materials characterised by their sizes, orientations, dispositions, behaviours or shapes characterised by the processes involved to create the masks
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10PGENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P76/00Manufacture or treatment of masks on semiconductor bodies, e.g. by lithography or photolithography
    • H10P76/40Manufacture or treatment of masks on semiconductor bodies, e.g. by lithography or photolithography of masks comprising inorganic materials
    • H10P76/408Manufacture or treatment of masks on semiconductor bodies, e.g. by lithography or photolithography of masks comprising inorganic materials characterised by their sizes, orientations, dispositions, behaviours or shapes
    • H10P76/4088Processes for improving the resolution of the masks
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10TTECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T428/00Stock material or miscellaneous articles
    • Y10T428/24Structurally defined web or sheet [e.g., overall dimension, etc.]
    • Y10T428/24802Discontinuous or differential coating, impregnation or bond [e.g., artwork, printing, retouched photograph, etc.]
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10TTECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T428/00Stock material or miscellaneous articles
    • Y10T428/24Structurally defined web or sheet [e.g., overall dimension, etc.]
    • Y10T428/24802Discontinuous or differential coating, impregnation or bond [e.g., artwork, printing, retouched photograph, etc.]
    • Y10T428/24926Discontinuous or differential coating, impregnation or bond [e.g., artwork, printing, retouched photograph, etc.] including ceramic, glass, porcelain or quartz layer

Landscapes

  • Engineering & Computer Science (AREA)
  • Chemical & Material Sciences (AREA)
  • Nanotechnology (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • Drying Of Semiconductors (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Electrodes Of Semiconductors (AREA)
  • Exposure Of Semiconductors, Excluding Electron Or Ion Beam Exposure (AREA)
JP2006526058A 2003-09-12 2004-05-13 造形部分をパターン形成する方法 Expired - Fee Related JP4755592B2 (ja)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US10/661,041 2003-09-12
US10/661,041 US7030008B2 (en) 2003-09-12 2003-09-12 Techniques for patterning features in semiconductor devices
PCT/US2004/014903 WO2005036625A1 (en) 2003-09-12 2004-05-13 Techniques for patterning features in semiconductor devices

Publications (3)

Publication Number Publication Date
JP2007505492A JP2007505492A (ja) 2007-03-08
JP2007505492A5 JP2007505492A5 (https=) 2007-06-28
JP4755592B2 true JP4755592B2 (ja) 2011-08-24

Family

ID=34273788

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2006526058A Expired - Fee Related JP4755592B2 (ja) 2003-09-12 2004-05-13 造形部分をパターン形成する方法

Country Status (7)

Country Link
US (3) US7030008B2 (https=)
EP (1) EP1665347A1 (https=)
JP (1) JP4755592B2 (https=)
KR (1) KR100810203B1 (https=)
CN (1) CN1849698B (https=)
TW (1) TWI345803B (https=)
WO (1) WO2005036625A1 (https=)

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US8268543B2 (en) * 2009-03-23 2012-09-18 Micron Technology, Inc. Methods of forming patterns on substrates
US9330934B2 (en) 2009-05-18 2016-05-03 Micron Technology, Inc. Methods of forming patterns on substrates
US20110129991A1 (en) * 2009-12-02 2011-06-02 Kyle Armstrong Methods Of Patterning Materials, And Methods Of Forming Memory Cells
US8323871B2 (en) * 2010-02-24 2012-12-04 International Business Machines Corporation Antireflective hardmask composition and a method of preparing a patterned material using same
CN102222640B (zh) * 2010-04-16 2013-08-14 中芯国际集成电路制造(上海)有限公司 通孔形成方法
US20110253670A1 (en) * 2010-04-19 2011-10-20 Applied Materials, Inc. Methods for etching silicon-based antireflective layers
US8232198B2 (en) 2010-08-05 2012-07-31 International Business Machines Corporation Self-aligned permanent on-chip interconnect structure formed by pitch splitting
US8518788B2 (en) 2010-08-11 2013-08-27 Micron Technology, Inc. Methods of forming a plurality of capacitors
US8455341B2 (en) 2010-09-02 2013-06-04 Micron Technology, Inc. Methods of forming features of integrated circuitry
US9054160B2 (en) 2011-04-15 2015-06-09 International Business Machines Corporation Interconnect structure and method for fabricating on-chip interconnect structures by image reversal
US8890318B2 (en) 2011-04-15 2014-11-18 International Business Machines Corporation Middle of line structures
US8900988B2 (en) 2011-04-15 2014-12-02 International Business Machines Corporation Method for forming self-aligned airgap interconnect structures
US8575032B2 (en) 2011-05-05 2013-11-05 Micron Technology, Inc. Methods of forming a pattern on a substrate
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Also Published As

Publication number Publication date
JP2007505492A (ja) 2007-03-08
TW200523998A (en) 2005-07-16
US20050056823A1 (en) 2005-03-17
CN1849698B (zh) 2012-07-11
US7545041B2 (en) 2009-06-09
EP1665347A1 (en) 2006-06-07
US20080187731A1 (en) 2008-08-07
US7030008B2 (en) 2006-04-18
US20060118785A1 (en) 2006-06-08
CN1849698A (zh) 2006-10-18
KR20060064650A (ko) 2006-06-13
WO2005036625A1 (en) 2005-04-21
TWI345803B (en) 2011-07-21
KR100810203B1 (ko) 2008-03-07

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