TWI345803B - Techniques for patterning features in semiconductor devices - Google Patents

Techniques for patterning features in semiconductor devices Download PDF

Info

Publication number
TWI345803B
TWI345803B TW093126407A TW93126407A TWI345803B TW I345803 B TWI345803 B TW I345803B TW 093126407 A TW093126407 A TW 093126407A TW 93126407 A TW93126407 A TW 93126407A TW I345803 B TWI345803 B TW I345803B
Authority
TW
Taiwan
Prior art keywords
substrate
feature
features
reflective material
antireflective
Prior art date
Application number
TW093126407A
Other languages
English (en)
Chinese (zh)
Other versions
TW200523998A (en
Inventor
Scott D Allen
Katherina E Babich
Steven J Holmes
Arpan P Mahorowala
Dirk Pfeiffer
Richard Stephan Wise
Original Assignee
Ibm
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Ibm filed Critical Ibm
Publication of TW200523998A publication Critical patent/TW200523998A/zh
Application granted granted Critical
Publication of TWI345803B publication Critical patent/TWI345803B/zh

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P50/00—Etching of wafers, substrates or parts of devices
    • H10P50/73—Etching of wafers, substrates or parts of devices using masks for insulating materials
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B82—NANOTECHNOLOGY
    • B82Y—SPECIFIC USES OR APPLICATIONS OF NANOSTRUCTURES; MEASUREMENT OR ANALYSIS OF NANOSTRUCTURES; MANUFACTURE OR TREATMENT OF NANOSTRUCTURES
    • B82Y40/00—Manufacture or treatment of nanostructures
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P50/00—Etching of wafers, substrates or parts of devices
    • H10P50/20—Dry etching; Plasma etching; Reactive-ion etching
    • H10P50/28—Dry etching; Plasma etching; Reactive-ion etching of insulating materials
    • H10P50/282—Dry etching; Plasma etching; Reactive-ion etching of insulating materials of inorganic materials
    • H10P50/283—Dry etching; Plasma etching; Reactive-ion etching of insulating materials of inorganic materials by chemical means
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P76/00—Manufacture or treatment of masks on semiconductor bodies, e.g. by lithography or photolithography
    • H10P76/20—Manufacture or treatment of masks on semiconductor bodies, e.g. by lithography or photolithography of masks comprising organic materials
    • H10P76/204—Manufacture or treatment of masks on semiconductor bodies, e.g. by lithography or photolithography of masks comprising organic materials of organic photoresist masks
    • H10P76/2041—Photolithographic processes
    • H10P76/2043—Photolithographic processes using an anti-reflective coating
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P76/00—Manufacture or treatment of masks on semiconductor bodies, e.g. by lithography or photolithography
    • H10P76/40—Manufacture or treatment of masks on semiconductor bodies, e.g. by lithography or photolithography of masks comprising inorganic materials
    • H10P76/408—Manufacture or treatment of masks on semiconductor bodies, e.g. by lithography or photolithography of masks comprising inorganic materials characterised by their sizes, orientations, dispositions, behaviours or shapes
    • H10P76/4085—Manufacture or treatment of masks on semiconductor bodies, e.g. by lithography or photolithography of masks comprising inorganic materials characterised by their sizes, orientations, dispositions, behaviours or shapes characterised by the processes involved to create the masks
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P76/00—Manufacture or treatment of masks on semiconductor bodies, e.g. by lithography or photolithography
    • H10P76/40—Manufacture or treatment of masks on semiconductor bodies, e.g. by lithography or photolithography of masks comprising inorganic materials
    • H10P76/408—Manufacture or treatment of masks on semiconductor bodies, e.g. by lithography or photolithography of masks comprising inorganic materials characterised by their sizes, orientations, dispositions, behaviours or shapes
    • H10P76/4088—Processes for improving the resolution of the masks
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T428/00—Stock material or miscellaneous articles
    • Y10T428/24—Structurally defined web or sheet [e.g., overall dimension, etc.]
    • Y10T428/24802—Discontinuous or differential coating, impregnation or bond [e.g., artwork, printing, retouched photograph, etc.]
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T428/00—Stock material or miscellaneous articles
    • Y10T428/24—Structurally defined web or sheet [e.g., overall dimension, etc.]
    • Y10T428/24802—Discontinuous or differential coating, impregnation or bond [e.g., artwork, printing, retouched photograph, etc.]
    • Y10T428/24926—Discontinuous or differential coating, impregnation or bond [e.g., artwork, printing, retouched photograph, etc.] including ceramic, glass, porcelain or quartz layer

Landscapes

  • Engineering & Computer Science (AREA)
  • Chemical & Material Sciences (AREA)
  • Nanotechnology (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • Drying Of Semiconductors (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Electrodes Of Semiconductors (AREA)
  • Exposure Of Semiconductors, Excluding Electron Or Ion Beam Exposure (AREA)
TW093126407A 2003-09-12 2004-09-01 Techniques for patterning features in semiconductor devices TWI345803B (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US10/661,041 US7030008B2 (en) 2003-09-12 2003-09-12 Techniques for patterning features in semiconductor devices

Publications (2)

Publication Number Publication Date
TW200523998A TW200523998A (en) 2005-07-16
TWI345803B true TWI345803B (en) 2011-07-21

Family

ID=34273788

Family Applications (1)

Application Number Title Priority Date Filing Date
TW093126407A TWI345803B (en) 2003-09-12 2004-09-01 Techniques for patterning features in semiconductor devices

Country Status (7)

Country Link
US (3) US7030008B2 (https=)
EP (1) EP1665347A1 (https=)
JP (1) JP4755592B2 (https=)
KR (1) KR100810203B1 (https=)
CN (1) CN1849698B (https=)
TW (1) TWI345803B (https=)
WO (1) WO2005036625A1 (https=)

Families Citing this family (44)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6462371B1 (en) * 1998-11-24 2002-10-08 Micron Technology Inc. Films doped with carbon for use in integrated circuit technology
US20040013971A1 (en) * 2001-11-21 2004-01-22 Berger Larry L Antireflective layer for use in microlithography
KR100615583B1 (ko) * 2004-08-11 2006-08-25 삼성전자주식회사 노드 절연막 패턴에 구속된 상전이막 패턴을 갖는 피이.램의 형성방법들
DE102004052611A1 (de) 2004-10-29 2006-05-04 Infineon Technologies Ag Verfahren zur Herstellung einer mit einem Füllmaterial mindestens teilweise gefüllten Öffnung, Verfahren zur Herstellung einer Speicherzelle und Speicherzelle
US7361588B2 (en) * 2005-04-04 2008-04-22 Advanced Micro Devices, Inc. Etch process for CD reduction of arc material
US8852851B2 (en) 2006-07-10 2014-10-07 Micron Technology, Inc. Pitch reduction technology using alternating spacer depositions during the formation of a semiconductor device and systems including same
US7863150B2 (en) * 2006-09-11 2011-01-04 International Business Machines Corporation Method to generate airgaps with a template first scheme and a self aligned blockout mask
US8026180B2 (en) * 2007-07-12 2011-09-27 Micron Technology, Inc. Methods of modifying oxide spacers
US7888267B2 (en) 2008-02-01 2011-02-15 Tokyo Electron Limited Method for etching silicon-containing ARC layer with reduced CD bias
US7989307B2 (en) 2008-05-05 2011-08-02 Micron Technology, Inc. Methods of forming isolated active areas, trenches, and conductive lines in semiconductor structures and semiconductor structures including the same
US10151981B2 (en) 2008-05-22 2018-12-11 Micron Technology, Inc. Methods of forming structures supported by semiconductor substrates
US8409457B2 (en) * 2008-08-29 2013-04-02 Micron Technology, Inc. Methods of forming a photoresist-comprising pattern on a substrate
US8039399B2 (en) * 2008-10-09 2011-10-18 Micron Technology, Inc. Methods of forming patterns utilizing lithography and spacers
US8247302B2 (en) 2008-12-04 2012-08-21 Micron Technology, Inc. Methods of fabricating substrates
US8796155B2 (en) 2008-12-04 2014-08-05 Micron Technology, Inc. Methods of fabricating substrates
US8273634B2 (en) * 2008-12-04 2012-09-25 Micron Technology, Inc. Methods of fabricating substrates
KR20110110240A (ko) * 2008-12-30 2011-10-06 쓰리엠 이노베이티브 프로퍼티즈 컴파니 반사방지 용품 및 이의 제조 방법
CN102325719A (zh) * 2008-12-30 2012-01-18 3M创新有限公司 纳米结构化制品和制备纳米结构化制品的方法
WO2010078306A2 (en) 2008-12-30 2010-07-08 3M Innovative Properties Company Method for making nanostructured surfaces
US8268543B2 (en) * 2009-03-23 2012-09-18 Micron Technology, Inc. Methods of forming patterns on substrates
US9330934B2 (en) 2009-05-18 2016-05-03 Micron Technology, Inc. Methods of forming patterns on substrates
US20110129991A1 (en) * 2009-12-02 2011-06-02 Kyle Armstrong Methods Of Patterning Materials, And Methods Of Forming Memory Cells
US8323871B2 (en) * 2010-02-24 2012-12-04 International Business Machines Corporation Antireflective hardmask composition and a method of preparing a patterned material using same
CN102222640B (zh) * 2010-04-16 2013-08-14 中芯国际集成电路制造(上海)有限公司 通孔形成方法
US20110253670A1 (en) * 2010-04-19 2011-10-20 Applied Materials, Inc. Methods for etching silicon-based antireflective layers
US8232198B2 (en) 2010-08-05 2012-07-31 International Business Machines Corporation Self-aligned permanent on-chip interconnect structure formed by pitch splitting
US8518788B2 (en) 2010-08-11 2013-08-27 Micron Technology, Inc. Methods of forming a plurality of capacitors
US8455341B2 (en) 2010-09-02 2013-06-04 Micron Technology, Inc. Methods of forming features of integrated circuitry
US9054160B2 (en) 2011-04-15 2015-06-09 International Business Machines Corporation Interconnect structure and method for fabricating on-chip interconnect structures by image reversal
US8890318B2 (en) 2011-04-15 2014-11-18 International Business Machines Corporation Middle of line structures
US8900988B2 (en) 2011-04-15 2014-12-02 International Business Machines Corporation Method for forming self-aligned airgap interconnect structures
US8575032B2 (en) 2011-05-05 2013-11-05 Micron Technology, Inc. Methods of forming a pattern on a substrate
US8822137B2 (en) 2011-08-03 2014-09-02 International Business Machines Corporation Self-aligned fine pitch permanent on-chip interconnect structures and method of fabrication
US20130062732A1 (en) 2011-09-08 2013-03-14 International Business Machines Corporation Interconnect structures with functional components and methods for fabrication
US9076680B2 (en) 2011-10-18 2015-07-07 Micron Technology, Inc. Integrated circuitry, methods of forming capacitors, and methods of forming integrated circuitry comprising an array of capacitors and circuitry peripheral to the array
US9177794B2 (en) 2012-01-13 2015-11-03 Micron Technology, Inc. Methods of patterning substrates
US9087753B2 (en) 2012-05-10 2015-07-21 International Business Machines Corporation Printed transistor and fabrication method
US8629048B1 (en) 2012-07-06 2014-01-14 Micron Technology, Inc. Methods of forming a pattern on a substrate
US9159581B2 (en) 2012-11-27 2015-10-13 Taiwan Semiconductor Manufacturing Company, Ltd. Method of making a semiconductor device using a bottom antireflective coating (BARC) layer
US9153455B2 (en) * 2013-06-19 2015-10-06 Micron Technology, Inc. Methods of forming semiconductor device structures, memory cells, and arrays
US9917027B2 (en) * 2015-12-30 2018-03-13 Globalfoundries Singapore Pte. Ltd. Integrated circuits with aluminum via structures and methods for fabricating the same
US10157773B1 (en) * 2017-11-28 2018-12-18 Taiwan Semiconductor Manufacturing Co., Ltd. Semiconductor structure having layer with re-entrant profile and method of forming the same
US10867842B2 (en) * 2018-10-31 2020-12-15 Taiwan Semiconductor Manufacturing Company, Ltd. Method for shrinking openings in forming integrated circuits
US11398377B2 (en) * 2020-01-14 2022-07-26 International Business Machines Corporation Bilayer hardmask for direct print lithography

Family Cites Families (23)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4814406A (en) 1986-02-28 1989-03-21 Katayama Chemical Works Ltd. Scale inhibitor
DE3686721D1 (de) * 1986-10-08 1992-10-15 Ibm Verfahren zur herstellung einer kontaktoeffnung mit gewuenschter schraege in einer zusammengesetzten schicht, die mit photoresist maskiert ist.
JP3002033B2 (ja) * 1991-09-27 2000-01-24 株式会社東芝 ドライエッチング方法
JPH0941161A (ja) * 1995-07-26 1997-02-10 Dainippon Printing Co Ltd エッチングを用いた加工方法
KR100256137B1 (ko) 1996-03-26 2000-05-15 아사무라 타카싯 반도체장치및그제조방법
US5753418A (en) * 1996-09-03 1998-05-19 Taiwan Semiconductor Manufacturing Company Ltd 0.3 Micron aperture width patterning process
US5854503A (en) * 1996-11-19 1998-12-29 Integrated Device Technology, Inc. Maximization of low dielectric constant material between interconnect traces of a semiconductor circuit
KR100280622B1 (ko) * 1998-04-02 2001-03-02 윤종용 반도체 장치의 콘택 형성 방법
US6009888A (en) * 1998-05-07 2000-01-04 Chartered Semiconductor Manufacturing Company, Ltd. Photoresist and polymer removal by UV laser aqueous oxidant
US6316167B1 (en) * 2000-01-10 2001-11-13 International Business Machines Corporation Tunabale vapor deposited materials as antireflective coatings, hardmasks and as combined antireflective coating/hardmasks and methods of fabrication thereof and application thereof
DE19844102C2 (de) * 1998-09-25 2000-07-20 Siemens Ag Herstellverfahren für eine Halbleiterstruktur
JP2000164701A (ja) * 1998-11-25 2000-06-16 Mitsubishi Electric Corp 半導体装置の製造方法
US6159863A (en) * 1999-01-22 2000-12-12 Advanced Micro Devices, Inc. Insitu hardmask and metal etch in a single etcher
US6514867B1 (en) * 2001-03-26 2003-02-04 Advanced Micro Devices, Inc. Method of creating narrow trench lines using hard mask
US6828259B2 (en) * 2001-03-28 2004-12-07 Advanced Micro Devices, Inc. Enhanced transistor gate using E-beam radiation
US6387798B1 (en) * 2001-06-25 2002-05-14 Institute Of Microelectronics Method of etching trenches for metallization of integrated circuit devices with a narrower width than the design mask profile
KR100415088B1 (ko) * 2001-10-15 2004-01-13 주식회사 하이닉스반도체 반도체장치의 제조방법
JP2003209037A (ja) * 2002-01-11 2003-07-25 Sony Corp アライメントマーク及び半導体装置の製造方法
TW550695B (en) 2002-02-26 2003-09-01 Taiwan Semiconductor Mfg Method to remove bottom anti-reflection coating layer
US6743712B2 (en) * 2002-07-12 2004-06-01 Intel Corporation Method of making a semiconductor device by forming a masking layer with a tapered etch profile
US6853043B2 (en) * 2002-11-04 2005-02-08 Applied Materials, Inc. Nitrogen-free antireflective coating for use with photolithographic patterning
US6774032B1 (en) * 2003-05-30 2004-08-10 Intel Corporation Method of making a semiconductor device by forming a masking layer with a tapered etch profile
US6765254B1 (en) * 2003-06-12 2004-07-20 Advanced Micro Devices, Inc. Structure and method for preventing UV radiation damage and increasing data retention in memory cells

Also Published As

Publication number Publication date
JP2007505492A (ja) 2007-03-08
TW200523998A (en) 2005-07-16
US20050056823A1 (en) 2005-03-17
CN1849698B (zh) 2012-07-11
US7545041B2 (en) 2009-06-09
EP1665347A1 (en) 2006-06-07
US20080187731A1 (en) 2008-08-07
US7030008B2 (en) 2006-04-18
US20060118785A1 (en) 2006-06-08
CN1849698A (zh) 2006-10-18
KR20060064650A (ko) 2006-06-13
WO2005036625A1 (en) 2005-04-21
JP4755592B2 (ja) 2011-08-24
KR100810203B1 (ko) 2008-03-07

Similar Documents

Publication Publication Date Title
TWI345803B (en) Techniques for patterning features in semiconductor devices
US11037786B2 (en) Patterning material film stack with metal-containing top coat for enhanced sensitivity in extreme ultraviolet (EUV) lithography
US11031246B2 (en) EUV pattern transfer with ion implantation and reduced impact of resist residue
US7371684B2 (en) Process for preparing electronics structures using a sacrificial multilayer hardmask scheme
US6686295B2 (en) Anisotropic etch method
US6576562B2 (en) Manufacturing method of semiconductor device using mask pattern having high etching resistance
KR20210018548A (ko) Euv 레지스트 및 하드 마스크 선택도를 개선하기 위한 패터닝 방식
WO2000072370A1 (en) Method for etching silicon oxynitride and dielectric antireflection coatings
JP3504247B2 (ja) 半導体装置の製造方法
WO2019241012A1 (en) Conformal carbon film deposition
JP2002543586A (ja) 反射防止コーティング及びそれに関連する方法
TWI384529B (zh) 用於ａｒｃ材料之ｃｄ縮小之蝕刻製程
CN100517576C (zh) 半导体器件的制造方法
US7442649B2 (en) Etch with photoresist mask
KR20150123194A (ko) 산화텅스텐 또는 텅스텐을 포함하는 하드 마스크를 식각 마스크로 이용하는 반도체 소자의 제조방법
JPH07161689A (ja) ドライエッチング方法
TW201005793A (en) Patterning method
KR101776265B1 (ko) 하드마스크 층의 형성 방법, 반도체 소자의 제조방법, 및 이에 따른 반도체 소자
JP2004235297A (ja) 半導体装置の製造方法
CN115023795A (zh) 合金膜蚀刻
JPH0794476A (ja) ドライエッチング方法
KR20050104079A (ko) 반도체소자의 캐패시터 형성 방법
TW200946647A (en) Etching gas for removing organic layers

Legal Events

Date Code Title Description
MM4A Annulment or lapse of patent due to non-payment of fees