JP4699498B2 - メモリチップにアクセスする方法 - Google Patents

メモリチップにアクセスする方法 Download PDF

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Publication number
JP4699498B2
JP4699498B2 JP2008179303A JP2008179303A JP4699498B2 JP 4699498 B2 JP4699498 B2 JP 4699498B2 JP 2008179303 A JP2008179303 A JP 2008179303A JP 2008179303 A JP2008179303 A JP 2008179303A JP 4699498 B2 JP4699498 B2 JP 4699498B2
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Japan
Prior art keywords
input
memory chip
command
memory
column
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JP2008179303A
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Japanese (ja)
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JP2009176398A (ja
Inventor
志暉 葉
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南亞科技股▲ふん▼有限公司
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Publication of JP2009176398A publication Critical patent/JP2009176398A/ja
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    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C5/00—Details of stores covered by group G11C11/00
    • G11C5/02—Disposition of storage elements, e.g. in the form of a matrix array
    • G11C5/04—Supports for storage elements, e.g. memory modules; Mounting or fixing of storage elements on such supports
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G11C29/04—Detection or location of defective memory elements, e.g. cell constructio details, timing of test signals
    • G11C29/08—Functional testing, e.g. testing during refresh, power-on self testing [POST] or distributed testing
    • G11C29/12—Built-in arrangements for testing, e.g. built-in self testing [BIST] or interconnection details
    • G11C29/1201—Built-in arrangements for testing, e.g. built-in self testing [BIST] or interconnection details comprising I/O circuitry

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  • Dram (AREA)
  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • For Increasing The Reliability Of Semiconductor Memories (AREA)
  • Computer Hardware Design (AREA)
JP2008179303A 2008-01-21 2008-07-09 メモリチップにアクセスする方法 Active JP4699498B2 (ja)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
TW097102177 2008-01-21
TW97102177A TW200933645A (en) 2008-01-21 2008-01-21 Method for accessing memory chip

Publications (2)

Publication Number Publication Date
JP2009176398A JP2009176398A (ja) 2009-08-06
JP4699498B2 true JP4699498B2 (ja) 2011-06-08

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ID=40794580

Family Applications (1)

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JP2008179303A Active JP4699498B2 (ja) 2008-01-21 2008-07-09 メモリチップにアクセスする方法

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JP (1) JP4699498B2 (zh)
KR (1) KR100951605B1 (zh)
DE (1) DE102008034346B4 (zh)
TW (1) TW200933645A (zh)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR102542584B1 (ko) * 2016-03-11 2023-06-14 에스케이하이닉스 주식회사 반도체 메모리의 입력 장치 및 이를 포함하는 반도체 메모리 장치

Citations (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH01144664A (ja) * 1988-03-01 1989-06-06 Mitsubishi Electric Corp 半導体メモリ用集積回路装置
JPH05274877A (ja) * 1992-03-25 1993-10-22 Mitsubishi Electric Corp 半導体記憶装置
JPH09213092A (ja) * 1996-02-08 1997-08-15 Hitachi Ltd 半導体集積回路装置
JPH10340224A (ja) * 1997-05-21 1998-12-22 Internatl Business Mach Corp <Ibm> Ｓｄｒａｍを使用した高性能高帯域幅メモリおよびシステム
JPH11203859A (ja) * 1998-01-06 1999-07-30 Fujitsu Ltd クロック同期型メモリ装置及びそのスケジューラ回路
JPH11317080A (ja) * 1998-03-04 1999-11-16 Matsushita Electric Ind Co Ltd 半導体集積回路
JP2001195882A (ja) * 1999-11-30 2001-07-19 Hyundai Electronics Ind Co Ltd ラムバスｄｒａｍのクロック制御回路
JP2006294074A (ja) * 2005-03-14 2006-10-26 Fujitsu Ltd 半導体記憶装置
JP2007183959A (ja) * 2006-01-04 2007-07-19 Samsung Electronics Co Ltd 改善されたアディティブレイテンシを有したメモリシステム及び制御方法

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5805520A (en) 1997-04-25 1998-09-08 Hewlett-Packard Company Integrated circuit address reconfigurability
US6236251B1 (en) * 1998-03-04 2001-05-22 Matsushita Electric Industrial Co., Ltd. Semiconductor integrated circuit with multiple selectively activated synchronization circuits

Patent Citations (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH01144664A (ja) * 1988-03-01 1989-06-06 Mitsubishi Electric Corp 半導体メモリ用集積回路装置
JPH05274877A (ja) * 1992-03-25 1993-10-22 Mitsubishi Electric Corp 半導体記憶装置
JPH09213092A (ja) * 1996-02-08 1997-08-15 Hitachi Ltd 半導体集積回路装置
JPH10340224A (ja) * 1997-05-21 1998-12-22 Internatl Business Mach Corp <Ibm> Ｓｄｒａｍを使用した高性能高帯域幅メモリおよびシステム
JPH11203859A (ja) * 1998-01-06 1999-07-30 Fujitsu Ltd クロック同期型メモリ装置及びそのスケジューラ回路
JPH11317080A (ja) * 1998-03-04 1999-11-16 Matsushita Electric Ind Co Ltd 半導体集積回路
JP2001195882A (ja) * 1999-11-30 2001-07-19 Hyundai Electronics Ind Co Ltd ラムバスｄｒａｍのクロック制御回路
JP2006294074A (ja) * 2005-03-14 2006-10-26 Fujitsu Ltd 半導体記憶装置
JP2007183959A (ja) * 2006-01-04 2007-07-19 Samsung Electronics Co Ltd 改善されたアディティブレイテンシを有したメモリシステム及び制御方法

Also Published As

Publication number Publication date
DE102008034346A1 (de) 2009-07-30
DE102008034346B4 (de) 2014-10-16
KR100951605B1 (ko) 2010-04-09
TW200933645A (en) 2009-08-01
KR20090080463A (ko) 2009-07-24
JP2009176398A (ja) 2009-08-06

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