JP4662418B2 - リードフレーム - Google Patents
リードフレーム Download PDFInfo
- Publication number
- JP4662418B2 JP4662418B2 JP2004041446A JP2004041446A JP4662418B2 JP 4662418 B2 JP4662418 B2 JP 4662418B2 JP 2004041446 A JP2004041446 A JP 2004041446A JP 2004041446 A JP2004041446 A JP 2004041446A JP 4662418 B2 JP4662418 B2 JP 4662418B2
- Authority
- JP
- Japan
- Prior art keywords
- lead frame
- plating
- resin
- surface area
- specific surface
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
Images
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
- H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/85—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a wire connector
- H01L2224/8538—Bonding interfaces outside the semiconductor or solid-state body
- H01L2224/85385—Shape, e.g. interlocking features
Landscapes
- Other Surface Treatments For Metallic Materials (AREA)
- Lead Frames For Integrated Circuits (AREA)
Description
30c…パラジウムめっき、30d…金めっき。
Claims (1)
- 銅からなる基材(30a)の上にニッケルめっき(30b)、パラジウムめっき(30c)、金めっき(30d)を順次施してなるリードフレームにおいて、
比表面積が1.3以上、1.5以下であり、
当該リードフレームの表面は、三角錐の突起が上方に向かっている形状であることを特徴とするリードフレーム。
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2004041446A JP4662418B2 (ja) | 2004-02-18 | 2004-02-18 | リードフレーム |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2004041446A JP4662418B2 (ja) | 2004-02-18 | 2004-02-18 | リードフレーム |
Publications (2)
Publication Number | Publication Date |
---|---|
JP2005235926A JP2005235926A (ja) | 2005-09-02 |
JP4662418B2 true JP4662418B2 (ja) | 2011-03-30 |
Family
ID=35018578
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2004041446A Expired - Fee Related JP4662418B2 (ja) | 2004-02-18 | 2004-02-18 | リードフレーム |
Country Status (1)
Country | Link |
---|---|
JP (1) | JP4662418B2 (ja) |
Families Citing this family (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2007088211A (ja) * | 2005-09-22 | 2007-04-05 | Toppan Printing Co Ltd | リードフレーム及びその製造方法 |
JP4556895B2 (ja) * | 2006-03-27 | 2010-10-06 | 株式会社デンソー | 樹脂封止型半導体装置 |
JP2007287765A (ja) * | 2006-04-13 | 2007-11-01 | Denso Corp | 樹脂封止型半導体装置 |
JP4789771B2 (ja) * | 2006-10-13 | 2011-10-12 | パナソニック株式会社 | 樹脂外囲器付きリードフレームとその製造方法 |
JP2008187045A (ja) * | 2007-01-30 | 2008-08-14 | Matsushita Electric Ind Co Ltd | 半導体装置用リードフレームとその製造方法、半導体装置 |
JP5210907B2 (ja) * | 2009-02-03 | 2013-06-12 | アルプス電気株式会社 | 電気接点の製造方法 |
JP5846409B2 (ja) * | 2011-05-26 | 2016-01-20 | 日産自動車株式会社 | 固体高分子形燃料電池用の導電性構造体及び固体高分子形燃料電池 |
-
2004
- 2004-02-18 JP JP2004041446A patent/JP4662418B2/ja not_active Expired - Fee Related
Also Published As
Publication number | Publication date |
---|---|
JP2005235926A (ja) | 2005-09-02 |
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