JP4660102B2 - 不揮発性メモリ装置の製造方法 - Google Patents
不揮発性メモリ装置の製造方法 Download PDFInfo
- Publication number
- JP4660102B2 JP4660102B2 JP2004055192A JP2004055192A JP4660102B2 JP 4660102 B2 JP4660102 B2 JP 4660102B2 JP 2004055192 A JP2004055192 A JP 2004055192A JP 2004055192 A JP2004055192 A JP 2004055192A JP 4660102 B2 JP4660102 B2 JP 4660102B2
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- JP
- Japan
- Prior art keywords
- conductive pattern
- insulating film
- memory device
- conductive
- floating gate
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
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- 238000000034 method Methods 0.000 title claims description 94
- 238000004519 manufacturing process Methods 0.000 title claims description 41
- 239000000758 substrate Substances 0.000 claims description 35
- 238000005530 etching Methods 0.000 claims description 24
- 230000001590 oxidative effect Effects 0.000 claims description 17
- 238000001312 dry etching Methods 0.000 claims description 8
- 230000015572 biosynthetic process Effects 0.000 claims description 4
- 238000005468 ion implantation Methods 0.000 claims description 4
- 239000010410 layer Substances 0.000 description 48
- 239000004065 semiconductor Substances 0.000 description 34
- 229910021420 polycrystalline silicon Inorganic materials 0.000 description 18
- 229920005591 polysilicon Polymers 0.000 description 18
- 150000004767 nitrides Chemical class 0.000 description 16
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 14
- 230000003647 oxidation Effects 0.000 description 14
- 238000007254 oxidation reaction Methods 0.000 description 14
- 229910052710 silicon Inorganic materials 0.000 description 14
- 239000010703 silicon Substances 0.000 description 14
- 238000000206 photolithography Methods 0.000 description 8
- 229910021417 amorphous silicon Inorganic materials 0.000 description 7
- 238000002347 injection Methods 0.000 description 7
- 239000007924 injection Substances 0.000 description 7
- 238000005229 chemical vapour deposition Methods 0.000 description 6
- 229910052751 metal Inorganic materials 0.000 description 6
- 239000002184 metal Substances 0.000 description 6
- 229920002120 photoresistant polymer Polymers 0.000 description 5
- 238000005240 physical vapour deposition Methods 0.000 description 5
- 230000027756 respiratory electron transport chain Effects 0.000 description 5
- NBIIXXVUZAFLBC-UHFFFAOYSA-N Phosphoric acid Chemical compound OP(O)(O)=O NBIIXXVUZAFLBC-UHFFFAOYSA-N 0.000 description 4
- 238000001020 plasma etching Methods 0.000 description 4
- 238000004544 sputter deposition Methods 0.000 description 4
- -1 amorphous silicon Chemical compound 0.000 description 3
- 239000012535 impurity Substances 0.000 description 3
- 230000010354 integration Effects 0.000 description 3
- 238000004518 low pressure chemical vapour deposition Methods 0.000 description 3
- 229910052814 silicon oxide Inorganic materials 0.000 description 3
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 2
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 2
- RTAQQCXQSZGOHL-UHFFFAOYSA-N Titanium Chemical compound [Ti] RTAQQCXQSZGOHL-UHFFFAOYSA-N 0.000 description 2
- 229910052782 aluminium Inorganic materials 0.000 description 2
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 2
- 229910000147 aluminium phosphate Inorganic materials 0.000 description 2
- 229910052802 copper Inorganic materials 0.000 description 2
- 239000010949 copper Substances 0.000 description 2
- 238000013500 data storage Methods 0.000 description 2
- 239000011229 interlayer Substances 0.000 description 2
- 125000006850 spacer group Chemical group 0.000 description 2
- 239000010936 titanium Substances 0.000 description 2
- 229910052719 titanium Inorganic materials 0.000 description 2
- 230000005641 tunneling Effects 0.000 description 2
- 229910004205 SiNX Inorganic materials 0.000 description 1
- 230000003064 anti-oxidating effect Effects 0.000 description 1
- 239000003990 capacitor Substances 0.000 description 1
- 239000004020 conductor Substances 0.000 description 1
- 238000009792 diffusion process Methods 0.000 description 1
- 238000009826 distribution Methods 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 230000006870 function Effects 0.000 description 1
- 238000011065 in-situ storage Methods 0.000 description 1
- 150000002500 ions Chemical class 0.000 description 1
- 238000010030 laminating Methods 0.000 description 1
- 238000001459 lithography Methods 0.000 description 1
- 239000000463 material Substances 0.000 description 1
- 230000007334 memory performance Effects 0.000 description 1
- 238000000059 patterning Methods 0.000 description 1
- 238000000623 plasma-assisted chemical vapour deposition Methods 0.000 description 1
- 230000002265 prevention Effects 0.000 description 1
- 229910021332 silicide Inorganic materials 0.000 description 1
- FVBUAEGBCNSCDD-UHFFFAOYSA-N silicide(4-) Chemical compound [Si-4] FVBUAEGBCNSCDD-UHFFFAOYSA-N 0.000 description 1
Images
Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B69/00—Erasable-and-programmable ROM [EPROM] devices not provided for in groups H10B41/00 - H10B63/00, e.g. ultraviolet erasable-and-programmable ROM [UVEPROM] devices
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/66007—Multistep manufacturing processes
- H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
- H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
- H01L29/66409—Unipolar field-effect transistors
- H01L29/66477—Unipolar field-effect transistors with an insulated gate, i.e. MISFET
- H01L29/66825—Unipolar field-effect transistors with an insulated gate, i.e. MISFET with a floating gate
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/40—Electrodes ; Multistep manufacturing processes therefor
- H01L29/401—Multistep manufacturing processes
- H01L29/4011—Multistep manufacturing processes for data storage electrodes
- H01L29/40114—Multistep manufacturing processes for data storage electrodes the electrodes comprising a conductor-insulator-conductor-insulator-semiconductor structure
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B41/00—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates
- H10B41/30—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates characterised by the memory core region
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Manufacturing & Machinery (AREA)
- Physics & Mathematics (AREA)
- Ceramic Engineering (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Non-Volatile Memory (AREA)
- Semiconductor Memories (AREA)
Description
200 第1導電層
220 第2絶縁膜
201 第1導電性パターン
240 第1酸化膜
300 第2導電層
320 第2導電性パターン
400 ソース領域
420 ドレーン領域
Claims (3)
- 基板上に第1絶縁膜及び第1導電層を形成する段階と、
前記第1導電層が第1方向にパターニングされるように前記第1導電層をエッチングする段階と、
前記エッチングされた第1導電層上に第2絶縁層を形成する段階と、
前記第1絶縁層及び前記エッチングされた第1導電層が第2方向にパターニングされるように前記第1絶縁層及び前記エッチングされた第1導電層をエッチングして第1導電性パターンを形成する段階と、
前記第1導電性パターンの側壁を酸化させて第1酸化膜を形成する段階と、
前記基板上及び前記第1導電性パターンと前記第2絶縁層上に前記第2導電層を形成する段階と、
前記第2導電層をエッチングして第2導電性パターンを形成する段階と、
前記第1導電性パターン周囲の基板にソース領域を形成する段階と、
前記第1導電性パターンの上部から前記第2絶縁層をエッチングする段階と、
前記第1導電性パターンの上部を酸化させて第2酸化膜を形成する段階と、
前記第2導電性パターン周囲の基板にドレーン領域を形成する段階と、を順次遂行する工程を含む
ことを特徴とする不揮発性メモリ装置の製造方法。 - 前記第2導電性パターンの形成が乾式エッチング工程を含む
ことを特徴とする請求項1に記載の不揮発性メモリ装置の製造方法。 - 前記ソース領域及びドレーン領域の形成がイオン注入工程を含む
ことを特徴とする請求項2に記載の不揮発性メモリ装置の製造方法。
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR10-2003-0012764A KR100511032B1 (ko) | 2003-02-28 | 2003-02-28 | 플로팅 게이트의 형성 방법 및 이를 이용한 불휘발성메모리 장치의 제조 방법 |
Publications (2)
Publication Number | Publication Date |
---|---|
JP2004266279A JP2004266279A (ja) | 2004-09-24 |
JP4660102B2 true JP4660102B2 (ja) | 2011-03-30 |
Family
ID=32906576
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2004055192A Expired - Fee Related JP4660102B2 (ja) | 2003-02-28 | 2004-02-27 | 不揮発性メモリ装置の製造方法 |
Country Status (3)
Country | Link |
---|---|
US (1) | US7118969B2 (ja) |
JP (1) | JP4660102B2 (ja) |
KR (1) | KR100511032B1 (ja) |
Families Citing this family (9)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR100646085B1 (ko) | 2005-03-08 | 2006-11-14 | 매그나칩 반도체 유한회사 | 비휘발성 메모리 소자, 그 제조방법, 및 이를 이용한 반도체 소자의 제조방법 |
US7586145B2 (en) * | 2005-07-27 | 2009-09-08 | Taiwan Semiconductor Manufacturing Co. Ltd | EEPROM flash memory device with jagged edge floating gate |
KR100731115B1 (ko) * | 2005-11-04 | 2007-06-22 | 동부일렉트로닉스 주식회사 | 플래시 메모리 소자 및 그 제조 방법 |
KR100660283B1 (ko) * | 2005-12-28 | 2006-12-20 | 동부일렉트로닉스 주식회사 | 스플리트 게이트형 비휘발성 기억 장치 및 그 제조방법 |
KR100757324B1 (ko) * | 2006-10-10 | 2007-09-11 | 삼성전자주식회사 | 불휘발성 메모리 장치의 제조 방법 |
US7943452B2 (en) * | 2006-12-12 | 2011-05-17 | International Business Machines Corporation | Gate conductor structure |
KR100854504B1 (ko) * | 2007-03-12 | 2008-08-26 | 삼성전자주식회사 | 플래쉬 메모리 소자의 제조방법 및 그에 의해 제조된플래쉬 메모리 소자 |
US9515251B2 (en) | 2014-04-09 | 2016-12-06 | International Business Machines Corporation | Structure for thermally assisted MRAM |
US9634018B2 (en) * | 2015-03-17 | 2017-04-25 | Silicon Storage Technology, Inc. | Split gate non-volatile memory cell with 3D finFET structure, and method of making same |
Citations (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH06506798A (ja) * | 1991-04-09 | 1994-07-28 | シリコン・ストーリッジ・テクノロジー・インク | 電気的可変不揮発性単一トランジスタ半導体記憶装置及び方法 |
JPH07221210A (ja) * | 1993-12-10 | 1995-08-18 | Advanced Micro Devices Inc | 不揮発性メモリを製造するための方法および不揮発性メモリアレイ |
JPH10178111A (ja) * | 1996-12-16 | 1998-06-30 | Taiwan Moshii Denshi Kofun Yugenkoshi | スプリットゲートフラッシュメモリの構造及び製造方法 |
JPH1126616A (ja) * | 1997-07-07 | 1999-01-29 | Nec Corp | スプリットゲート型フラッシュメモリセルおよびその製造方法 |
JPH11284083A (ja) * | 1998-03-27 | 1999-10-15 | Sanyo Electric Co Ltd | 不揮発性半導体記憶装置とその製造方法 |
Family Cites Families (8)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5242848A (en) * | 1990-01-22 | 1993-09-07 | Silicon Storage Technology, Inc. | Self-aligned method of making a split gate single transistor non-volatile electrically alterable semiconductor memory device |
US5029130A (en) | 1990-01-22 | 1991-07-02 | Silicon Storage Technology, Inc. | Single transistor non-valatile electrically alterable semiconductor memory device |
US5480819A (en) * | 1994-07-15 | 1996-01-02 | United Microelectronics Corporation | Method of manufacture of high coupling ratio flash memory cell |
US5783473A (en) | 1997-01-06 | 1998-07-21 | Mosel Vitelic, Inc. | Structure and manufacturing process of a split gate flash memory unit |
JPH118324A (ja) * | 1997-04-23 | 1999-01-12 | Sanyo Electric Co Ltd | トランジスタ、トランジスタアレイおよび不揮発性半導体メモリ |
JPH1167936A (ja) | 1997-08-08 | 1999-03-09 | Seiko Epson Corp | 半導体記憶装置の製造方法 |
US6259131B1 (en) * | 1998-05-27 | 2001-07-10 | Taiwan Semiconductor Manufacturing Company | Poly tip and self aligned source for split-gate flash cell |
KR100360495B1 (ko) | 2000-03-16 | 2002-11-13 | 삼성전자 주식회사 | 스플릿 게이트형 플래쉬 메모리 |
-
2003
- 2003-02-28 KR KR10-2003-0012764A patent/KR100511032B1/ko not_active IP Right Cessation
-
2004
- 2004-02-27 US US10/787,968 patent/US7118969B2/en not_active Expired - Fee Related
- 2004-02-27 JP JP2004055192A patent/JP4660102B2/ja not_active Expired - Fee Related
Patent Citations (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH06506798A (ja) * | 1991-04-09 | 1994-07-28 | シリコン・ストーリッジ・テクノロジー・インク | 電気的可変不揮発性単一トランジスタ半導体記憶装置及び方法 |
JPH07221210A (ja) * | 1993-12-10 | 1995-08-18 | Advanced Micro Devices Inc | 不揮発性メモリを製造するための方法および不揮発性メモリアレイ |
JPH10178111A (ja) * | 1996-12-16 | 1998-06-30 | Taiwan Moshii Denshi Kofun Yugenkoshi | スプリットゲートフラッシュメモリの構造及び製造方法 |
JPH1126616A (ja) * | 1997-07-07 | 1999-01-29 | Nec Corp | スプリットゲート型フラッシュメモリセルおよびその製造方法 |
JPH11284083A (ja) * | 1998-03-27 | 1999-10-15 | Sanyo Electric Co Ltd | 不揮発性半導体記憶装置とその製造方法 |
Also Published As
Publication number | Publication date |
---|---|
KR20040077266A (ko) | 2004-09-04 |
JP2004266279A (ja) | 2004-09-24 |
US20040171217A1 (en) | 2004-09-02 |
KR100511032B1 (ko) | 2005-08-30 |
US7118969B2 (en) | 2006-10-10 |
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