JP4612450B2 - 積層型半導体装置の製造方法 - Google Patents

積層型半導体装置の製造方法 Download PDF

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Publication number
JP4612450B2
JP4612450B2 JP2005092595A JP2005092595A JP4612450B2 JP 4612450 B2 JP4612450 B2 JP 4612450B2 JP 2005092595 A JP2005092595 A JP 2005092595A JP 2005092595 A JP2005092595 A JP 2005092595A JP 4612450 B2 JP4612450 B2 JP 4612450B2
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JP
Japan
Prior art keywords
semiconductor element
film
semiconductor
thickness
adhesive
Prior art date
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Expired - Fee Related
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JP2005092595A
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English (en)
Japanese (ja)
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JP2006278519A5 (https=
JP2006278519A (ja
Inventor
淳 芳村
忠宣 大久保
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
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Toshiba Corp
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Publication date
Application filed by Toshiba Corp filed Critical Toshiba Corp
Priority to JP2005092595A priority Critical patent/JP4612450B2/ja
Priority to TW095107613A priority patent/TW200727446A/zh
Priority to KR1020060027518A priority patent/KR100796884B1/ko
Priority to US11/390,285 priority patent/US7615413B2/en
Priority to CNB2006100584978A priority patent/CN100440464C/zh
Publication of JP2006278519A publication Critical patent/JP2006278519A/ja
Publication of JP2006278519A5 publication Critical patent/JP2006278519A5/ja
Priority to US12/585,547 priority patent/US7785926B2/en
Application granted granted Critical
Publication of JP4612450B2 publication Critical patent/JP4612450B2/ja
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

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    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/01—Manufacture or treatment
    • H10W72/013—Manufacture or treatment of die-attach connectors
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/851—Dispositions of multiple connectors or interconnections
    • H10W72/874—On different surfaces
    • H10W72/884—Die-attach connectors and bond wires
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/731—Package configurations characterised by the relative positions of pads or connectors relative to package parts of die-attach connectors
    • H10W90/732—Package configurations characterised by the relative positions of pads or connectors relative to package parts of die-attach connectors between stacked chips
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/731—Package configurations characterised by the relative positions of pads or connectors relative to package parts of die-attach connectors
    • H10W90/734—Package configurations characterised by the relative positions of pads or connectors relative to package parts of die-attach connectors between a chip and a stacked insulating package substrate, interposer or RDL
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/751—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires
    • H10W90/754—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires between a chip and a stacked insulating package substrate, interposer or RDL

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  • Die Bonding (AREA)
JP2005092595A 2005-03-28 2005-03-28 積層型半導体装置の製造方法 Expired - Fee Related JP4612450B2 (ja)

Priority Applications (6)

Application Number Priority Date Filing Date Title
JP2005092595A JP4612450B2 (ja) 2005-03-28 2005-03-28 積層型半導体装置の製造方法
TW095107613A TW200727446A (en) 2005-03-28 2006-03-07 Stack type semiconductor device manufacturing method and stack type electronic component manufacturing method
KR1020060027518A KR100796884B1 (ko) 2005-03-28 2006-03-27 적층형 반도체 장치의 제조 방법 및 적층형 전자 부품의제조 방법
CNB2006100584978A CN100440464C (zh) 2005-03-28 2006-03-28 层叠型半导体器件以及层叠型电子部件的制造方法
US11/390,285 US7615413B2 (en) 2005-03-28 2006-03-28 Method of manufacturing stack-type semiconductor device and method of manufacturing stack-type electronic component
US12/585,547 US7785926B2 (en) 2005-03-28 2009-09-17 Method of manufacturing stack-type semiconductor device and method of manufacturing stack-type electronic component

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2005092595A JP4612450B2 (ja) 2005-03-28 2005-03-28 積層型半導体装置の製造方法

Publications (3)

Publication Number Publication Date
JP2006278519A JP2006278519A (ja) 2006-10-12
JP2006278519A5 JP2006278519A5 (https=) 2007-06-14
JP4612450B2 true JP4612450B2 (ja) 2011-01-12

Family

ID=37030623

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2005092595A Expired - Fee Related JP4612450B2 (ja) 2005-03-28 2005-03-28 積層型半導体装置の製造方法

Country Status (2)

Country Link
JP (1) JP4612450B2 (https=)
CN (1) CN100440464C (https=)

Families Citing this family (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP5680330B2 (ja) * 2010-04-23 2015-03-04 株式会社東芝 半導体装置の製造方法
TWI393494B (zh) 2010-06-11 2013-04-11 欣興電子股份有限公司 具有線路的基板條及其製造方法
CN102315202B (zh) * 2010-07-02 2016-03-09 欣兴电子股份有限公司 具有线路的基板条及其制造方法
JP5384443B2 (ja) * 2010-07-28 2014-01-08 日東電工株式会社 フリップチップ型半導体裏面用フィルム、ダイシングテープ一体型半導体裏面用フィルム、半導体装置の製造方法、及び、フリップチップ型半導体装置
JP2013098240A (ja) * 2011-10-28 2013-05-20 Toshiba Corp 記憶装置、半導体装置及び半導体装置の製造方法
JP6220706B2 (ja) * 2014-03-14 2017-10-25 リンテック株式会社 シート貼付装置および貼付方法

Family Cites Families (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH08288455A (ja) * 1995-04-11 1996-11-01 Oki Electric Ind Co Ltd 半導体装置およびその製造方法
JP3913481B2 (ja) * 2001-01-24 2007-05-09 シャープ株式会社 半導体装置および半導体装置の製造方法
JP2003041209A (ja) * 2001-07-30 2003-02-13 Hitachi Chem Co Ltd 接着シートならびに半導体装置およびその製造方法
JP3912223B2 (ja) * 2002-08-09 2007-05-09 富士通株式会社 半導体装置及びその製造方法
JP3966808B2 (ja) * 2002-12-03 2007-08-29 古河電気工業株式会社 粘接着テープ
JP2004193363A (ja) * 2002-12-11 2004-07-08 Fujitsu Ltd 半導体装置及びその製造方法
JP4316253B2 (ja) * 2003-02-18 2009-08-19 リンテック株式会社 ウエハダイシング・接着用シートおよび半導体装置の製造方法
JP2005327789A (ja) * 2004-05-12 2005-11-24 Sharp Corp ダイシング・ダイボンド兼用粘接着シートおよびこれを用いた半導体装置の製造方法

Also Published As

Publication number Publication date
CN100440464C (zh) 2008-12-03
CN1841688A (zh) 2006-10-04
JP2006278519A (ja) 2006-10-12

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