JP4610414B2 - 電子部品収納用パッケージおよび電子装置ならびに電子装置の実装構造 - Google Patents

電子部品収納用パッケージおよび電子装置ならびに電子装置の実装構造 Download PDF

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Publication number
JP4610414B2
JP4610414B2 JP2005155866A JP2005155866A JP4610414B2 JP 4610414 B2 JP4610414 B2 JP 4610414B2 JP 2005155866 A JP2005155866 A JP 2005155866A JP 2005155866 A JP2005155866 A JP 2005155866A JP 4610414 B2 JP4610414 B2 JP 4610414B2
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JP
Japan
Prior art keywords
electronic component
metal
frame
heat
electronic device
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
JP2005155866A
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English (en)
Japanese (ja)
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JP2006303400A (ja
JP2006303400A5 (https=
Inventor
正彦 宮内
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Kyocera Corp
Original Assignee
Kyocera Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Kyocera Corp filed Critical Kyocera Corp
Priority to JP2005155866A priority Critical patent/JP4610414B2/ja
Priority to US11/378,859 priority patent/US7745914B2/en
Publication of JP2006303400A publication Critical patent/JP2006303400A/ja
Publication of JP2006303400A5 publication Critical patent/JP2006303400A5/ja
Application granted granted Critical
Publication of JP4610414B2 publication Critical patent/JP4610414B2/ja
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

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Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W76/00—Containers; Fillings or auxiliary members therefor; Seals
    • H10W76/10—Containers or parts thereof
    • H10W76/12—Containers or parts thereof characterised by their shape
    • H10W76/13—Containers comprising a conductive base serving as an interconnection
    • H10W76/134—Containers comprising a conductive base serving as an interconnection having other interconnections parallel to the conductive base
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W40/00—Arrangements for thermal protection or thermal control
    • H10W40/70—Fillings or auxiliary members in containers or in encapsulations for thermal protection or control
    • H10W40/77—Auxiliary members characterised by their shape
    • H10W40/778—Auxiliary members characterised by their shape in encapsulations
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/60—Insulating or insulated package substrates; Interposers; Redistribution layers
    • H10W70/67—Insulating or insulated package substrates; Interposers; Redistribution layers characterised by their insulating layers or insulating parts
    • H10W70/68—Shapes or dispositions thereof
    • H10W70/682—Shapes or dispositions thereof comprising holes having chips therein
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/60—Insulating or insulated package substrates; Interposers; Redistribution layers
    • H10W70/67—Insulating or insulated package substrates; Interposers; Redistribution layers characterised by their insulating layers or insulating parts
    • H10W70/68—Shapes or dispositions thereof
    • H10W70/685—Shapes or dispositions thereof comprising multiple insulating layers
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/851—Dispositions of multiple connectors or interconnections
    • H10W72/874—On different surfaces
    • H10W72/884—Die-attach connectors and bond wires
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/731—Package configurations characterised by the relative positions of pads or connectors relative to package parts of die-attach connectors
    • H10W90/737—Package configurations characterised by the relative positions of pads or connectors relative to package parts of die-attach connectors between a chip and a laterally-adjacent lead frame, conducting package substrate or heat sink
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/751—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires
    • H10W90/754—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires between a chip and a stacked insulating package substrate, interposer or RDL

Landscapes

  • Cooling Or The Like Of Semiconductors Or Solid State Devices (AREA)
  • Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
JP2005155866A 2005-03-22 2005-05-27 電子部品収納用パッケージおよび電子装置ならびに電子装置の実装構造 Expired - Fee Related JP4610414B2 (ja)

Priority Applications (2)

Application Number Priority Date Filing Date Title
JP2005155866A JP4610414B2 (ja) 2005-03-22 2005-05-27 電子部品収納用パッケージおよび電子装置ならびに電子装置の実装構造
US11/378,859 US7745914B2 (en) 2005-03-22 2006-03-17 Package for receiving electronic parts, and electronic device and mounting structure thereof

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP2005081464 2005-03-22
JP2005155866A JP4610414B2 (ja) 2005-03-22 2005-05-27 電子部品収納用パッケージおよび電子装置ならびに電子装置の実装構造

Publications (3)

Publication Number Publication Date
JP2006303400A JP2006303400A (ja) 2006-11-02
JP2006303400A5 JP2006303400A5 (https=) 2008-05-15
JP4610414B2 true JP4610414B2 (ja) 2011-01-12

Family

ID=37393340

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2005155866A Expired - Fee Related JP4610414B2 (ja) 2005-03-22 2005-05-27 電子部品収納用パッケージおよび電子装置ならびに電子装置の実装構造

Country Status (2)

Country Link
US (1) US7745914B2 (https=)
JP (1) JP4610414B2 (https=)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2018092251A1 (ja) * 2016-11-17 2018-05-24 三菱電機株式会社 半導体パッケージ

Families Citing this family (20)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP5112101B2 (ja) * 2007-02-15 2013-01-09 株式会社東芝 半導体パッケージ
JP4558012B2 (ja) * 2007-07-05 2010-10-06 株式会社東芝 半導体パッケージ用放熱プレート及び半導体装置
US7838985B2 (en) * 2007-07-12 2010-11-23 Vishay General Semiconductor Llc Semiconductor assembly that includes a power semiconductor die located on a cell defined by first and second patterned polymer layers
US7915728B2 (en) * 2007-07-12 2011-03-29 Vishay General Semiconductor Llc Subassembly that includes a power semiconductor die and a heat sink having an exposed surface portion thereof
JP2011114219A (ja) * 2009-11-27 2011-06-09 Kyocera Corp 素子搭載用部品、実装基体および電子装置
JP5500056B2 (ja) * 2010-12-06 2014-05-21 日本電気株式会社 赤外線センサパッケージおよび該赤外線センサパッケージを搭載した電子機器
KR101277202B1 (ko) * 2011-04-25 2013-06-20 주식회사 코스텍시스 메탈 베이스 및 그 제조 방법과 이를 이용한 소자 패키지
EP2560203A1 (en) * 2011-08-17 2013-02-20 ABB Technology AG Power semiconductor arrangement
CN102403419B (zh) * 2011-11-09 2013-08-21 东莞勤上光电股份有限公司 一种大功率led散热结构的制作工艺
KR101973395B1 (ko) * 2012-08-09 2019-04-29 엘지이노텍 주식회사 발광 모듈
JP6193784B2 (ja) * 2014-02-26 2017-09-06 京セラ株式会社 撮像素子実装用基板及び撮像装置
CN105210183B (zh) * 2014-04-23 2018-06-12 京瓷株式会社 电子元件安装用基板以及电子装置
JP6502925B2 (ja) 2014-04-23 2019-04-17 京セラ株式会社 電子素子実装用基板および電子装置
US9947836B2 (en) 2014-09-19 2018-04-17 Kyocera Corporation Electronic device mounting substrate and electronic apparatus
US9559026B2 (en) * 2015-02-26 2017-01-31 Infineon Technologies Americas Corp. Semiconductor package having a multi-layered base
US20190006254A1 (en) * 2017-06-30 2019-01-03 Kyocera International, Inc. Microelectronic package construction enabled through ceramic insulator strengthening and design
WO2019168056A1 (ja) * 2018-02-27 2019-09-06 京セラ株式会社 半導体パッケージ、半導体装置および半導体パッケージの製造方法
US12119281B2 (en) * 2020-08-04 2024-10-15 Qorvo Us, Inc. Hermetic package for high CTE mismatch
US11929310B2 (en) 2021-12-09 2024-03-12 Nxp Usa, Inc. Radio frequency packages containing substrates with coefficient of thermal expansion matched mount pads and associated fabrication methods
CN115188720A (zh) * 2022-07-07 2022-10-14 中为先进封装技术(深圳)有限公司 基于引线框架类垂直封装的sip模组

Family Cites Families (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2662991B2 (ja) * 1988-07-29 1997-10-15 イビデン株式会社 混成集積回路パッケージ
US5175612A (en) * 1989-12-19 1992-12-29 Lsi Logic Corporation Heat sink for semiconductor device assembly
JPH04348062A (ja) 1991-01-09 1992-12-03 Sumitomo Electric Ind Ltd 半導体搭載用放熱基板の製造法と該基板を用いた半導体用パッケージ
JPH04284655A (ja) * 1991-03-13 1992-10-09 Hitachi Ltd 半導体集積回路装置
US5367196A (en) * 1992-09-17 1994-11-22 Olin Corporation Molded plastic semiconductor package including an aluminum alloy heat spreader
JPH06334074A (ja) 1993-05-20 1994-12-02 Hitachi Metals Ltd 半導体装置用基板
JPH07302866A (ja) * 1994-04-28 1995-11-14 Nippon Steel Corp 半導体装置および該装置用ヒートスプレッダー
JP3250187B2 (ja) * 1994-07-15 2002-01-28 三菱マテリアル株式会社 高放熱性セラミックパッケージ
JP2765621B2 (ja) * 1995-07-31 1998-06-18 日本電気株式会社 半導体装置用パッケージ
KR0163871B1 (ko) * 1995-11-25 1998-12-01 김광호 하부에 히트 싱크가 부착된 솔더 볼 어레이 패키지
JP2004247514A (ja) * 2003-02-13 2004-09-02 Kyocera Corp 半導体素子収納用パッケージおよび半導体装置
US6921971B2 (en) * 2003-01-15 2005-07-26 Kyocera Corporation Heat releasing member, package for accommodating semiconductor element and semiconductor device
US7235422B2 (en) * 2005-02-02 2007-06-26 Agere Systems Inc. Device packages

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2018092251A1 (ja) * 2016-11-17 2018-05-24 三菱電機株式会社 半導体パッケージ
JPWO2018092251A1 (ja) * 2016-11-17 2019-03-14 三菱電機株式会社 半導体パッケージ
US10910326B2 (en) 2016-11-17 2021-02-02 Mitsubishi Electric Corporation Semiconductor package

Also Published As

Publication number Publication date
US7745914B2 (en) 2010-06-29
JP2006303400A (ja) 2006-11-02
US20060249835A1 (en) 2006-11-09

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