JP4575437B2 - 光感知素子パッケージ及びその製造方法 - Google Patents
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- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/02—Containers; Seals
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- H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L31/02—Details
- H01L31/0203—Containers; Encapsulations, e.g. encapsulation of photodiodes
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/14—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
- H01L27/144—Devices controlled by radiation
- H01L27/146—Imager structures
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- H01L27/14618—Containers
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
- H01L2224/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
- H01L2224/29001—Core members of the layer connector
- H01L2224/2901—Shape
- H01L2224/29011—Shape comprising apertures or cavities
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- H—ELECTRICITY
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- H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
- H01L2224/731—Location prior to the connecting process
- H01L2224/73101—Location prior to the connecting process on the same surface
- H01L2224/73103—Bump and layer connectors
- H01L2224/73104—Bump and layer connectors the bump connector being embedded into the layer connector
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
- H01L2224/732—Location after the connecting process
- H01L2224/73201—Location after the connecting process on the same surface
- H01L2224/73203—Bump and layer connectors
- H01L2224/73204—Bump and layer connectors the bump connector being embedded into the layer connector
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
- H01L2224/8119—Arrangement of the bump connectors prior to mounting
- H01L2224/81191—Arrangement of the bump connectors prior to mounting wherein the bump connectors are disposed only on the semiconductor or solid-state body
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
- H01L2224/8319—Arrangement of the layer connectors prior to mounting
- H01L2224/83191—Arrangement of the layer connectors prior to mounting wherein the layer connectors are disposed only on the semiconductor or solid-state body
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/06—Polymers
- H01L2924/078—Adhesive characteristics other than chemical
- H01L2924/0781—Adhesive characteristics other than chemical being an ohmic electrical conductor
- H01L2924/07811—Extrinsic, i.e. with electrical conductive fillers
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- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Electromagnetism (AREA)
- Solid State Image Pick-Up Elements (AREA)
- Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
- Wire Bonding (AREA)
- Encapsulation Of And Coatings For Semiconductor Or Solid State Devices (AREA)
Description
Claims (15)
- 所定波長の範囲内の光に対して透明な物質で形成され、前面の表面を有する基板と、
前記基板の前面の表面上に形成される1つ以上のパターニングされた保護層と、
1つ以上の光感知領域が前面側に形成され、前記光感知領域の周囲に配置された複数のフリップチップバンプによって前記前面側が前記基板の前面の表面から間隙を置いて離間されるように前記基板に実装される1つ以上の光感知センサーと、
前記間隙部分の周囲を充填して前記フリップチップバンプの周囲に配置され、前記光感知センサーと基板との間で、前記光感知領域と通じる内部の空洞を密封するように取り囲む密封構造と、を含み、
前記密封構造は、前記保護層によって形成され、前記フリップチップバンプを間に置いて、前記フリップチップバンプの内側の前記フリップチップバンプと前記光感知領域との間、及び前記フリップチップバンプの外側に配置されるダム構造または溝構造と、
前記ダム構造または溝構造内に形成される密封層と、を含むことを特徴とする光感知素子パッケージ。 - 前記密封層はエポキシ樹脂から形成されることを特徴とする請求項1に記載の光感知素子パッケージ。
- 前記ダム構造は、前記密封層からオフセットされ、前記保護層の上で突出形成され、1つ以上形成されることを特徴とする請求項1に記載の光感知素子パッケージ。
- 前記溝構造は、前記密封層からオフセットされ、前記保護層から分離して形成され、1つ以上形成されることを特徴とする請求項1に記載の光感知素子パッケージ。
- 前記密封構造は、前記光感知領域を取り囲むように構成された閉曲線を形成することを特徴とする請求項1に記載の光感知素子パッケージ。
- 前記密封層は、ノーフローアンダーフィル類型のエポキシ樹脂から形成されることを特徴とする請求項1に記載の光感知素子パッケージ。
- 所定波長の範囲内の光に対して透明な物質に形成され、前面の表面の上に形成された1セット以上のパターニングされた金属及び保護層によって形成された複数の接着パッドを有する基板と、
該基板に実装され、前面側上に光感知領域を有し、該光感知領域の外側の周辺に複数の接着パッドが形成された1つ以上の光感知センサーと、
前記光感知センサー及び基板の前記各接着パッドに延長形成され、前記光感知センサーと前記基板とが間隙を置いて離隔して実装されるようにするフリップチップバンプと、
前記間隙の一部を充填して前記フリップチップバンプの周囲に配置され、前記光感知センサーと基板との間で内部の空洞を形成するように前記光感知領域を密封するように取り囲む閉ループ構成を有する密封構造と、を含み、
前記密封構造は、前記保護層によって形成され、前記フリップチップバンプを間に置いて、前記フリップチップバンプの内側の前記フリップチップバンプと前記光感知領域との間、及び前記フリップチップバンプの外側に配置されるダム構造または溝構造と、
前記ダム構造または溝構造内に形成される密封層と、を含むことを特徴とする光感知素子パッケージ。 - 前記密封層は、ノーフローアンダーフィル類型のエポキシ樹脂から形成されることを特徴とする請求項7に記載の光感知素子パッケージ。
- 前記ダム構造は、前記基板の前記保護層から前記光感知センサーの前記前面の表面まで突出するように形成され、前記光感知領域の周囲から延長され、1つ以上形成されることを特徴とする請求項7に記載の光感知素子パッケージ。
- 前記溝構造は、前記密封層からオフセットされ、保護層から分離して形成され、1つ以上形成されることを特徴とする請求項7に記載の光感知素子パッケージ。
- 光感知素子パッケージを製造する方法において、
所定波長の範囲内の光に対して透明な物質から形成され、前面の表面を有する基板を設置する段階と、
前記基板前面の表面上に複数の接着パッドを形成する1セット以上のパターニングされた金属及び保護層を形成する段階と、
前記保護層からダム構造または溝構造を形成する段階と、
前面の上に1つ以上の光感知領域が形成された光感知センサーを1つ以上設置する段階と、
前記光感知センサーの前記光感知領域の外側の周辺に複数の接着パッドを形成する段階と、
前記複数の接着パッドのそれぞれの上に複数のフリップチップバンプを形成する段階と、
前記フリップチップバンプをノーフローアンダーフィル類型の未硬化エポキシ樹脂にディッピングする段階と、
前記光感知センサーの前記前面と前記基板の前記前面とが間隙を置いて離隔されるように前記光感知センサーと前記基板をフリップチップ実装する段階と、
ノーフローアンダーフィル物質を硬化して前記間隙を満たし、前記光感知センサーと前記基板との間に内部の空洞を形成する密封構造を形成する段階と、を含み、
前記ダム構造または溝構造は、前記フリップチップバンプを間に置いて前記フリップチップバンプの内側の前記フリップチップバンプと前記光感知領域との間、及び前記フリップチップバンプの外側に形成され、
前記フリップチップバンプがリフローされて前記光感知センサーと基板が接続される間に前記ノーフローアンダーフィル物質が硬化されて前記光感知領域を密封するように取り囲む密封層を形成することを特徴とする光感知素子パッケージ製造方法。 - 前記ディッピングする段階は、
外部と内部を有する多部品テーブル組立体上に前記ノーフローアンダーフィル類型の物質を提供する段階と、
前記多部品テーブル組立体の前記内部を前記外部に対して下方へ移動する段階と、及び
前記外部で多部品テーブル組立体の前記フリップチップバンプを前記ノーフローアンダーフィル物質にディッピングするために、前記多部品テーブル組立体上で前記光感知センサーを下降させる段階と、を含むことを特徴とする請求項11に記載の光感知素子パッケージ製造方法。 - 前記ダム構造は前記保護層から突出して前記内部の空洞の周囲で連続的に延長され、前記溝構造は前記保護層から分離して形成されることを特徴とする請求項11に記載の光感知素子パッケージ製造方法。
- 前記ノーフローアンダーフィル物質は、前記基板前面の表面の中央領域部の周囲に間欠的なパターンにより塗布されることを特徴とする請求項11に記載の光感知素子パッケージ製造方法。
- 前記未硬化ノーフローアンダーフィル物質は、一連の離隔された点滴により塗布され、これら点滴は、ドットまたは長く延長されるストリップ状であり、前記点滴のうち隣接したものは、前記密封構造を形成する段階で1つに接合されることを特徴とする請求項14に記載の光感知素子パッケージ製造方法。
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US56097704P | 2004-04-12 | 2004-04-12 | |
US10/937,252 US7122874B2 (en) | 2004-04-12 | 2004-09-10 | Electronic package having a sealing structure on predetermined area, and the method thereof |
PCT/KR2005/000996 WO2005098944A1 (en) | 2004-04-12 | 2005-04-07 | Electronic package having a sealing structure on predetermined area, and the method thereof |
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JP2007533131A JP2007533131A (ja) | 2007-11-15 |
JP4575437B2 true JP4575437B2 (ja) | 2010-11-04 |
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US (2) | US7122874B2 (ja) |
JP (1) | JP4575437B2 (ja) |
KR (1) | KR100886904B1 (ja) |
CN (1) | CN1938848A (ja) |
WO (1) | WO2005098944A1 (ja) |
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KR100652375B1 (ko) * | 2004-06-29 | 2006-12-01 | 삼성전자주식회사 | 와이어 본딩 패키지를 포함하는 이미지 센서 모듈 구조물및 그 제조방법 |
TW200611350A (en) * | 2004-09-21 | 2006-04-01 | Advanced Semiconductor Eng | Sensitive flip-chip bonding structure |
US7438395B2 (en) * | 2004-09-24 | 2008-10-21 | Brother Kogyo Kabushiki Kaisha | Liquid-jetting apparatus and method for producing the same |
TW200644261A (en) * | 2005-06-06 | 2006-12-16 | Megica Corp | Chip-package structure and manufacturing process thereof |
US7439098B2 (en) * | 2005-09-09 | 2008-10-21 | Advanced Semiconductor Engineering, Inc. | Semiconductor package for encapsulating multiple dies and method of manufacturing the same |
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US20050224938A1 (en) | 2005-10-13 |
KR100886904B1 (ko) | 2009-03-09 |
WO2005098944A1 (en) | 2005-10-20 |
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US7494848B2 (en) | 2009-02-24 |
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