JP4493779B2 - 半導体装置およびその作製方法 - Google Patents

半導体装置およびその作製方法 Download PDF

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Publication number
JP4493779B2
JP4493779B2 JP2000022022A JP2000022022A JP4493779B2 JP 4493779 B2 JP4493779 B2 JP 4493779B2 JP 2000022022 A JP2000022022 A JP 2000022022A JP 2000022022 A JP2000022022 A JP 2000022022A JP 4493779 B2 JP4493779 B2 JP 4493779B2
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JP
Japan
Prior art keywords
film
contact
silicon
atomic
silicon oxynitride
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Expired - Fee Related
Application number
JP2000022022A
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English (en)
Japanese (ja)
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JP2001217422A5 (enExample
JP2001217422A (ja
Inventor
光範 坂間
典子 石丸
昌彦 三輪
道記 岩井
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Semiconductor Energy Laboratory Co Ltd
Sharp Corp
Original Assignee
Semiconductor Energy Laboratory Co Ltd
Sharp Corp
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Publication date
Application filed by Semiconductor Energy Laboratory Co Ltd, Sharp Corp filed Critical Semiconductor Energy Laboratory Co Ltd
Priority to JP2000022022A priority Critical patent/JP4493779B2/ja
Priority to TW090101346A priority patent/TW479370B/zh
Priority to US09/771,625 priority patent/US6673659B2/en
Publication of JP2001217422A publication Critical patent/JP2001217422A/ja
Publication of JP2001217422A5 publication Critical patent/JP2001217422A5/ja
Application granted granted Critical
Publication of JP4493779B2 publication Critical patent/JP4493779B2/ja
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/67005—Apparatus not specifically provided for elsewhere
    • H01L21/67011—Apparatus for manufacture or treatment
    • H01L21/67155—Apparatus for manufacturing or treating in a plurality of work-stations
    • H01L21/67236—Apparatus for manufacturing or treating in a plurality of work-stations the substrates being processed being not semiconductor wafers, e.g. leadframes or chips
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/01—Manufacture or treatment
    • H10D30/021—Manufacture or treatment of FETs having insulated gates [IGFET]
    • H10D30/031—Manufacture or treatment of FETs having insulated gates [IGFET] of thin-film transistors [TFT]
    • H10D30/0312—Manufacture or treatment of FETs having insulated gates [IGFET] of thin-film transistors [TFT] characterised by the gate electrodes
    • H10D30/0314—Manufacture or treatment of FETs having insulated gates [IGFET] of thin-film transistors [TFT] characterised by the gate electrodes of lateral top-gate TFTs comprising only a single gate
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/01—Manufacture or treatment
    • H10D30/021—Manufacture or treatment of FETs having insulated gates [IGFET]
    • H10D30/031—Manufacture or treatment of FETs having insulated gates [IGFET] of thin-film transistors [TFT]
    • H10D30/0321—Manufacture or treatment of FETs having insulated gates [IGFET] of thin-film transistors [TFT] comprising silicon, e.g. amorphous silicon or polysilicon
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/60—Insulated-gate field-effect transistors [IGFET]
    • H10D30/67—Thin-film transistors [TFT]
    • H10D30/6704—Thin-film transistors [TFT] having supplementary regions or layers in the thin films or in the insulated bulk substrates for controlling properties of the device
    • H10D30/6713—Thin-film transistors [TFT] having supplementary regions or layers in the thin films or in the insulated bulk substrates for controlling properties of the device characterised by the properties of the source or drain regions, e.g. compositions or sectional shapes
    • H10D30/6715—Thin-film transistors [TFT] having supplementary regions or layers in the thin films or in the insulated bulk substrates for controlling properties of the device characterised by the properties of the source or drain regions, e.g. compositions or sectional shapes characterised by the doping profiles, e.g. having lightly-doped source or drain extensions
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/60—Insulated-gate field-effect transistors [IGFET]
    • H10D30/67—Thin-film transistors [TFT]
    • H10D30/6704—Thin-film transistors [TFT] having supplementary regions or layers in the thin films or in the insulated bulk substrates for controlling properties of the device
    • H10D30/6713—Thin-film transistors [TFT] having supplementary regions or layers in the thin films or in the insulated bulk substrates for controlling properties of the device characterised by the properties of the source or drain regions, e.g. compositions or sectional shapes
    • H10D30/6715—Thin-film transistors [TFT] having supplementary regions or layers in the thin films or in the insulated bulk substrates for controlling properties of the device characterised by the properties of the source or drain regions, e.g. compositions or sectional shapes characterised by the doping profiles, e.g. having lightly-doped source or drain extensions
    • H10D30/6719—Thin-film transistors [TFT] having supplementary regions or layers in the thin films or in the insulated bulk substrates for controlling properties of the device characterised by the properties of the source or drain regions, e.g. compositions or sectional shapes characterised by the doping profiles, e.g. having lightly-doped source or drain extensions having significant overlap between the lightly-doped drains and the gate electrodes, e.g. gate-overlapped LDD [GOLDD] TFTs
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/60—Insulated-gate field-effect transistors [IGFET]
    • H10D30/67—Thin-film transistors [TFT]
    • H10D30/6704—Thin-film transistors [TFT] having supplementary regions or layers in the thin films or in the insulated bulk substrates for controlling properties of the device
    • H10D30/6725—Thin-film transistors [TFT] having supplementary regions or layers in the thin films or in the insulated bulk substrates for controlling properties of the device having supplementary regions or layers for improving the flatness of the device
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D86/00—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
    • H10D86/01—Manufacture or treatment
    • H10D86/021—Manufacture or treatment of multiple TFTs
    • H10D86/0212—Manufacture or treatment of multiple TFTs comprising manufacture, treatment or coating of substrates
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D86/00—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
    • H10D86/40—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D86/00—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
    • H10D86/40—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs
    • H10D86/411—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs characterised by materials, geometry or structure of the substrates
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D86/00—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
    • H10D86/40—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs
    • H10D86/60—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs wherein the TFTs are in active matrices
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/1333—Constructional arrangements; Manufacturing methods
    • G02F1/1345—Conductors connecting electrodes to cell terminals
    • G02F1/13454—Drivers integrated on the active matrix substrate
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/60—Insulated-gate field-effect transistors [IGFET]
    • H10D30/67—Thin-film transistors [TFT]
    • H10D30/6704—Thin-film transistors [TFT] having supplementary regions or layers in the thin films or in the insulated bulk substrates for controlling properties of the device
    • H10D30/6713—Thin-film transistors [TFT] having supplementary regions or layers in the thin films or in the insulated bulk substrates for controlling properties of the device characterised by the properties of the source or drain regions, e.g. compositions or sectional shapes
    • H10D30/6715—Thin-film transistors [TFT] having supplementary regions or layers in the thin films or in the insulated bulk substrates for controlling properties of the device characterised by the properties of the source or drain regions, e.g. compositions or sectional shapes characterised by the doping profiles, e.g. having lightly-doped source or drain extensions
    • H10D30/6721—Thin-film transistors [TFT] having supplementary regions or layers in the thin films or in the insulated bulk substrates for controlling properties of the device characterised by the properties of the source or drain regions, e.g. compositions or sectional shapes characterised by the doping profiles, e.g. having lightly-doped source or drain extensions having lightly-doped extensions consisting of multiple lightly doped zones or having non-homogeneous dopant distributions, e.g. graded LDD

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Thin Film Transistor (AREA)
  • Liquid Crystal (AREA)
  • Formation Of Insulating Films (AREA)
  • Electroluminescent Light Sources (AREA)
JP2000022022A 2000-01-31 2000-01-31 半導体装置およびその作製方法 Expired - Fee Related JP4493779B2 (ja)

Priority Applications (3)

Application Number Priority Date Filing Date Title
JP2000022022A JP4493779B2 (ja) 2000-01-31 2000-01-31 半導体装置およびその作製方法
TW090101346A TW479370B (en) 2000-01-31 2001-01-19 Semiconductor device and method of producing the same
US09/771,625 US6673659B2 (en) 2000-01-31 2001-01-30 Semiconductor device and method of producing the same

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2000022022A JP4493779B2 (ja) 2000-01-31 2000-01-31 半導体装置およびその作製方法

Publications (3)

Publication Number Publication Date
JP2001217422A JP2001217422A (ja) 2001-08-10
JP2001217422A5 JP2001217422A5 (enExample) 2006-11-16
JP4493779B2 true JP4493779B2 (ja) 2010-06-30

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JP2000022022A Expired - Fee Related JP4493779B2 (ja) 2000-01-31 2000-01-31 半導体装置およびその作製方法

Country Status (3)

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US (1) US6673659B2 (enExample)
JP (1) JP4493779B2 (enExample)
TW (1) TW479370B (enExample)

Families Citing this family (27)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6573195B1 (en) * 1999-01-26 2003-06-03 Semiconductor Energy Laboratory Co., Ltd. Method for manufacturing a semiconductor device by performing a heat-treatment in a hydrogen atmosphere
US6461899B1 (en) * 1999-04-30 2002-10-08 Semiconductor Energy Laboratory, Co., Ltd. Oxynitride laminate “blocking layer” for thin film semiconductor devices
CN100485943C (zh) * 1999-06-02 2009-05-06 株式会社半导体能源研究所 半导体器件
JP4562835B2 (ja) * 1999-11-05 2010-10-13 株式会社半導体エネルギー研究所 半導体装置の作製方法
JP2001177101A (ja) 1999-12-20 2001-06-29 Semiconductor Energy Lab Co Ltd 半導体装置およびその作製方法
JP2004247077A (ja) * 2003-02-12 2004-09-02 Semiconductor Energy Lab Co Ltd 発光装置及びその作製方法
DE10335099B4 (de) * 2003-07-31 2006-06-08 Advanced Micro Devices, Inc., Sunnyvale Verfahren zum Verbessern der Dickengleichförmigkeit von Siliziumnitridschichten für mehrere Halbleiterscheiben
JP4232675B2 (ja) * 2004-04-01 2009-03-04 セイコーエプソン株式会社 半導体装置の製造方法
JP4649896B2 (ja) 2004-07-09 2011-03-16 日本電気株式会社 半導体装置及びその製造方法、並びにこの半導体装置を備えた表示装置
US20060181266A1 (en) * 2005-02-14 2006-08-17 Panelvision Technology, A California Corporation Flat panel display inspection system
KR101133767B1 (ko) * 2005-03-09 2012-04-09 삼성전자주식회사 유기 박막 트랜지스터 표시판 및 그 제조 방법
JP2006269808A (ja) * 2005-03-24 2006-10-05 Mitsubishi Electric Corp 半導体装置および画像表示装置
KR100703971B1 (ko) * 2005-06-08 2007-04-06 삼성전자주식회사 반도체 집적 회로 장치 및 그 제조 방법
EP1998373A3 (en) 2005-09-29 2012-10-31 Semiconductor Energy Laboratory Co, Ltd. Semiconductor device having oxide semiconductor layer and manufacturing method thereof
US7498270B2 (en) * 2005-09-30 2009-03-03 Tokyo Electron Limited Method of forming a silicon oxynitride film with tensile stress
US7588883B2 (en) 2006-05-09 2009-09-15 United Microelectronics Corp. Method for forming a gate and etching a conductive layer
JP2008258345A (ja) * 2007-04-04 2008-10-23 Sony Corp 薄膜トランジスタおよびその製造方法ならびに表示装置
US8119540B2 (en) * 2008-03-28 2012-02-21 Tokyo Electron Limited Method of forming a stressed passivation film using a microwave-assisted oxidation process
US7807586B2 (en) * 2008-03-28 2010-10-05 Tokyo Electron Limited Method of forming a stressed passivation film using a non-ionizing electromagnetic radiation-assisted oxidation process
CN102484135B (zh) * 2009-09-04 2016-01-20 株式会社东芝 薄膜晶体管及其制造方法
DE102010013038B4 (de) * 2010-03-26 2012-01-19 Schüco Tf Gmbh & Co. Kg Verfahren zum Herstellen einer Fotovoltaikzelle
JP5827578B2 (ja) 2011-02-14 2015-12-02 株式会社半導体エネルギー研究所 光学素子の作製方法
CN103828061B (zh) * 2011-10-07 2018-02-13 应用材料公司 使用氩气稀释来沉积含硅层的方法
JP6026395B2 (ja) * 2013-12-05 2016-11-16 富士フイルム株式会社 有機機能層付き基板およびその製造方法
KR102223678B1 (ko) * 2014-07-25 2021-03-08 삼성디스플레이 주식회사 표시장치용 백플레인 및 그 제조 방법
CN108493238B (zh) * 2018-03-28 2022-11-25 京东方科技集团股份有限公司 薄膜晶体管及制作方法、阵列基板、显示装置
KR20220105708A (ko) * 2021-01-20 2022-07-28 삼성디스플레이 주식회사 색변환 패널 및 이를 포함하는 표시 장치

Family Cites Families (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5470768A (en) 1992-08-07 1995-11-28 Fujitsu Limited Method for fabricating a thin-film transistor
US5923962A (en) 1993-10-29 1999-07-13 Semiconductor Energy Laboratory Co., Ltd. Method for manufacturing a semiconductor device
TW264575B (enExample) 1993-10-29 1995-12-01 Handotai Energy Kenkyusho Kk
JP3431033B2 (ja) 1993-10-29 2003-07-28 株式会社半導体エネルギー研究所 半導体作製方法
JP3464287B2 (ja) 1994-09-05 2003-11-05 株式会社半導体エネルギー研究所 半導体装置の作製方法
JP3597331B2 (ja) 1996-10-24 2004-12-08 株式会社半導体エネルギー研究所 半導体装置の作製方法
JP3645377B2 (ja) 1996-10-24 2005-05-11 株式会社半導体エネルギー研究所 集積回路の作製方法
JP2000012864A (ja) 1998-06-22 2000-01-14 Semiconductor Energy Lab Co Ltd 半導体装置の作製方法
JP3977974B2 (ja) * 1998-12-29 2007-09-19 株式会社半導体エネルギー研究所 半導体装置
JP4463377B2 (ja) * 1999-04-30 2010-05-19 株式会社半導体エネルギー研究所 半導体装置およびその作製方法
US6461899B1 (en) 1999-04-30 2002-10-08 Semiconductor Energy Laboratory, Co., Ltd. Oxynitride laminate “blocking layer” for thin film semiconductor devices
JP2001177101A (ja) * 1999-12-20 2001-06-29 Semiconductor Energy Lab Co Ltd 半導体装置およびその作製方法
TW521226B (en) 2000-03-27 2003-02-21 Semiconductor Energy Lab Electro-optical device

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Publication number Publication date
US20010011725A1 (en) 2001-08-09
TW479370B (en) 2002-03-11
JP2001217422A (ja) 2001-08-10
US6673659B2 (en) 2004-01-06

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