JP4436765B2 - 低応力半導体ダイ・アタッチ - Google Patents

低応力半導体ダイ・アタッチ Download PDF

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Publication number
JP4436765B2
JP4436765B2 JP2004564760A JP2004564760A JP4436765B2 JP 4436765 B2 JP4436765 B2 JP 4436765B2 JP 2004564760 A JP2004564760 A JP 2004564760A JP 2004564760 A JP2004564760 A JP 2004564760A JP 4436765 B2 JP4436765 B2 JP 4436765B2
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Japan
Prior art keywords
die
solder
dewetting
outer edge
die attach
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Expired - Fee Related
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JP2004564760A
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English (en)
Japanese (ja)
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JP2006512765A5 (enExample
JP2006512765A (ja
Inventor
ダブリュ． コンディ、ブライアン
ジェイ． ドゥラティ、デイビッド
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NXP USA Inc
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NXP USA Inc
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    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/102—Material of the semiconductor or solid state bodies
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    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151—Die mounting substrate
    • H01L2924/156—Material
    • H01L2924/157—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2924/15738—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950 C and less than 1550 C
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  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Die Bonding (AREA)
JP2004564760A 2002-12-30 2003-09-30 低応力半導体ダイ・アタッチ Expired - Fee Related JP4436765B2 (ja)

Applications Claiming Priority (2)

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US10/334,042 US7042103B2 (en) 2002-12-30 2002-12-30 Low stress semiconductor die attach
PCT/US2003/030862 WO2004061936A1 (en) 2002-12-30 2003-09-30 Low stress semiconductor die attach

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WO2008132559A1 (en) * 2007-04-27 2008-11-06 Freescale Semiconductor, Inc. Semiconductor wafer processing
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US8718720B1 (en) * 2010-07-30 2014-05-06 Triquint Semiconductor, Inc. Die including a groove extending from a via to an edge of the die
CN102255033B (zh) * 2011-07-14 2013-04-10 佛山市蓝箭电子股份有限公司 一种大功率led封装结构及其封装方法
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US9171786B1 (en) 2014-07-02 2015-10-27 Freescale Semiconductor, Inc. Integrated circuit with recess for die attachment
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US20040124543A1 (en) 2004-07-01
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