JP4422493B2 - フォトレジストおよびエッチング残渣の除去方法 - Google Patents
フォトレジストおよびエッチング残渣の除去方法 Download PDFInfo
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- JP4422493B2 JP4422493B2 JP2003586925A JP2003586925A JP4422493B2 JP 4422493 B2 JP4422493 B2 JP 4422493B2 JP 2003586925 A JP2003586925 A JP 2003586925A JP 2003586925 A JP2003586925 A JP 2003586925A JP 4422493 B2 JP4422493 B2 JP 4422493B2
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- 238000000034 method Methods 0.000 title claims description 106
- 229920002120 photoresistant polymer Polymers 0.000 title claims description 22
- 238000005530 etching Methods 0.000 title claims description 10
- 238000004380 ashing Methods 0.000 claims description 70
- 239000000758 substrate Substances 0.000 claims description 31
- 239000007789 gas Substances 0.000 claims description 27
- 229910052731 fluorine Inorganic materials 0.000 claims description 11
- 239000011737 fluorine Substances 0.000 claims description 11
- UFHFLCQGNIYNRP-UHFFFAOYSA-N Hydrogen Chemical compound [H][H] UFHFLCQGNIYNRP-UHFFFAOYSA-N 0.000 claims description 7
- 239000001257 hydrogen Substances 0.000 claims description 7
- 229910052739 hydrogen Inorganic materials 0.000 claims description 7
- 238000011065 in-situ storage Methods 0.000 claims description 6
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 claims description 4
- 238000001514 detection method Methods 0.000 claims description 4
- 229920002313 fluoropolymer Polymers 0.000 claims description 4
- 239000011261 inert gas Substances 0.000 claims description 4
- 239000001301 oxygen Substances 0.000 claims description 4
- 229910052760 oxygen Inorganic materials 0.000 claims description 4
- YCKRFDGAMUMZLT-UHFFFAOYSA-N Fluorine atom Chemical compound [F] YCKRFDGAMUMZLT-UHFFFAOYSA-N 0.000 claims 9
- 230000003628 erosive effect Effects 0.000 description 9
- 229920000642 polymer Polymers 0.000 description 7
- 238000012545 processing Methods 0.000 description 6
- 239000004065 semiconductor Substances 0.000 description 6
- 238000004140 cleaning Methods 0.000 description 4
- NBVXSUQYWXRMNV-UHFFFAOYSA-N fluoromethane Chemical compound FC NBVXSUQYWXRMNV-UHFFFAOYSA-N 0.000 description 4
- 238000004519 manufacturing process Methods 0.000 description 4
- 239000000463 material Substances 0.000 description 4
- 239000003989 dielectric material Substances 0.000 description 3
- 238000001636 atomic emission spectroscopy Methods 0.000 description 2
- 239000004020 conductor Substances 0.000 description 2
- 238000000151 deposition Methods 0.000 description 2
- 238000013400 design of experiment Methods 0.000 description 2
- 230000000694 effects Effects 0.000 description 2
- 150000008282 halocarbons Chemical class 0.000 description 2
- 238000001228 spectrum Methods 0.000 description 2
- 239000004215 Carbon black (E152) Substances 0.000 description 1
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 1
- 229910004014 SiF4 Inorganic materials 0.000 description 1
- 230000015572 biosynthetic process Effects 0.000 description 1
- 229910052802 copper Inorganic materials 0.000 description 1
- 239000010949 copper Substances 0.000 description 1
- 230000008021 deposition Effects 0.000 description 1
- 238000005553 drilling Methods 0.000 description 1
- 238000013401 experimental design Methods 0.000 description 1
- 229930195733 hydrocarbon Natural products 0.000 description 1
- 150000002430 hydrocarbons Chemical class 0.000 description 1
- 230000010354 integration Effects 0.000 description 1
- 230000003446 memory effect Effects 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 238000000059 patterning Methods 0.000 description 1
- 238000003672 processing method Methods 0.000 description 1
- 230000005855 radiation Effects 0.000 description 1
- ABTOQLMXBSRXSM-UHFFFAOYSA-N silicon tetrafluoride Chemical compound F[Si](F)(F)F ABTOQLMXBSRXSM-UHFFFAOYSA-N 0.000 description 1
- 238000010561 standard procedure Methods 0.000 description 1
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/302—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
- H01L21/306—Chemical or electrical treatment, e.g. electrolytic etching
- H01L21/3065—Plasma etching; Reactive-ion etching
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76801—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
- H01L21/76802—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing by forming openings in dielectrics
- H01L21/76814—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing by forming openings in dielectrics post-treatment or after-treatment, e.g. cleaning or removal of oxides on underlying conductors
-
- G—PHYSICS
- G03—PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
- G03F—PHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
- G03F7/00—Photomechanical, e.g. photolithographic, production of textured or patterned surfaces, e.g. printing surfaces; Materials therefor, e.g. comprising photoresists; Apparatus specially adapted therefor
- G03F7/26—Processing photosensitive materials; Apparatus therefor
- G03F7/42—Stripping or agents therefor
- G03F7/427—Stripping or agents therefor using plasma means only
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02041—Cleaning
- H01L21/02057—Cleaning during device manufacture
- H01L21/0206—Cleaning during device manufacture during, before or after processing of insulating layers
- H01L21/02063—Cleaning during device manufacture during, before or after processing of insulating layers the processing being the formation of vias or contact holes
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/302—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
- H01L21/3105—After-treatment
- H01L21/311—Etching the insulating layers by chemical or physical means
- H01L21/31127—Etching organic layers
- H01L21/31133—Etching organic layers by chemical means
- H01L21/31138—Etching organic layers by chemical means by dry-etching
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- General Physics & Mathematics (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- Power Engineering (AREA)
- Plasma & Fusion (AREA)
- Chemical & Material Sciences (AREA)
- Chemical Kinetics & Catalysis (AREA)
- General Chemical & Material Sciences (AREA)
- Drying Of Semiconductors (AREA)
Description
半導体製造において、従来の1ステップアッシングプロセスは、内部チャンバ表面(基板がアッシングされる)が、先の誘電体のエッチングプロセスから堆積するフルオロカーボンベースのポリマーを含み得るプロセスチャンバ内でしばしば実行される。あるいは、1ステップアッシングプロセスは、先のエッチングプロセスからのポリマー堆積物からきれいにされたプロセスチャンバ内で実行され得る。
2)誘電体の形態の上部での、その誘電体のファセッティング/浸食の最少化及びエッチング後/臨界精度(CD:クリティカルディメンション)バイアスの低減化
3)アッシング後残渣の最少化
4)その場アッシングの間、低誘電率膜へ導入されたダメージ(k値の低下)の最少化
5)自動チャンバドライ(乾式)クリーニングの提供、チャンバクリーニング間の平均時間の増加。
Claims (37)
- 水素含有ガスを含むプロセスガスを導入することと、
プラズマプロセスチャンバ内にプラズマを生成することと、
基板ホルダ上に載置した基板を前記プラズマにさらすことと、
前記基板ホルダに、ゼロバイアスを印加することも含むことができる第1のバイアスを印加することにより、先行してなされたエッチングのフォトレジストの残りとフルオロカーボンポリマーを前記チャンバおよび前記基板からエッチングし、除去するように、第1のアッシングステップを行うことと、
前記基板ホルダに、前記第1のバイアスを印加したあとに、前記第1のバイアスより高い第2のバイアスを印加することにより、前記基板から前記第1のアッシングステップ後の残渣を除去するように、第2のアッシングステップを行うことと、を具備するその場アッシングの方法。 - 前記水素含有ガスは、H2及びNH3の少なくとも1つを含む請求項1の方法。
- 前記水素含有ガスは、H2を含む請求項1の方法。
- 前記プロセスガスは、さらに不活性ガスを含む請求項1の方法。
- 前記不活性ガスは、He,Ar、及びN2の少なくとも1つを含む請求項4の方法。
- 前記プロセスガスは、さらにN2を含む請求項1の方法。
- 前記プロセスガスは、N2及び不活性ガスの少なくとも1つと、H2と、を含む請求項1の方法。
- 前記第1のバイアスは、100Wより低く、前記第2のバイアスは、100Wより高い請求項1の方法。
- 前記第1のバイアスは、50Wより低い請求項1の方法。
- 前記第1のバイアスは、ゼロに等しい請求項1の方法。
- 前記第2のバイアスは、120Wより高い請求項1の方法。
- 前記第2のアッシングステップは、前記第1のアッシングステップと異なるチャンバ圧力、及びプロセスガス組成の少なくとも1つを前記第2のアッシングステップで使用すること、をさらに具備する請求項1の方法。
- 前記第1のアッシングステップは、前記プラズマから放射された光を検出することと、
前記放射された光から前記第1のアッシングステップの終了を決定すること、をさらに具備する請求項1の方法。 - 前記放射された光の前記検出は、終点を確立するためのプロセスを提供する請求項13の方法。
- 前記放射された光は、励起された種から生じ、そして前記第1のアッシングステップの前記終了の情報を表す請求項13の方法。
- 前記放射された光は、酸素含有種及びフッ素含有種の少なくとも1つから生じる請求項13の方法。
- 前記フッ素含有種は、フッ素である請求項16の方法。
- 前記第2のアッシングステップは、前記プラズマから放射された光を検出することと、
前記放射された光から前記第2のアッシングステップの終了を決定すること、をさらに具備する請求項1の方法。 - 前記放射された光は、励起された種から生じ、そして前記第2のアッシングステップの前記終了の情報を表す請求項18の方法。
- 前記放射された光は、酸素含有種、及びフッ素含有種の少なくとも1つから生じる請求項19の方法。
- 前記フッ素含有種は、フッ素である請求項20の方法。
- 前記プラズマから放射された光を検出することと、
前記放射された光から前記第1と第2とのアッシングステップの終了を決定すること、をさらに具備する請求項1の方法。 - 前記放射された光は、励起された種から生じ、そして前記第1と第2とのアッシングステップの前記終了の情報を表す請求項22の方法。
- 前記放射された光は、酸素含有種、及びフッ素含有種の少なくとも1つから生じる請求項22の方法。
- 前記フッ素含有種は、フッ素である請求項24の方法。
- 前記第2のアッシングステップの長さは、前記第1のアッシングステップの長さの50%から200%の間である請求項1の方法。
- 前記プロセスガスの流量は、20sccmから1000sccmの間である請求項1の方法。
- 前記水素含有ガスの流量は、20sccmから1000sccmの間である請求項1の
方法。 - 前記プロセスガスの流量は、20sccmから1000sccmの間である請求項4の方法。
- 前記プロセスガスの流量は、20sccmから1000sccmの間である請求項6の方法。
- 前記第1のアッシングステップでの前記プロセスガスの流量は、20sccmから1000sccmの間である請求項1の方法。
- 前記第2のアッシングステップでの前記プロセスガスの流量は、20sccmから1000sccmの間である請求項1の方法。
- 前記プロセスガスの中の異なるガスの流量比率は、前記第1と第2とのアッシングステップの間で変化する請求項1の方法。
- 前記プロセスチャンバの圧力は、20mTorrから1000mTorrの間である請求項1の方法。
- 前記第1のアッシングステップでの前記プロセスチャンバの圧力は、20mTorrから1000mTorrの間である請求項1の方法。
- 前記第2のアッシングステップでの前記プロセスチャンバの圧力は、20mTorrから1000mTorrの間である請求項1の方法。
- 前記プロセスチャンバの圧力は、前記第1と第2とのアッシングステップの間で変化する請求項1の方法。
Applications Claiming Priority (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US37244602P | 2002-04-16 | 2002-04-16 | |
US10/259,381 US6849559B2 (en) | 2002-04-16 | 2002-09-30 | Method for removing photoresist and etch residues |
PCT/US2003/000031 WO2003090267A1 (en) | 2002-04-16 | 2003-01-17 | Method for removing photoresist and etch residues |
Publications (3)
Publication Number | Publication Date |
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JP2005523585A JP2005523585A (ja) | 2005-08-04 |
JP2005523585A5 JP2005523585A5 (ja) | 2006-01-05 |
JP4422493B2 true JP4422493B2 (ja) | 2010-02-24 |
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Application Number | Title | Priority Date | Filing Date |
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JP2003586925A Expired - Fee Related JP4422493B2 (ja) | 2002-04-16 | 2003-01-17 | フォトレジストおよびエッチング残渣の除去方法 |
Country Status (7)
Country | Link |
---|---|
US (1) | US6849559B2 (ja) |
JP (1) | JP4422493B2 (ja) |
KR (1) | KR100702290B1 (ja) |
CN (1) | CN100388429C (ja) |
AU (1) | AU2003262407A1 (ja) |
TW (1) | TWI248127B (ja) |
WO (1) | WO2003090267A1 (ja) |
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CN114823297B (zh) * | 2022-04-19 | 2023-01-31 | 度亘激光技术(苏州)有限公司 | 光刻胶去除工艺及半导体制造工艺 |
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JP3122618B2 (ja) * | 1996-08-23 | 2001-01-09 | 東京エレクトロン株式会社 | プラズマ処理装置 |
WO1999026277A1 (en) * | 1997-11-17 | 1999-05-27 | Mattson Technology, Inc. | Systems and methods for plasma enhanced processing of semiconductor wafers |
JP3102409B2 (ja) * | 1998-04-30 | 2000-10-23 | 日本電気株式会社 | 配線の形成方法及びプラズマアッシング装置 |
US6380096B2 (en) | 1998-07-09 | 2002-04-30 | Applied Materials, Inc. | In-situ integrated oxide etch process particularly useful for copper dual damascene |
US6168726B1 (en) * | 1998-11-25 | 2001-01-02 | Applied Materials, Inc. | Etching an oxidized organo-silane film |
US6406836B1 (en) | 1999-03-22 | 2002-06-18 | Axcelis Technologies, Inc. | Method of stripping photoresist using re-coating material |
TW512448B (en) * | 1999-05-11 | 2002-12-01 | Applied Materials Inc | Sequential sputter and reactive precleans of vias and contacts |
US6492222B1 (en) | 1999-12-22 | 2002-12-10 | Texas Instruments Incorporated | Method of dry etching PZT capacitor stack to form high-density ferroelectric memory devices |
US6489030B1 (en) * | 2000-04-14 | 2002-12-03 | Honeywell International, Inc. | Low dielectric constant films used as copper diffusion barrier |
US6426304B1 (en) * | 2000-06-30 | 2002-07-30 | Lam Research Corporation | Post etch photoresist strip with hydrogen for organosilicate glass low-κ etch applications |
US6440864B1 (en) * | 2000-06-30 | 2002-08-27 | Applied Materials Inc. | Substrate cleaning process |
US6562700B1 (en) * | 2001-05-31 | 2003-05-13 | Lsi Logic Corporation | Process for removal of resist mask over low k carbon-doped silicon oxide dielectric material of an integrated circuit structure, and removal of residues from via etch and resist mask removal |
US6573175B1 (en) * | 2001-11-30 | 2003-06-03 | Micron Technology, Inc. | Dry low k film application for interlevel dielectric and method of cleaning etched features |
-
2002
- 2002-09-30 US US10/259,381 patent/US6849559B2/en not_active Expired - Lifetime
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2003
- 2003-01-17 CN CNB038112418A patent/CN100388429C/zh not_active Expired - Fee Related
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- 2003-01-17 JP JP2003586925A patent/JP4422493B2/ja not_active Expired - Fee Related
- 2003-01-17 WO PCT/US2003/000031 patent/WO2003090267A1/en active Search and Examination
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TWI248127B (en) | 2006-01-21 |
WO2003090267A1 (en) | 2003-10-30 |
KR20050000386A (ko) | 2005-01-03 |
AU2003262407A1 (en) | 2003-11-03 |
US6849559B2 (en) | 2005-02-01 |
JP2005523585A (ja) | 2005-08-04 |
TW200402791A (en) | 2004-02-16 |
CN100388429C (zh) | 2008-05-14 |
CN1653593A (zh) | 2005-08-10 |
US20030194876A1 (en) | 2003-10-16 |
KR100702290B1 (ko) | 2007-03-30 |
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