JP4400506B2 - 半導体装置及びその製造方法、並びに、回路基板の接続方法 - Google Patents
半導体装置及びその製造方法、並びに、回路基板の接続方法 Download PDFInfo
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- JP4400506B2 JP4400506B2 JP2005131020A JP2005131020A JP4400506B2 JP 4400506 B2 JP4400506 B2 JP 4400506B2 JP 2005131020 A JP2005131020 A JP 2005131020A JP 2005131020 A JP2005131020 A JP 2005131020A JP 4400506 B2 JP4400506 B2 JP 4400506B2
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
- H01L25/03—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes
- H01L25/04—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers
- H01L25/065—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L27/00
- H01L25/0657—Stacked arrangements of devices
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/93—Batch processes
- H01L24/95—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips
- H01L24/97—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips the devices being connected to a common substrate, e.g. interposer, said common substrate being separable into individual assemblies after connecting
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
- H01L25/50—Multistep manufacturing processes of assemblies consisting of devices, each device being of a type provided for in group H01L27/00 or H01L29/00
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
- H01L2224/321—Disposition
- H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/32225—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2225/00—Details relating to assemblies covered by the group H01L25/00 but not provided for in its subgroups
- H01L2225/03—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00
- H01L2225/04—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices not having separate containers
- H01L2225/065—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices not having separate containers the devices being of a type provided for in group H01L27/00
- H01L2225/06503—Stacked arrangements of devices
- H01L2225/06517—Bump or bump-like direct electrical connections from device to substrate
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2225/00—Details relating to assemblies covered by the group H01L25/00 but not provided for in its subgroups
- H01L2225/03—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00
- H01L2225/04—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices not having separate containers
- H01L2225/065—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices not having separate containers the devices being of a type provided for in group H01L27/00
- H01L2225/06503—Stacked arrangements of devices
- H01L2225/0652—Bump or bump-like direct electrical connections from substrate to substrate
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2225/00—Details relating to assemblies covered by the group H01L25/00 but not provided for in its subgroups
- H01L2225/03—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00
- H01L2225/04—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices not having separate containers
- H01L2225/065—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices not having separate containers the devices being of a type provided for in group H01L27/00
- H01L2225/06503—Stacked arrangements of devices
- H01L2225/06572—Auxiliary carrier between devices, the carrier having an electrical connection structure
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2225/00—Details relating to assemblies covered by the group H01L25/00 but not provided for in its subgroups
- H01L2225/03—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00
- H01L2225/04—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices not having separate containers
- H01L2225/065—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices not having separate containers the devices being of a type provided for in group H01L27/00
- H01L2225/06503—Stacked arrangements of devices
- H01L2225/06579—TAB carriers; beam leads
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/151—Die mounting substrate
- H01L2924/153—Connection portion
- H01L2924/1531—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface
- H01L2924/15311—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface being a ball array, e.g. BGA
Description
110 主インターポーザ
111 主インターポーザの内部端子
120,130,140,150 副インターポーザ
121,131,141,151 半導体チップ
121a,131a,141a,151a 半導体チップの電極
122,132,142,152 副インターポーザの内部端子
123 配線部
160 封止材
170 接着材
180 基板
181 主インターポーザとなる領域
182,192 位置決め穴
183 突起
184,194 穴
190 フレキシブルテープ
191 副インターポーザとなる領域
193 スリット
199 切断片
200 治具
201,202 位置決めピン
210 超音波ツール
300 マザーボード
301,311 端子
302 突起
310 カメラモジュール
312 位置決め穴
Claims (10)
- いずれも一方の面に内部端子が設けられた第1及び第2のインターポーザと、前記第1のインターポーザと前記第2のインターポーザとの間に配置された半導体チップとを備え、
前記半導体チップの裏面は、前記第1のインターポーザの前記一方の面に固定され、
前記半導体チップの主面は、前記第2のインターポーザの前記一方の面に固定され、
前記第1のインターポーザの前記一方の面に設けられた前記内部端子と、前記第2のインターポーザの前記一方の面に設けられた前記内部端子とが接合され、
前記第1及び第2のインターポーザに設けられた前記内部端子は、それぞれ前記第1及び第2のインターポーザの一辺に沿って一列に配置されていることを特徴とする半導体装置。 - 前記第1のインターポーザはリジッドなインターポーザであり、前記第2のインターポーザはフレキシブルなインターポーザであることを特徴とする請求項1に記載の半導体装置。
- 前記第1のインターポーザの他方の面に外部端子が設けられていることを特徴とする請求項1又は2に記載の半導体装置。
- 前記第1及び第2のインターポーザは、いずれも不透明或いは半透明であることを特徴とする請求項1乃至3のいずれか1項に記載の半導体装置。
- 前記半導体チップと前記第1のインターポーザとは接着材によって固定され、前記半導体チップと前記第2のインターポーザと封止材によって固定されていることを特徴とする請求項1乃至4のいずれか1項に記載の半導体装置。
- いずれも一方の面に内部端子が設けられた第1、第2及び第3のインターポーザと、前記第1のインターポーザと前記第2のインターポーザとの間に配置された第1の半導体チップと、前記第2のインターポーザと前記第3のインターポーザとの間に配置された第2の半導体チップとを備え、
前記第1の半導体チップの裏面は、前記第1のインターポーザの前記一方の面に固定され、
前記第1の半導体チップの主面は、前記第2のインターポーザの前記一方の面に固定され、
前記第2の半導体チップの裏面は、前記第2のインターポーザの他方の面に固定され、
前記第2の半導体チップの主面は、前記第3のインターポーザの前記一方の面に固定され、
前記第1のインターポーザの前記一方の面に設けられた前記内部端子と、前記第2のインターポーザの前記一方の面に設けられた前記内部端子とが接合し、
更に、前記第1のインターポーザの前記一方の面に設けられた前記内部端子と、前記第3のインターポーザの前記一方の面に設けられた前記内部端子も接合していることを特徴とする半導体装置。 - 前記第1のインターポーザはリジッドなインターポーザであり、前記第2のインターポーザはフレキシブルなインターポーザであることを特徴とする請求項6に記載の半導体装置。
- 前記第1のインターポーザの他方の面に外部端子が設けられていることを特徴とする請求項6又は7に記載の半導体装置。
- 前記第1及び第2のインターポーザは、いずれも不透明或いは半透明であることを特徴とする請求項6乃至8のいずれか1項に記載の半導体装置。
- 前記第1の半導体チップと前記第1のインターポーザとは接着材によって固定され、前記第1の半導体チップと前記第2のインターポーザと封止材によって固定されていることを特徴とする請求項6乃至9のいずれか1項に記載の半導体装置。
Priority Applications (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2005131020A JP4400506B2 (ja) | 2005-04-28 | 2005-04-28 | 半導体装置及びその製造方法、並びに、回路基板の接続方法 |
US11/412,977 US7615870B2 (en) | 2005-04-28 | 2006-04-28 | Semiconductor device, manufacturing method thereof, and connection method of circuit board |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2005131020A JP4400506B2 (ja) | 2005-04-28 | 2005-04-28 | 半導体装置及びその製造方法、並びに、回路基板の接続方法 |
Publications (2)
Publication Number | Publication Date |
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JP2006310523A JP2006310523A (ja) | 2006-11-09 |
JP4400506B2 true JP4400506B2 (ja) | 2010-01-20 |
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JP2005131020A Expired - Fee Related JP4400506B2 (ja) | 2005-04-28 | 2005-04-28 | 半導体装置及びその製造方法、並びに、回路基板の接続方法 |
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US (1) | US7615870B2 (ja) |
JP (1) | JP4400506B2 (ja) |
Families Citing this family (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2008192651A (ja) * | 2007-01-31 | 2008-08-21 | Elpida Memory Inc | 半導体素子ユニットとその複合体及び半導体装置とそのモジュール並びにそれらの組立構造とフィルム基板の接続構造 |
JP2009194143A (ja) * | 2008-02-14 | 2009-08-27 | Elpida Memory Inc | 半導体装置 |
US9082885B2 (en) | 2013-05-30 | 2015-07-14 | Samsung Electronics Co., Ltd. | Semiconductor chip bonding apparatus and method of forming semiconductor device using the same |
CN105378921A (zh) | 2013-07-10 | 2016-03-02 | 日立汽车系统株式会社 | 功率半导体模块 |
Family Cites Families (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2000208698A (ja) * | 1999-01-18 | 2000-07-28 | Toshiba Corp | 半導体装置 |
CN100401517C (zh) * | 2000-07-19 | 2008-07-09 | 新藤电子工业株式会社 | 半导体装置 |
JP2002076240A (ja) | 2000-08-23 | 2002-03-15 | Sony Corp | 半導体集積回路装置及びその製造方法 |
JP2004014605A (ja) | 2002-06-04 | 2004-01-15 | Renesas Technology Corp | 半導体装置及びその製造方法 |
JP4324773B2 (ja) | 2003-09-24 | 2009-09-02 | セイコーエプソン株式会社 | 半導体装置の製造方法 |
KR100575590B1 (ko) * | 2003-12-17 | 2006-05-03 | 삼성전자주식회사 | 열방출형 적층 패키지 및 그들이 실장된 모듈 |
JP4237160B2 (ja) * | 2005-04-08 | 2009-03-11 | エルピーダメモリ株式会社 | 積層型半導体装置 |
-
2005
- 2005-04-28 JP JP2005131020A patent/JP4400506B2/ja not_active Expired - Fee Related
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2006
- 2006-04-28 US US11/412,977 patent/US7615870B2/en not_active Expired - Fee Related
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Publication number | Publication date |
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US7615870B2 (en) | 2009-11-10 |
US20060244121A1 (en) | 2006-11-02 |
JP2006310523A (ja) | 2006-11-09 |
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