JP4326988B2 - 薄膜トランジスタ表示板の製造方法 - Google Patents
薄膜トランジスタ表示板の製造方法 Download PDFInfo
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- JP4326988B2 JP4326988B2 JP2004073373A JP2004073373A JP4326988B2 JP 4326988 B2 JP4326988 B2 JP 4326988B2 JP 2004073373 A JP2004073373 A JP 2004073373A JP 2004073373 A JP2004073373 A JP 2004073373A JP 4326988 B2 JP4326988 B2 JP 4326988B2
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- 239000010409 thin film Substances 0.000 title claims description 23
- 238000000034 method Methods 0.000 title claims description 14
- 238000004519 manufacturing process Methods 0.000 title claims description 13
- 239000010408 film Substances 0.000 claims description 58
- 229910021420 polycrystalline silicon Inorganic materials 0.000 claims description 19
- 239000004065 semiconductor Substances 0.000 claims description 16
- 230000001681 protective effect Effects 0.000 claims description 14
- 239000012535 impurity Substances 0.000 claims description 10
- 239000000758 substrate Substances 0.000 claims description 10
- 229920002120 photoresistant polymer Polymers 0.000 claims description 9
- 230000003287 optical effect Effects 0.000 claims description 2
- 238000000059 patterning Methods 0.000 claims description 2
- 239000010410 layer Substances 0.000 description 30
- 238000003860 storage Methods 0.000 description 13
- 239000003990 capacitor Substances 0.000 description 11
- 229910021417 amorphous silicon Inorganic materials 0.000 description 9
- 229910052751 metal Inorganic materials 0.000 description 6
- 239000002184 metal Substances 0.000 description 6
- 239000004020 conductor Substances 0.000 description 4
- 238000010586 diagram Methods 0.000 description 3
- VYZAMTAEIAYCRO-UHFFFAOYSA-N Chromium Chemical compound [Cr] VYZAMTAEIAYCRO-UHFFFAOYSA-N 0.000 description 2
- ZOKXTWBITQBERF-UHFFFAOYSA-N Molybdenum Chemical compound [Mo] ZOKXTWBITQBERF-UHFFFAOYSA-N 0.000 description 2
- 229910052581 Si3N4 Inorganic materials 0.000 description 2
- 229910052782 aluminium Inorganic materials 0.000 description 2
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 2
- 229910052804 chromium Inorganic materials 0.000 description 2
- 239000011651 chromium Substances 0.000 description 2
- 238000000151 deposition Methods 0.000 description 2
- 238000010438 heat treatment Methods 0.000 description 2
- 150000002500 ions Chemical class 0.000 description 2
- 229910052750 molybdenum Inorganic materials 0.000 description 2
- 239000011733 molybdenum Substances 0.000 description 2
- 238000001259 photo etching Methods 0.000 description 2
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 description 2
- 239000002356 single layer Substances 0.000 description 2
- 238000004544 sputter deposition Methods 0.000 description 2
- ZOXJGFHDIHLPTG-UHFFFAOYSA-N Boron Chemical compound [B] ZOXJGFHDIHLPTG-UHFFFAOYSA-N 0.000 description 1
- OAICVXFJPJFONN-UHFFFAOYSA-N Phosphorus Chemical compound [P] OAICVXFJPJFONN-UHFFFAOYSA-N 0.000 description 1
- 229910004205 SiNX Inorganic materials 0.000 description 1
- 229910004298 SiO 2 Inorganic materials 0.000 description 1
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 1
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 1
- 238000004380 ashing Methods 0.000 description 1
- 229910052796 boron Inorganic materials 0.000 description 1
- AMGQUBHHOARCQH-UHFFFAOYSA-N indium;oxotin Chemical compound [In].[Sn]=O AMGQUBHHOARCQH-UHFFFAOYSA-N 0.000 description 1
- 239000004973 liquid crystal related substance Substances 0.000 description 1
- 239000000463 material Substances 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 229910052698 phosphorus Inorganic materials 0.000 description 1
- 239000011574 phosphorus Substances 0.000 description 1
- 238000000206 photolithography Methods 0.000 description 1
- 229920005591 polysilicon Polymers 0.000 description 1
- 229910052710 silicon Inorganic materials 0.000 description 1
- 239000010703 silicon Substances 0.000 description 1
- 229910052814 silicon oxide Inorganic materials 0.000 description 1
- 230000001502 supplementing effect Effects 0.000 description 1
- 238000002834 transmittance Methods 0.000 description 1
- 238000007740 vapor deposition Methods 0.000 description 1
- YVTHLONGBIQYBO-UHFFFAOYSA-N zinc indium(3+) oxygen(2-) Chemical compound [O--].[Zn++].[In+3] YVTHLONGBIQYBO-UHFFFAOYSA-N 0.000 description 1
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Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/786—Thin film transistors, i.e. transistors with a channel being at least partly a thin film
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
- H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body
- H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
- H01L27/1259—Multistep manufacturing methods
- H01L27/127—Multistep manufacturing methods with a particular formation, treatment or patterning of the active layer specially adapted to the circuit arrangement
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
- H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body
- H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
- H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body
- H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
- H01L27/1259—Multistep manufacturing methods
- H01L27/1288—Multistep manufacturing methods employing particular masking sequences or specially adapted masks, e.g. half-tone mask
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
- H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body
- H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
- H01L27/1255—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs integrated with passive devices, e.g. auxiliary capacitors
Description
121 ゲート線
123 ゲート電極
140 ゲート絶縁膜
154 半導体層
163 ソース部抵抗性接触領域
165 ドレーン部抵抗性接触領域
171 データ線
173 ソース電極
175 ドレーン電極
180 保護膜
181、182 接触孔
190 画素電極
Claims (3)
- 絶縁基板上にゲート線及びゲート電極を形成する段階と、
前記ゲート線及びゲート電極上に、ゲート絶縁膜と多結晶シリコン層とを形成する段階と、
前記多結晶シリコン層上に第1厚さ領域及び前記第1厚さ領域より厚い第2厚さ領域を有する感光膜パターンを形成する段階と、
前記感光膜パターンをマスクとして前記多結晶シリコン層をパターニングして半導体層を形成する段階と、
前記第1厚さ領域の感光膜パターンを除去する段階と、
前記第2厚さ領域の感光膜パターンをマスクとして導電型不純物をドーピングし、前記半導体層の上部にソース部及びドレーン部抵抗性接触領域を形成する段階と、
前記第2厚さ領域の感光膜パターンを除去する段階と、
前記ゲート線と交差するデータ線と連結されて前記ソース部抵抗性接触領域と一部分が重なるソース電極、及び、前記ソース電極と対向して前記ドレーン部抵抗性接触領域上に形成されているドレーン電極を形成する段階と、
前記データ線、ソース電極及びドレーン電極上に前記ドレーン電極を露出する接触孔を有する保護膜を形成する段階と、
前記保護膜上に前記接触孔を通じて前記ドレーン電極と連結される画素電極を形成する段階と、
を含む薄膜トランジスタ表示板の製造方法。 - 前記感光膜パターンを形成する段階は、
前記多結晶シリコン層上に感光膜を形成する段階と、
前記感光膜を光マスクを通じて露光及び現像する段階とを含み、
前記光マスクは前記第1厚さ領域と対応するスリットパターンまたは半透明膜を有する請求項1記載の薄膜トランジスタ表示板の製造方法。 - 前記導電型不純物はP型不純物を使用する請求項1に記載の薄膜トランジスタ表示板の製造方法。
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR1020030015773A KR100935671B1 (ko) | 2003-03-13 | 2003-03-13 | 박막 트랜지스터 표시판 및 그의 제조 방법 |
Publications (2)
Publication Number | Publication Date |
---|---|
JP2004282079A JP2004282079A (ja) | 2004-10-07 |
JP4326988B2 true JP4326988B2 (ja) | 2009-09-09 |
Family
ID=32960219
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2004073373A Expired - Fee Related JP4326988B2 (ja) | 2003-03-13 | 2004-03-15 | 薄膜トランジスタ表示板の製造方法 |
Country Status (5)
Country | Link |
---|---|
US (1) | US6870187B2 (ja) |
JP (1) | JP4326988B2 (ja) |
KR (1) | KR100935671B1 (ja) |
CN (1) | CN100543927C (ja) |
TW (1) | TWI352841B (ja) |
Families Citing this family (10)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR20040084488A (ko) * | 2003-03-28 | 2004-10-06 | 삼성전자주식회사 | 박막 트랜지스터 표시판 및 이를 포함하는 액정 표시 장치 |
US7071045B2 (en) * | 2004-05-06 | 2006-07-04 | Chunghwa Picture Tubes, Ltd. | Process of manufacturing thin film transistor |
JP5023465B2 (ja) * | 2005-10-20 | 2012-09-12 | カシオ計算機株式会社 | 薄膜トランジスタパネル |
KR101230305B1 (ko) | 2005-12-08 | 2013-02-06 | 삼성디스플레이 주식회사 | 박막 트랜지스터 표시판 및 그 제조 방법 |
KR20080019398A (ko) | 2006-08-28 | 2008-03-04 | 삼성전자주식회사 | 박막 트랜지스터 표시판 및 그 제조 방법 |
KR101570482B1 (ko) * | 2009-10-15 | 2015-11-20 | 삼성디스플레이 주식회사 | 박막 트랜지스터 표시판 및 그 제조 방법 |
CN105989350B (zh) * | 2015-03-05 | 2019-11-22 | 上海箩箕技术有限公司 | 像素单元、结构、结构阵列、读出电路及控制方法 |
KR102293595B1 (ko) * | 2015-03-24 | 2021-08-25 | 삼성디스플레이 주식회사 | 박막 트랜지스터 표시판 및 그 제조 방법 |
CN107221503A (zh) * | 2017-06-02 | 2017-09-29 | 京东方科技集团股份有限公司 | 一种薄膜晶体管的制作方法、薄膜晶体管及显示基板 |
CN109643657B (zh) * | 2017-06-22 | 2022-08-16 | 深圳市柔宇科技股份有限公司 | 阵列基板的制作设备及阵列基板的制作方法 |
Family Cites Families (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH09127707A (ja) * | 1995-10-30 | 1997-05-16 | Casio Comput Co Ltd | レジストパターンの形成方法 |
JP3410617B2 (ja) | 1996-11-29 | 2003-05-26 | シャープ株式会社 | 薄膜のパターニング方法 |
US6403980B1 (en) * | 1999-11-05 | 2002-06-11 | Samsung Electronics Co., Ltd. | Thin film transistor array panel for liquid crystal display |
JP2002141512A (ja) | 2000-11-06 | 2002-05-17 | Advanced Display Inc | 薄膜のパターニング方法およびそれを用いたtftアレイ基板およびその製造方法 |
KR20030093519A (ko) * | 2002-06-03 | 2003-12-11 | 삼성전자주식회사 | 액정 표시 장치용 박막 트랜지스터 어레이 기판 |
-
2003
- 2003-03-13 KR KR1020030015773A patent/KR100935671B1/ko not_active IP Right Cessation
-
2004
- 2004-03-12 US US10/800,180 patent/US6870187B2/en not_active Expired - Fee Related
- 2004-03-15 TW TW093106835A patent/TWI352841B/zh not_active IP Right Cessation
- 2004-03-15 CN CNB2004100477110A patent/CN100543927C/zh not_active Expired - Lifetime
- 2004-03-15 JP JP2004073373A patent/JP4326988B2/ja not_active Expired - Fee Related
Also Published As
Publication number | Publication date |
---|---|
US6870187B2 (en) | 2005-03-22 |
TW200502632A (en) | 2005-01-16 |
CN100543927C (zh) | 2009-09-23 |
KR100935671B1 (ko) | 2010-01-07 |
CN1540717A (zh) | 2004-10-27 |
TWI352841B (en) | 2011-11-21 |
JP2004282079A (ja) | 2004-10-07 |
US20040180479A1 (en) | 2004-09-16 |
KR20040080793A (ko) | 2004-09-20 |
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