JP4207917B2 - 多層構造基板の製造方法 - Google Patents
多層構造基板の製造方法 Download PDFInfo
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- JP4207917B2 JP4207917B2 JP2005105765A JP2005105765A JP4207917B2 JP 4207917 B2 JP4207917 B2 JP 4207917B2 JP 2005105765 A JP2005105765 A JP 2005105765A JP 2005105765 A JP2005105765 A JP 2005105765A JP 4207917 B2 JP4207917 B2 JP 4207917B2
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- insulating
- pattern
- conductive
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- subpattern
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
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- H05K1/18—Printed circuits structurally associated with non-printed electric components
- H05K1/182—Printed circuits structurally associated with non-printed electric components associated with components mounted in the printed circuit board, e.g. insert mounted components [IMC]
- H05K1/185—Components encapsulated in the insulating substrate of the printed circuit or incorporated in internal layers of a multilayer circuit
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- B—PERFORMING OPERATIONS; TRANSPORTING
- B24—GRINDING; POLISHING
- B24B—MACHINES, DEVICES, OR PROCESSES FOR GRINDING OR POLISHING; DRESSING OR CONDITIONING OF ABRADING SURFACES; FEEDING OF GRINDING, POLISHING, OR LAPPING AGENTS
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- B24B31/023—Machines or devices designed for polishing or abrading surfaces on work by means of tumbling apparatus or other apparatus in which the work and/or the abrasive material is loose; Accessories therefor involving rotary barrels with tiltable axis
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- B—PERFORMING OPERATIONS; TRANSPORTING
- B24—GRINDING; POLISHING
- B24B—MACHINES, DEVICES, OR PROCESSES FOR GRINDING OR POLISHING; DRESSING OR CONDITIONING OF ABRADING SURFACES; FEEDING OF GRINDING, POLISHING, OR LAPPING AGENTS
- B24B7/00—Machines or devices designed for grinding plane surfaces on work, including polishing plane glass surfaces; Accessories therefor
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- B24B7/22—Machines or devices designed for grinding plane surfaces on work, including polishing plane glass surfaces; Accessories therefor characterised by a special design with respect to properties of the material of non-metallic articles to be ground for grinding inorganic material, e.g. stone, ceramics, porcelain
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- H01L2924/1904—Component type
- H01L2924/19043—Component type being a resistor
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/30—Technical effects
- H01L2924/301—Electrical effects
- H01L2924/30107—Inductance
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
- H05K2203/01—Tools for processing; Objects used during processing
- H05K2203/0104—Tools for processing; Objects used during processing for patterning or coating
- H05K2203/013—Inkjet printing, e.g. for printing insulating material or resist
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/10—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern
- H05K3/12—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern using thick film techniques, e.g. printing techniques to apply the conductive material or similar techniques for applying conductive paste or ink patterns
- H05K3/1241—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern using thick film techniques, e.g. printing techniques to apply the conductive material or similar techniques for applying conductive paste or ink patterns by ink-jet printing or drawing by dispensing
- H05K3/125—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern using thick film techniques, e.g. printing techniques to apply the conductive material or similar techniques for applying conductive paste or ink patterns by ink-jet printing or drawing by dispensing by ink-jet printing
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/46—Manufacturing multilayer circuits
- H05K3/4644—Manufacturing multilayer circuits by building the multilayer layer by layer, i.e. build-up multilayer circuits
- H05K3/4664—Adding a circuit layer by thick film methods, e.g. printing techniques or by other techniques for making conductive patterns by using pastes, inks or powders
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- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Production Of Multi-Layered Print Wiring Board (AREA)
- Manufacturing Of Printed Wiring (AREA)
Description
まず、図5(a)に示すように、ベース層5の表面を一様に親液化する。具体的には、ベース層5に、紫外域の波長の光を所定期間に亘って照射する。本実施例では、ベース層5に172nmの波長の光を約60秒間照射する。そうすると、ベース層5の表面は、後述する絶縁材料111Aに対して、一様に親液性を呈するようになる。なお、ベース層5の表面はほぼ平坦な面である。
まず、図5(c)から(e)に示すように、インクジェットサブ工程によりベース層5上に、絶縁サブパターン10を形成する。ここで、絶縁サブパターン10の厚さは、電子部品40,41の高さのほぼ半分である。また、絶縁サブパターン10の形状は、ベース層5上の部分であって電子部品40,41が設けられていない部分を覆う形状である。
次に、図6(a)に示すように、インクジェットサブ工程により絶縁サブパターン10上に、絶縁サブパターン11を形成する。絶縁サブパターン11を形成するインクジェットサブ工程は、図5(c)から(e)に示した絶縁サブパターン10の形成工程と基本的に同じなので、その詳細な説明を省略する。
次に、端子40A,40B,41A,41Bのそれぞれの上にビアホールV1を設ける。ここで、これらビアホールV1の外形は、表面S1上に位置する絶縁サブパターン12によって縁取られる。以下に説明するように、本実施例では、このような絶縁サブパターン12を、インクジェットサブ工程により表面S1上に形成する。
4つのビアホールV1を形成した後に、インクジェットサブ工程により4つのビアホールV1内に導電ポスト21A,21B,21C,21Dを設ける。
次に、図8(a)に示すように、インクジェットサブ工程により絶縁サブパターン12上に、導電パターン23A,23Bを形成する。また、インクジェットサブ工程により導電ポスト21D上に導電ポスト23Cを形成する。導電ポスト23Cを形成するインクジェットサブ工程は、実施例2の導電ポストを形成するインクジェットサブ工程と基本的に同じである。
次に、図8(b)に示すように、インクジェットサブ工程により絶縁サブパターン12上に、絶縁サブパターン13を形成する。絶縁サブパターン13は、導電パターン23A,23Bの側面と、導電ポスト23Cの側面と、を囲む形状を有している。また、絶縁サブパターン13の厚さは、導電パターン23A,23Bの厚さとほぼ同じであり、導電ポスト23Cの高さともほぼ同じである。このため、絶縁サブパターン13の表面と、導電パターン23A,23Bの表面と、導電ポスト23Cの表面とは、一つのほぼ平坦な表面を提供する。なお、絶縁サブパターン13を形成するインクジェットサブ工程は、絶縁サブパターン10,11のそれぞれを形成するそれぞれのインクジェットサブ工程と基本的に同じなので、その説明は省略する。
本実施例では、絶縁サブパターン12を形成する前に、インクジェットサブ工程により導電ポスト21A,21B,21C,21Dのそれぞれを形成する。詳細は以下のとおりである。
次に、インクジェットサブ工程により表面S1上に、絶縁パターン12を設ける。詳細は以下のとおりである。
次に、実施例1で説明したように、インクジェットサブ工程により絶縁サブパターン12上に、導電パターン23A,23Bを形成する。また、インクジェットサブ工程により導電ポスト21D上に、導電ポスト23Cを形成する。そして、実施例1で説明したように、インクジェットサブ工程により絶縁サブパターン12上に、絶縁パターン13を形成する。
(1)実施例1および2では、互いに接する導電ポスト21Aと導電パターン23Aとを、インクジェットサブ工程によりそれぞれ別々に形成した。しかしながら、ビアホールV1の深さが比較的に小さい場合には、導電ポスト21Aの形成を省略して、導電パターン23Aが直接に端子40Aに接続されるようにしてもよい。この場合には、実施例1で説明したように、インクジェットサブ工程により絶縁サブパターン11上に、端子40A上でビアホールを縁取る絶縁サブパターン12を形成する。その後、インクジェットサブ工程により端子40A上と絶縁サブパターン12上とに、導電パターン23Aを形成すればよい。
実施例1〜5で説明した多層構造基板の製造方法は、複数の液滴吐出装置によって実現する。液滴吐出装置の数は、上述のインクジェットサブ工程の数と等しくてもよいし、後述する液状材料111の種類の数と等しくてもよい。ここで、複数の液滴吐出装置の構成は、基本的にどれも同じである。そこで、以下では、図16に示す1つの液滴吐出装置100に着目して、その構造と機能とを説明する。
図17(a)および(b)に示すように、液滴吐出装置100におけるヘッド114は、複数のノズル118を有するインクジェットヘッドである。具体的には、ヘッド114は、振動板126と、複数のノズル118と、複数のノズル118のそれぞれの開口を規定するノズルプレート128と、液たまり129と、複数の隔壁122と、複数のキャビティ120と、複数の振動子124と、を備えている。
次に、制御部112の構成を説明する。図18に示すように、制御部112は、入力バッファメモリ200と、記憶装置202と、処理部204と、光源駆動部205と、走査駆動部206と、ヘッド駆動部208と、を備えている。これら入力バッファメモリ200と、処理部204と、記憶装置202と、光源駆動部205と、走査駆動部206と、ヘッド駆動部208とは、図示しないバスによって相互に通信可能に接続されている。
上述の「液状材料111」とは、ヘッド114のノズル118から液滴Dとして吐出されうる粘度を有する材料をいう。ここで、液状材料111が水性であると油性であるとを問わない。ノズル118から吐出可能な流動性(粘度)を備えていれば十分で、固体物質が混入していても全体として流動体であればよい。ここで、液状材料111の粘度は1mPa・s以上50mPa・s以下であるのが好ましい。粘度が1mPa・s以上である場合には、液状材料111の液滴Dを吐出する際にノズル118の周辺部が液状材料111で汚染されにくい。一方、粘度が50mPa・s以下である場合は、ノズル118における目詰まり頻度が小さく、このため円滑な液滴Dの吐出を実現できる。
上記実施例の導電性材料111Bには、銀のナノ粒子が含まれている。しかしながら、銀のナノ粒子に代えて、他の金属のナノ粒子が用いられてもよい。ここで、他の金属として、例えば、金、白金、銅、パラジウム、ロジウム、オスミウム、ルテニウム、イリジウム、鉄、錫、亜鉛、コバルト、ニッケル、クロム、チタン、タンタル、タングステン、インジウムのいずれか1つが利用されてもよいし、または、いずれか2つ以上が組合せられた合金が利用されてもよい。ただし、銀であれば比較的低温で還元できるため、扱いが容易であり、この点で、液滴吐出装置を利用する場合には、銀のナノ粒子を含む導電性材料111Bを利用することは好ましい。
実施例6において述べたように、導電性材料111Bにおける銀のナノ粒子は、有機物などのコーティング剤で被覆されてもよい。このようなコーティング剤として、アミン、アルコール、チオールなどが知られている。より具体的には、コーティング剤として、2−メチルアミノエタノール、ジエタノールアミン、ジエチルメチルアミン、2−ジメチルアミノエタノール、メチルジエタノールアミンなどのアミン化合物、アルキルアミン類、エチレンジアミン、アルキルアルコール類、エチレングリコール、プロピレングリコール、アルキルチオール類、エタンジチオールなどがある。コーティング剤で被覆された銀のナノ粒子は、分散媒中でより安定して分散され得る。
上記実施例によれば、紫外域の波長の光を照射して、ベース層5の表面、および絶縁サブパターン10,11などの表面を親液化した。しかしながら、このような親液化に代えて、大気雰囲気中で酸素を処理ガスとするO2プラズマ処理を施しても、これらの表面を親液化できる。O2プラズマ処理は、物体表面に対して、図示しないプラズマ放電電極からプラズマ状態の酸素を照射する処理である。O2プラズマ処理の条件は、プラズマパワーが50〜1000W、酸素ガス流量が50〜100mL/min、プラズマ放電電極に対する物体表面の相対移動速度が0.5〜10mm/sec、物体表面の温度が70〜90℃であればよい。
上記実施例では、多層構造基板の製造方法が、複数の液滴吐出装置によって実現する。ただし、多層構造基板の製造方法において利用される液滴吐出装置の数は1つだけでもよい。液滴吐出装置の数が1つの場合には、1つの液滴吐出装置において、ヘッド114ごとに異なる液状材料111を吐出すればよい。
上記実施例では、絶縁材料111Aは、光重合開始剤と、アクリル酸のモノマーおよび/またはオリゴマ−と、を含んでいる。ただし、アクリル酸のモノマーおよび/またはオリゴマーに代えて、絶縁材料111Aが、光重合開始剤と、ビニル基、エポキシ基等の重合性官能基を有するモノマーおよび/またはオリゴマ−と、を含んでいてもよい。
Claims (2)
- 基板の表面上に、電子部品を該電子部品の端子の少なくとも一部が上側を向くように配置し、前記電子部品の厚さに起因する段差を埋めるインクジェット工程を含む多層構造基板の製造方法であって、
前記電子部品を除く領域に、第1の絶縁パターンを設ける第1インクジェット工程と、
前記端子の一部に、導電ポストを形成する第2インクジェット工程と、
前記導電ポストを除く領域に、第2の絶縁パターンを設ける第3インクジェット工程と、
前記導電ポストを覆う導電パターンを形成する第4のインクジェット工程と、
前記導電パターンを除く領域に、前記導電パターンの上部表面レベルに一致するように、第3の絶縁パターンを形成する第5のインクジェット工程とを含み、
第2の絶縁パターンを形成する絶縁材料の材料パターンを、前記導電ポストと接しないように配置したことを特徴とする多層基板の製造方法。 - 請求項1記載の多層構造基板の製造方法であって、
前記第1のインクジェット工程は、互いに積層された二層以上の絶縁パターンを形成することを特徴とする多層構造基板の製造方法。
Priority Applications (6)
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JP2005105765A JP4207917B2 (ja) | 2005-04-01 | 2005-04-01 | 多層構造基板の製造方法 |
KR1020060028994A KR100798824B1 (ko) | 2005-04-01 | 2006-03-30 | 다층 구조 기판의 제조 방법 |
CNA2006100710538A CN1842255A (zh) | 2005-04-01 | 2006-03-31 | 多层构造基板的制造方法 |
TW095111376A TWI304377B (en) | 2005-04-01 | 2006-03-31 | Method of manufacturing multi-layered substrate |
US11/396,255 US20060240664A1 (en) | 2005-04-01 | 2006-03-31 | Method of manufacturing multi-layered substrate |
KR1020070072649A KR100835621B1 (ko) | 2005-04-01 | 2007-07-20 | 다층 구조 기판의 제조 방법 |
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JP (1) | JP4207917B2 (ja) |
KR (2) | KR100798824B1 (ja) |
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JP4888072B2 (ja) * | 2006-11-16 | 2012-02-29 | セイコーエプソン株式会社 | 電子基板の製造方法 |
JP4211842B2 (ja) | 2006-11-16 | 2009-01-21 | セイコーエプソン株式会社 | 電子基板の製造方法及び多層配線基板の製造方法 |
JP4888073B2 (ja) * | 2006-11-16 | 2012-02-29 | セイコーエプソン株式会社 | 電子基板の製造方法 |
TWI495570B (zh) * | 2009-07-27 | 2015-08-11 | Memjet Technology Ltd | 具背側電連接之噴墨列印頭組件 |
TWI498058B (zh) * | 2010-04-01 | 2015-08-21 | Hon Hai Prec Ind Co Ltd | 電路板及其製作方法 |
JP6304376B2 (ja) * | 2014-06-18 | 2018-04-04 | 株式会社村田製作所 | 部品内蔵多層基板 |
JP6663516B2 (ja) * | 2017-01-24 | 2020-03-11 | 株式会社Fuji | 回路形成方法、および回路形成装置 |
JP6677183B2 (ja) * | 2017-01-25 | 2020-04-08 | オムロン株式会社 | 制御装置 |
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KR100835621B1 (ko) | 2008-06-09 |
KR20070080851A (ko) | 2007-08-13 |
TWI304377B (en) | 2008-12-21 |
CN1842255A (zh) | 2006-10-04 |
KR100798824B1 (ko) | 2008-01-28 |
TW200702189A (en) | 2007-01-16 |
JP2006287008A (ja) | 2006-10-19 |
US20060240664A1 (en) | 2006-10-26 |
KR20060105592A (ko) | 2006-10-11 |
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