JP3768993B2 - Ｄｒａｍ電力管理 - Google Patents
Ｄｒａｍ電力管理 Download PDFInfo
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- JP3768993B2 JP3768993B2 JP2003538872A JP2003538872A JP3768993B2 JP 3768993 B2 JP3768993 B2 JP 3768993B2 JP 2003538872 A JP2003538872 A JP 2003538872A JP 2003538872 A JP2003538872 A JP 2003538872A JP 3768993 B2 JP3768993 B2 JP 3768993B2
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Description
本発明は、コンピュータシステムに関し、特に、コンピュータメモリシステムの電力消費量を管理する方法及びシステムに関する。
コンピュータ及びコンピューティングデバイスの電力消費量は、多くの理由から問題となる。例としては、限られた電源（即ち、バッテリ）を有するポータブルコンピューティングデバイスと、大量のデータを処理すると同時に、処理において大量の電力を消費する大型サーバコンピュータシステムと、コンピューティングデバイスによって電力が消費される際に生成される熱を除去するために必要な冷却とが含まれる。コンピュータによる総電力消費量は、着実に低減されている。一例として、ポータブル「ラップトップ」コンピュータのバッテリは、有限の電源である。ラップトップコンピュータの性能の一態様は、バッテリによってどのくらい長く動作できるかである。大きく重いバッテリは、通常、動作時間を長くできるが、ラップトップは軽量であることによっても評価されるため、バッテリ重量の増加は、通常、敬遠される。そのため、ラップトップコンピュータの電力管理及び効率は、重要な特徴となる。
電力管理の別の例は、サーバコンピュータである。サーバコンピュータは、非常に多くのデータを処理するため、大量の電力を消費する。更に、多数のサーバを組み合わせ、「サーバファーム」として共に機能させる時、電力消費量は、非常に大きくなる。消費された電力の多くは熱に変換されるため、サーバは、通常、空調及び冷房システムによって積極的に冷却され、システムはサーバの全体的な電力消費量を更に増加させる。
コンピュータの電力効率については、様々な方法を通じて取り組まれてきたため、現在では、高効率コンピュータのメモリシステムの電力消費量は、プロセッサ自体の電力消費量を遙かに上回る場合がある。一例として、高効率プロセッサは、およそ４０ワットの電力を消費する。サーバ内のこうした高効率プロセッサは、メモリシステムにおいて、１６以上のＤＲＡＭ（ダイナミックランダムアクセスメモリ）ＤＩＭＭ（デュアルインラインメモリ）を有することができる。それぞれのＤＩＭＭは、最大アクセス（即ち、読み出し／格納）速度において、およそ１４ワットの電力を消費し、結果として、１６のＤＩＭＭでは、最大アクセス速度において、合計２２４ワットの電力消費量が生じる。
しかし、通常の電力使用量は、遙かに低い。通常の電力使用量が低くなる理由は、ＤＩＭＭが常に最大アクセス速度で使用される訳ではないためである。ＤＩＭＭ内のメモリセルで書き込み又は読み出しが行われる度に、少量の電力が消費される。そのため、ＤＩＭＭが所定の時間間隔でアクセスを受ける回数は、ＤＩＭＭの総電力使用量に影響を与える。
図１は、代表的なコンピュータシステム１００の高レベルブロック図である。表示のように、コンピュータシステム１００は、プロセッサ１０２と、ＲＯＭ１０４と、ＲＡＭ１０６とを含み、それぞれがバスシステム１０８に接続される。バスシステム１０８は、この技術で広く知られているような、様々なブリッジ、コントローラ、及び又はアダプタを通じて互いに接続される一つ以上のバスを含んでもよい。例えば、バスシステム１０８は、アダプタを通じて、周辺装置相互接続（ＰＣＩ）バス等の一つ以上の拡張バスに接続される「システムバス」を含んでもよい。更に、バスシステム１０８には、マスストレージデバイス１１０と、ネットワークインタフェース１１２と、多数（Ｎ）の入出力（Ｉ／Ｏ）デバイス１１６−１〜１１６−Ｎとが結合される。
Ｉ／Ｏデバイス１１６−１〜１１６−Ｎは、例えば、キーボード、ポインティングデバイス、ディスプレイデバイス、及び又はその他の従来型のＩ／Ｏデバイスを含んでもよい。マスストレージデバイス１１０は、磁気ディスク又はテープ、光磁気（ＭＯ）記憶デバイス、或いは様々なタイプのデジタル多用途ディスク（ＤＶＤ）又はコンパクトディスク（ＣＤ）に基づくストレージのいずれかといった、大量のデータを格納するのに適切な任意のデバイスを含んでもよい。
ネットワークインタフェース１１２は、コンピュータシステムと、ローカルエリアネットワーク、ワイドエリアネットワーク、インターネット、又はその他のネットワークといったネットワーク上にある他のコンピュータシステムとの間でのデータ通信を提供する。したがって、ネットワークインタフェース１１２は、コンピュータシステム１００がデータ通信リンク上でリモート処理システムとデータ通信するのに最適な、或いはこれを可能にする、従来の電話モデム、統合サービスデジタルネットワーク（ＩＳＤＮ）アダプタ、デジタル加入者回線（ＤＳＬ）アダプタ、ケーブルモデム、衛星トランシーバ、イーサネット（登録商標）アダプタ、又はその他といった、任意のデバイスにしてもよい。
ＲＡＭ１０６は、多数のＤＩＭＭ１０６−１ないし１０６−Ｎを含むことができる。代表的な用途において、ＤＩＭＭの平均アクセス速度は、平均６ワットの電力消費量を発生させる。しかしながら、上記のように、最大アクセス速度により、この電力は、各ＤＩＭＭ１０６−１ないし１０６−Ｎに関して１４ワットの大きさまで増加する可能性がある。
上述したことに鑑みると、必要とされるものは、プロセッサの性能に大きな影響を与えない電源により実現されるような、各ＤＩＭＭの最大電力消費量を低減又は制限するシステム及び方法である
大まかに言って、本発明は、ＤＲＡＭの電力消費量を管理するシステム及び方法を提供することで、こうした必要性を満たす。本発明は、処理、装置、システム、又はデバイスを含め、多数の方法で実施し得ると理解されるべきである。以下、本発明のいくつかの発明実施形態について説明する。
一実施形態は、プロセッサと、メモリシステムと、ＤＲＡＭコントローラと、メモリシステム、プロセッサ、及びＤＲＡＭコントローラを結合するバスとを含んだコンピューティングシステムを含む。このメモリシステムは、少なくとも一つのＤＲＡＭモジュールを含むことができる。ＤＲＡＭコントローラは、ＤＲＡＭモジュールの電力消費率が所望の平均メモリ電力消費率より小さくなるように、或いは等しくなるように、少なくとも一つのＤＲＡＭモジュールに対するアクセス速度（即ち、所定の時間間隔におけるアクセス数）を制限する動作が可能である。
このＤＲＡＭコントローラは、ステートマシンを含むことができる。
このアクセス速度は、現行時間間隔当たりのアクセス数に等しくすることができる。
このコンピュータシステムは、さらに、メモリシステム用の電源を含むことができる。
現行時間間隔の長さは、メモリシステム用の電源の調整時定数より短くすることができる。
本発明の利点の一つは、所望の最大電力消費量より高く、調整時定数より短いＤＲＡＭ出力スパイクを、電源デカップリングキャパシタによって、電源又はプロセッサの動作に影響を与えることなく、供給できることである。
現行時間間隔の長さは、約１０マイクロ秒に等しくすることができる。この現行時間間隔は、現行時間間隔におけるＤＲＡＭアクセス速度が長期的な平均を殆ど上回らない十分な長さとなる。結果として、現行時間間隔におけるＤＲＡＭアクセス数の制限は、プロセッサの性能に対する影響を最小化する。
所望のメモリ電力消費率は、少なくとも一つのＤＲＡＭモジュールの最大電力消費率の約６６パーセントに等しくすることができる。代替として、所望のメモリ電力消費率は、少なくとも一つのＤＲＡＭモジュールのそれぞれに関して、約９ワットに等しくすることができる。
プロセッサは、ＤＲＡＭコントローラを含むことができる。
別の実施形態は、コンピュータメモリシステムの電力消費量を制限する方法を含む。この方法は、メモリアクセス速度を選択する工程を含む。選択したメモリアクセス速度は、所望の平均メモリ電力消費率に対応する。第一の時間間隔が、現行時間間隔として開始される。メモリシステムがアクセスを受ける。メモリアクセス速度を上回らない場合、このアクセスは、メモリシステムに適用される。代替として、メモリアクセス速度を上回る場合、このアクセスは遅延され、現行時間間隔が満了となり、後続の時間間隔が現行時間間隔として開始されてから、このアクセスがメモリシステムに適用される。
メモリシステムにアクセスする工程は、現行時間間隔が満了したかどうかを判断する工程を含むことができる。現行時間間隔が満了しているた場合、後続の時間間隔が現行時間間隔として開始され、このアクセスがメモリシステムに適用される。代替として、現行時間間隔が満了していない場合には、アクセスカウンタが増分される。アクセスカウンタは、ＤＲＡＭコントローラの一部にすることができる。
アクセス速度は、現行時間間隔当たりのアクセス数に等しい。
一実施形態において、メモリアクセス速度を選択する工程は、現行時間間隔の長さを選択する工程を含む。
一実施形態において、ＤＲＡＭコントローラは、メモリシステムへのアクセスを制御する。
本発明は、メモリシステムの性能に大きな影響を与えない電源及び冷却システムによって実現されるような、メモリシステムのワーストケースの電力消費量を大幅に低減する利点を提供する。ワーストケースの電力消費量を低減することで、全体的に小さな電源供給を使用することができる。ワーストケースの電力消費量を低減することで、更に、冷却システム及び方法のピーク需要が低減され、これにより、全体的に小さな冷却システムが可能となる。
本発明のその他の態様及び利点は、本発明の原理を例として示す添付図面と併せて、以下の詳細な説明から明らかになろう。
本発明は、添付図面と併せて、以下の詳細な説明により容易に理解されよう。同様の参照符号は同様の構造要素を指す。
次に、ＤＲＡＭ電力消費量を管理するためのいくつかの例示的実施形態について説明する。本明細書で述べる具体的な詳細の一部又は全部を伴わずに本発明を実施し得ることは当業者には明らかであろう。
上記のように、代表的な用途において、ＤＩＭＭは、通常のアクセス速度で、ＤＩＭＭ毎に平均して約６〜９ワットの電力消費量を発生させる。同じＤＩＭＭは、最大アクセス速度で、１４ワットの大きさの最大電力消費量を有する可能性がある。一実施形態において、ＤＩＭＭの電力消費量を低減するシステム及び方法は、ＤＩＭＭの最大電力消費量が事前に選択した量を上回らないように、所定の時間間隔でのＤＩＭＭに対するアクセス数を制限する方法である。
一実施形態において、アクセス速度は、事前に選択した時間間隔での対応する電力レベルを電力消費量が上回れないように、選択した速度に制限することができる。一例として、対応する電力消費量は、ＤＩＭＭの最大電力消費量の約６６パーセントにすることが可能であり、ＤＩＭＭが最大アクセス速度で約１４ワットを消費する場合には約９ワットにできる。事前に選択した時間間隔は、約１０マイクロ秒にすることができる。そのため、ＤＩＭＭアクセス速度が１０マイクロ秒当たり１，０００アクセスで、ＤＩＭＭの電力消費率が９ワットとなる場合、同じ１０マイクロ秒期間での１，００１及び後続のアクセスは、後続の１０マイクロ秒期間まで遅延されることになる。
熱時定数は１０マイクロ秒より遙かに長く、結果として、冷却システムで見られるＤＩＭＭのピーク電力消費量も約３５％低減可能となり、この低減により、更にコンピュータシステムの冷却要件が低減され、更に電源の電力要件が低減される。
図２は、本発明の一実施形態による、コンピュータシステム２００のブロック図である。コンピュータシステム２００は、プロセッサ１０２と、ＲＯＭ１０４と、ＲＡＭ１０６とを含み、それぞれがバスシステム１０８に接続される。コンピュータシステム２００は、更に、マスストレージデバイス１１０と、ネットワークインタフェース１１２と、多数（Ｎ）の入出力（Ｉ／Ｏ）デバイス１１６−１乃至１１６−Ｎと、電源２２０とを含む。コンピュータシステム２００は、更に、ＲＡＭ１０６へのアクセスを制御するＤＲＡＭコントローラ２３０を含むことができる。ＤＲＡＭコントローラ２３０は、プロセッサ１０２の一部、又はバスシステム１０８の一部、又はＲＡＭ１０６の一部にすることができる。ＤＲＡＭコントローラ２３０は、ステートマシンにすることもできる。
電源２２０は、コンピュータシステム２００の様々な構成要素に電力を供給する。特に、電源２２０は、電源レール２２２を介して、ＤＩＭＭ１０６−１ないし１０６−Ｎに電流を供給する。電源２２０は、一つ以上のデカップリングキャパシタ２２４Ａを含む。ＤＩＭＭ１０６−１ないし１０６−Ｎのそれぞれも、一つ以上のデカップリングキャパシタ２２４Ｂ、２２４Ｃを含むことができる。
通常、電源２２０は、電源２２０が電源レール２２２上の電流需要における変化に応答するのに要する時間である調整時定数を有する。一例として、調整時定数が１０マイクロ秒である場合、電源レール２２２上の電流需要が２００ｍａから３００ｍａに増加したとすると、電源２２０は、１００ｍａの電流の増加（合計３００ｍａ）を電源レール２２２へ伝達する際に、およそ１０マイクロ秒遅れることになる。別の例において、ＤＩＭＭ１０６−１ないし１０６−Ｎでのアクセス数が突然（例えば、５マイクロ秒で）二倍になった場合、ＤＩＭＭ１０６−１ないし１０６−Ｎによる電流引き込みは、同じように突然二倍になる。しかしながら、電源２２０は、電源レール２２２に供給する電流の量を５マイクロ秒で増加させることができないため、様々なデカップリングキャパシタ２２４Ａ、２２４Ｂ、２２４Ｃは、部分的に放電し、電源２２０が電力消費需要を充足できるようになるまで、５マイクロ秒のピーク需要期間に「過剰需要電流」を供給することができる。
代表的な調整時定数は、１０マイクロ秒であるため、デカップリングキャパシタ２２４Ａ、２２４Ｂ、２２４Ｃは、およそ１０マイクロ秒に渡ってピーク電流を供給できるようなサイズとする。
図３は、本発明の一実施形態による、方法の動作３００のフローチャート図である。動作３０２において、ＤＩＭＭアクセス速度（即ち、事前に選択した時間間隔当たりのアクセス）が選択される。ＤＩＭＭアクセス速度は、このアクセス速度に対応する所望の電力消費率を選択することで選択できる。例えば、所定のＤＩＭＭに関して、１０マイクロ秒の各間隔当たり１０００アクセスの場合、ＤＩＭＭは、１０マイクロ秒の各時間間隔に９ワットの電力を消費することになる。したがって、１０マイクロ秒当たり１０００アクセスを選択することは、９ワットの電力消費量に対応することになる。代替として、１０マイクロ秒当たり９ワットの消費率を選択することは、１０マイクロ秒の間隔当たり１０００アクセスに対応することになる。アクセス速度を選択することは、更に、時間間隔を選択することを含む。
選択する時間間隔の長さは、アクセス試行数が選択アクセス速度を上回ることになる間隔がほんの僅かだけ存在するように、依然として十分な長さで、相対的に短い時間間隔となるように選択される。選択する時間間隔が十分に長く、実際に遅延されるアクセスが僅かしかないため、プロセッサに対する大きな性能上の影響は存在しないことになる。一実施形態において、１０マイクロ秒の時間間隔が採用されるのは、１０マイクロ秒が、上記のように、代表的な電源の調整時定数にもなるためである。本明細書では１０マイクロ秒の時間間隔について説明したが、これより短い又は長い時間間隔も使用できると理解するべきである。
動作３０４では、最初の時間間隔が開始される。事前に選択された時間間隔の長さを有するタイマを使用して、時間間隔をモニタすることができる。プロセッサ１０２は、動作３０６において、ＤＩＭＭにアクセスする。一実施形態では、ＤＲＡＭコントローラ２３０が、プロセッサのＤＩＭＭでのアクセスをインタセプトし、プロセッサ１０２によるＤＩＭＭ１０６−１ないし１０６−Ｎへのアクセスを制御する。
動作３０８において、時間間隔が満了したかどうかを判断するために、時間間隔がチェックされる。時間間隔が満了している場合、方法の動作は、下記の動作３２２へ進む。動作３０８において、時間間隔が満了していない場合は、動作３１０において、ＤＩＭＭアクセスカウンタが増分される。ＤＩＭＭアクセスカウンタは、物理的なカウンタにすること、或いは単純にメモリ位置にすること、或いは、当該技術分野で周知の、状態をモニタする他の任意の方法にすることができる。
動作３１２では、アクセス速度を上回っているかを判断するために、アクセス速度が調査される。一例として、ＤＩＭＭアクセスカウンタを調査し、アクセス数が現行時間間隔における最大アクセス数を上回っているかを判断することができる。動作３１２において、アクセス速度を上回っていない場合、このアクセスは、動作３１４において、ＤＩＭＭに適用され、ＤＩＭＭは、動作３１６において、アクセスに応答し、方法の動作は動作３０６に継続する。
動作３１２において、アクセス速度を上回っていた場合、この時には、動作３２０で現行の時間間隔が満了するまで、このアクセスは遅延される。現行時間間隔が動作３２０で満了した時、方法の動作は、動作３２２において継続され、後続の時間間隔が開始される。動作３２４において、アクセスがＤＩＭＭに適用され、ＤＩＭＭは、動作３２６において、アクセスに応答する。ＤＩＭＭアクセスカウンタは、動作３２８で１にリセットされ、方法の動作は、動作３０６に継続する。
本明細書での使用において、「約」という用語は、＋／−１０％を意味する。一例として、「約２５０」という語句は、２２５ないし２７５の範囲を示す。
上記の実施形態を考慮すると、本発明では、コンピュータシステムに格納されたデータが関与する様々なコンピュータ実施動作を利用してもよいと理解するべきである。こうした動作は、物理量の物理的操作を必要とするものである。通常は、必須ではないものの、こうした量は、格納と、転送と、結合と、比較と、その他の操作とが可能な電気又は磁気信号の形態を取る。更に、実行される操作は、生成、特定、決定、又は比較といった用語で呼ばれることが多い。
本発明の一部を形成する、本明細書で説明した任意の動作は、有用な機械動作である。本発明は、こうした動作を実行するデバイス又は装置にも関する。この装置は、必要な目的のために特別に構築してもよく、或いは、コンピュータに格納されるコンピュータプログラムによって選択的に起動又は構成される汎用コンピュータにしてもよい。特に、様々な汎用機を、本明細書の教示内容に従って書かれたコンピュータプログラムと共に使用してもよく、或いは、更に特化した装置を構築して必要な動作を実行する方が好都合である場合もある。
本発明は、コンピュータ可読媒体上のコンピュータ可読コードとして実施することもできる。このコンピュータ可読媒体は、データを格納することが可能な任意のデータ記憶装置であり、前記データはその後コンピュータシステムによって読むことができる。コンピュータ可読媒体の例には、ハードドライブと、ネットワーク接続ストレージ（ＮＡＳ）と、読み出し専用メモリと、ランダムアクセスメモリと、ＣＤ−ＲＯＭと、ＣＤ−Ｒと、ＣＤ−ＲＷと、磁気テープと、その他の光学及び非光学データ記憶装置とが含まれる。コンピュータ可読媒体は、ネットワークに接続されたコンピュータシステム上で分散させ、コンピュータ可読コードを分散形式で格納及び実行することも可能である。
更に、図３における動作によって表される命令は、例示の順序で実行する必要はなく、この動作により表される全ての処理は、本発明を実施する上で必ずしも必要ではない場合があると理解される。更に、図３において説明した処理は、ＲＡＭ、ＲＯＭ、又はハードディスクドライブのいずれか一つ又は組み合わせに格納されるソフトウェアにおいて実施することもできる。
上記の発明について明確な理解を目的としてある程度詳細に説明してきたが、前記特許請求の範囲内で一定の変更及び変形を実施し得ることは明らかであろう。したがって、本発明は、制限的ではなく例示的なものとみなされるべきであり、本発明は、本明細書に記載の詳細に限定されず、前記特許請求の範囲及びその等価物の範囲内で変形し得る。
Claims (18)
- コンピューティングシステムであって、
プロセッサと、
少なくとも一つのＤＲＡＭモジュールを含むメモリシステムと、
ＤＲＡＭコントローラと、
前記メモリシステム、前記プロセッサ、及び前記ＤＲＡＭコントローラを結合するバスと、
を備え、
前記ＤＲＡＭコントローラは、
メモリアクセス速度を選択する機能であって、前記選択されたメモリアクセス速度が所望の平均メモリ電力消費率に対応する機能と、
第１の時間間隔を、現行時間間隔として開始する機能と、
メモリシステムにアクセスする機能と、
前記メモリアクセス速度を超過しない場合には、前記アクセスをメモリシステムに適用する機能と、
前記メモリアクセス速度を超過する場合には、前記現行時間間隔が満了するまで前記アクセスを遅延させるとともに、後続の時間間隔を前記現行時間間隔として開始し、そして前記アクセスを前記メモリシステムに適用する機能と、
を備える、システム。 - 請求項１記載のコンピューティングシステムであって、
前記ＤＲＡＭコントローラがステートマシンを含む、システム。 - 請求項１記載のコンピューティングシステムであって、さらに、
前記メモリシステム用の電源を備える、システム。 - 請求項３記載のコンピューティングシステムであって、
前記現行時間間隔の長さは、前記メモリシステム用の前記電源の調整時定数より小さい、システム。 - 請求項３記載のコンピューティングシステムであって、
前記現行時間間隔の長さは、約１０マイクロ秒に等しい、システム。 - 請求項１記載のコンピューティングシステムであって、
所望のメモリ電力消費率が、前記少なくとも一つのＤＲＡＭモジュールの最大電力消費量の約６６パーセントに等しい、システム。 - 請求項１記載のコンピューティングシステムであって、
前記所望のメモリ電力消費率は、前記少なくとも一つのＤＲＡＭモジュールの各々について約９ワットに等しい、システム。 - 請求項１記載のコンピューティングシステムであって、
前記プロセッサは、前記ＤＲＡＭコントローラを含む、システム。 - コンピュータメモリシステムの電力消費量を制限する方法であって、
メモリアクセス速度を選択する工程であって、前記選択されたメモリアクセス速度が所望の平均メモリ電力消費率に対応する工程と、
第１の時間間隔を、現行時間間隔として開始する工程と、
メモリシステムにアクセスする工程と、
前記メモリアクセス速度を超過しない場合には、前記アクセスをメモリシステムに適用する工程と、
前記メモリアクセス速度を超過する場合には、前記現行時間間隔が満了するまで、前記アクセスを遅延させるとともに、後続の時間間隔を前記現行時間間隔として開始し、そして前記アクセスを前記メモリシステムに適用する工程と、
を備える方法。 - 請求項９記載の方法であって、
前記メモリシステムにアクセスする工程は、前記現行時間間隔が満了したかどうかを判断するとともに、前記現行時間間隔が満了している場合には、後続の時間間隔を前記現行時間間隔として開始するとともに、前記アクセスを前記メモリシステムに適用する工程を含む、方法。 - 請求項９記載の方法であって、
前記現行時間間隔が満了していない場合には、アクセスカウンタを増分する、方法。 - 請求項９記載の方法であって、
前記メモリアクセス速度は、現行時間間隔当たりのアクセス数に等しい、方法。 - 請求項９記載の方法であって、
前記メモリアクセス速度を選択する工程は、前記現行時間間隔の長さを選択する工程を含む、方法。 - 請求項１３記載の方法であって、
前記現行時間間隔の長さは、前記コンピュータシステム用の電源の調整時定数より小さい、方法。 - 請求項１３記載の方法であって、
前記現行時間間隔の長さは、約１０マイクロ秒に等しい、方法。 - 請求項９記載の方法であって、
前記所望のメモリ電力消費率は、前記メモリシステム内の各メモリモジュールの最大電力消費量の約６６パーセントに等しい、方法。 - 請求項９記載の方法であって、
前記所望のメモリ電力消費率は、前記メモリシステム内のメモリモジュール当たり約９ワットに等しい、方法。 - 請求項９記載の方法であって、
ＤＲＡＭコントローラが前記メモリシステムへのアクセスを制御する、方法。
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