JP3618524B2 - 二重エッジクロックを使用した集積回路素子の検査方法 - Google Patents

二重エッジクロックを使用した集積回路素子の検査方法 Download PDF

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Publication number
JP3618524B2
JP3618524B2 JP26010497A JP26010497A JP3618524B2 JP 3618524 B2 JP3618524 B2 JP 3618524B2 JP 26010497 A JP26010497 A JP 26010497A JP 26010497 A JP26010497 A JP 26010497A JP 3618524 B2 JP3618524 B2 JP 3618524B2
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JP
Japan
Prior art keywords
integrated circuit
signal
clock
double edge
pulse
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
JP26010497A
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English (en)
Japanese (ja)
Other versions
JPH1125691A (ja
Inventor
ヒュク 權
東 ウク 金
根 原 趙
賢 燮 沈
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Samsung Electronics Co Ltd
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Samsung Electronics Co Ltd
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Publication date
Application filed by Samsung Electronics Co Ltd filed Critical Samsung Electronics Co Ltd
Publication of JPH1125691A publication Critical patent/JPH1125691A/ja
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Publication of JP3618524B2 publication Critical patent/JP3618524B2/ja
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

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    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28—Testing of electronic circuits, e.g. by signal tracer
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28—Testing of electronic circuits, e.g. by signal tracer
    • G01R31/317—Testing of digital circuits
    • G01R31/3181—Functional testing
    • G01R31/319—Tester hardware, i.e. output processing circuits
    • G01R31/31917—Stimuli generation or application of test patterns to the device under test [DUT]
    • G01R31/31922—Timing generation or clock distribution

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  • Engineering & Computer Science (AREA)
  • General Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Tests Of Electronic Circuits (AREA)
  • Dram (AREA)
  • For Increasing The Reliability Of Semiconductor Memories (AREA)
  • Test And Diagnosis Of Digital Computers (AREA)
  • Static Random-Access Memory (AREA)
JP26010497A 1997-06-30 1997-09-25 二重エッジクロックを使用した集積回路素子の検査方法 Expired - Fee Related JP3618524B2 (ja)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
KR1019970029707A KR100211609B1 (ko) 1997-06-30 1997-06-30 이중에지 클록을 사용한 집적회로 소자 검사방법
KR1997-29707 1997-06-30

Publications (2)

Publication Number Publication Date
JPH1125691A JPH1125691A (ja) 1999-01-29
JP3618524B2 true JP3618524B2 (ja) 2005-02-09

Family

ID=19512664

Family Applications (1)

Application Number Title Priority Date Filing Date
JP26010497A Expired - Fee Related JP3618524B2 (ja) 1997-06-30 1997-09-25 二重エッジクロックを使用した集積回路素子の検査方法

Country Status (5)

Country Link
US (1) US5959915A (ko)
JP (1) JP3618524B2 (ko)
KR (1) KR100211609B1 (ko)
CN (1) CN1118708C (ko)
TW (1) TW346540B (ko)

Families Citing this family (17)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6055208A (en) * 1998-06-05 2000-04-25 Micron Technology, Inc. Method and circuit for sending a signal in a semiconductor device during a setup time
US6115303A (en) * 1998-10-09 2000-09-05 Micron Technology, Inc. Method and apparatus for testing memory devices
US6944247B2 (en) * 1999-11-19 2005-09-13 Texas Instruments Incorporated Plural circuit selection using role reversing control inputs
US6393081B1 (en) * 1998-11-25 2002-05-21 Texas Instruments Incorporated Plural circuit selection using role reversing control inputs
US6738442B1 (en) * 2000-01-19 2004-05-18 Agere Systems Inc. Pulse detection and synchronization system
JP3645791B2 (ja) * 2000-05-29 2005-05-11 エルピーダメモリ株式会社 同期型半導体記憶装置
HUP0400161A2 (hu) * 2001-06-08 2004-08-30 Vector Tobacco Ltd., Módosított nikotin- és nitrozamintartalmú dohány
KR100493027B1 (ko) * 2002-10-01 2005-06-07 삼성전자주식회사 외부클럭의 주파수 체배기와 테스트 데이터의 출력버퍼를 구비하는 반도체 장치 및 반도체 장치의 테스트 방법
US7536610B2 (en) * 2004-03-26 2009-05-19 Koninklijke Philips Electronics N.V. Method for detecting resistive-open defects in semiconductor memories
KR100688502B1 (ko) 2004-10-21 2007-03-02 삼성전자주식회사 하이 주파수 구현이 가능한 반도체 소자의 검사방법
US8394084B2 (en) * 2005-01-10 2013-03-12 Optimedica Corporation Apparatus for patterned plasma-mediated laser trephination of the lens capsule and three dimensional phaco-segmentation
US7385872B2 (en) 2006-10-17 2008-06-10 Qimonda North America Corp. Method and apparatus for increasing clock frequency and data rate for semiconductor devices
US20090134922A1 (en) * 2007-11-27 2009-05-28 Cheng-Hung Chen Start-up circuit for bias circuit
EP2234272A3 (en) 2009-03-23 2015-09-30 Oticon A/S Low-power dual-edge-triggered storage cell with scan test support and clock gating circuit therefor
CN102467097B (zh) * 2010-11-16 2013-10-16 安凯(广州)微电子技术有限公司 一种外设控制器和外设控制电路
CN104101767A (zh) * 2014-08-08 2014-10-15 长沙金艺电子科技有限公司 一种从高压母线上直接取电压信号的避雷器阻性电流测试仪
KR102610279B1 (ko) * 2017-12-12 2023-12-07 삼성전자주식회사 메모리 장치, 메모리 장치의 동작 방법 및 메모리 장치를 포함하는 테스트 시스템의 동작 방법

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4672583A (en) * 1983-06-15 1987-06-09 Nec Corporation Dynamic random access memory device provided with test circuit for internal refresh circuit
JP3406698B2 (ja) * 1994-08-26 2003-05-12 富士通株式会社 半導体装置
US5659508A (en) * 1995-12-06 1997-08-19 International Business Machine Corporation Special mode enable transparent to normal mode operation
US5875153A (en) * 1997-04-30 1999-02-23 Texas Instruments Incorporated Internal/external clock option for built-in self test
US7589076B2 (en) * 2006-05-18 2009-09-15 Pgx Health, Llc Substituted aryl piperidinylalkynyladenosines as A2AR agonists

Also Published As

Publication number Publication date
US5959915A (en) 1999-09-28
CN1204058A (zh) 1999-01-06
KR100211609B1 (ko) 1999-08-02
JPH1125691A (ja) 1999-01-29
CN1118708C (zh) 2003-08-20
KR19990005509A (ko) 1999-01-25
TW346540B (en) 1998-12-01

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